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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -passes=slp-vectorizer %s | FileCheck -check-prefixes=GCN,GFX7 %s3; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=fiji -passes=slp-vectorizer %s | FileCheck -check-prefixes=GCN,GFX8 %s4; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -passes=slp-vectorizer %s | FileCheck -check-prefixes=GCN,GFX8 %s5 6define <2 x half> @round_v2f16(<2 x half> %arg) {7; GFX7-LABEL: @round_v2f16(8; GFX7-NEXT: bb:9; GFX7-NEXT: [[T:%.*]] = extractelement <2 x half> [[ARG:%.*]], i64 010; GFX7-NEXT: [[T1:%.*]] = tail call half @llvm.round.f16(half [[T]])11; GFX7-NEXT: [[T2:%.*]] = insertelement <2 x half> undef, half [[T1]], i64 012; GFX7-NEXT: [[T3:%.*]] = extractelement <2 x half> [[ARG]], i64 113; GFX7-NEXT: [[T4:%.*]] = tail call half @llvm.round.f16(half [[T3]])14; GFX7-NEXT: [[T5:%.*]] = insertelement <2 x half> [[T2]], half [[T4]], i64 115; GFX7-NEXT: ret <2 x half> [[T5]]16;17; GFX8-LABEL: @round_v2f16(18; GFX8-NEXT: bb:19; GFX8-NEXT: [[TMP0:%.*]] = call <2 x half> @llvm.round.v2f16(<2 x half> [[ARG:%.*]])20; GFX8-NEXT: ret <2 x half> [[TMP0]]21;22bb:23 %t = extractelement <2 x half> %arg, i64 024 %t1 = tail call half @llvm.round.half(half %t)25 %t2 = insertelement <2 x half> undef, half %t1, i64 026 %t3 = extractelement <2 x half> %arg, i64 127 %t4 = tail call half @llvm.round.half(half %t3)28 %t5 = insertelement <2 x half> %t2, half %t4, i64 129 ret <2 x half> %t530}31 32 33define <2 x float> @round_v2f32(<2 x float> %arg) {34; GCN-LABEL: @round_v2f32(35; GCN-NEXT: bb:36; GCN-NEXT: [[T:%.*]] = extractelement <2 x float> [[ARG:%.*]], i64 037; GCN-NEXT: [[T1:%.*]] = tail call float @llvm.round.f32(float [[T]])38; GCN-NEXT: [[T2:%.*]] = insertelement <2 x float> undef, float [[T1]], i64 039; GCN-NEXT: [[T3:%.*]] = extractelement <2 x float> [[ARG]], i64 140; GCN-NEXT: [[T4:%.*]] = tail call float @llvm.round.f32(float [[T3]])41; GCN-NEXT: [[T5:%.*]] = insertelement <2 x float> [[T2]], float [[T4]], i64 142; GCN-NEXT: ret <2 x float> [[T5]]43;44bb:45 %t = extractelement <2 x float> %arg, i64 046 %t1 = tail call float @llvm.round.f32(float %t)47 %t2 = insertelement <2 x float> undef, float %t1, i64 048 %t3 = extractelement <2 x float> %arg, i64 149 %t4 = tail call float @llvm.round.f32(float %t3)50 %t5 = insertelement <2 x float> %t2, float %t4, i64 151 ret <2 x float> %t552}53 54declare half @llvm.round.half(half) #055declare float @llvm.round.f32(float) #056 57attributes #0 = { nounwind readnone speculatable willreturn }58