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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 22; RUN: opt < %s -passes=slp-vectorizer -S -mtriple=riscv32 -mattr=+m,+v | FileCheck %s3; RUN: opt < %s -passes=slp-vectorizer -S -mtriple=riscv64 -mattr=+m,+v | FileCheck %s4; RUN: opt < %s -passes=slp-vectorizer -S -mtriple=riscv32 -mattr=+v,+zvbb | FileCheck %s5; RUN: opt < %s -passes=slp-vectorizer -S -mtriple=riscv64 -mattr=+v,+zvbb | FileCheck %s6 7define <4 x i8> @ctpop_v4i8(ptr %a) {8; CHECK-LABEL: define <4 x i8> @ctpop_v4i89; CHECK-SAME: (ptr [[A:%.*]]) #[[ATTR0:[0-9]+]] {10; CHECK-NEXT: entry:11; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i8>, ptr [[A]], align 412; CHECK-NEXT: [[TMP1:%.*]] = call <4 x i8> @llvm.ctpop.v4i8(<4 x i8> [[TMP0]])13; CHECK-NEXT: ret <4 x i8> [[TMP1]]14;15entry:16 %0 = load <4 x i8>, ptr %a17 %vecext = extractelement <4 x i8> %0, i8 018 %1 = call i8 @llvm.ctpop.i8(i8 %vecext)19 %vecins = insertelement <4 x i8> undef, i8 %1, i8 020 %vecext.1 = extractelement <4 x i8> %0, i8 121 %2 = call i8 @llvm.ctpop.i8(i8 %vecext.1)22 %vecins.1 = insertelement <4 x i8> %vecins, i8 %2, i8 123 %vecext.2 = extractelement <4 x i8> %0, i8 224 %3 = call i8 @llvm.ctpop.i8(i8 %vecext.2)25 %vecins.2 = insertelement <4 x i8> %vecins.1, i8 %3, i8 226 %vecext.3 = extractelement <4 x i8> %0, i8 327 %4 = call i8 @llvm.ctpop.i8(i8 %vecext.3)28 %vecins.3 = insertelement <4 x i8> %vecins.2, i8 %4, i8 329 ret <4 x i8> %vecins.330}31 32define <4 x i16> @ctpop_v4i16(ptr %a) {33; CHECK-LABEL: define <4 x i16> @ctpop_v4i1634; CHECK-SAME: (ptr [[A:%.*]]) #[[ATTR0]] {35; CHECK-NEXT: entry:36; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i16>, ptr [[A]], align 837; CHECK-NEXT: [[TMP1:%.*]] = call <4 x i16> @llvm.ctpop.v4i16(<4 x i16> [[TMP0]])38; CHECK-NEXT: ret <4 x i16> [[TMP1]]39;40entry:41 %0 = load <4 x i16>, ptr %a42 %vecext = extractelement <4 x i16> %0, i16 043 %1 = call i16 @llvm.ctpop.i16(i16 %vecext)44 %vecins = insertelement <4 x i16> undef, i16 %1, i16 045 %vecext.1 = extractelement <4 x i16> %0, i16 146 %2 = call i16 @llvm.ctpop.i16(i16 %vecext.1)47 %vecins.1 = insertelement <4 x i16> %vecins, i16 %2, i16 148 %vecext.2 = extractelement <4 x i16> %0, i16 249 %3 = call i16 @llvm.ctpop.i16(i16 %vecext.2)50 %vecins.2 = insertelement <4 x i16> %vecins.1, i16 %3, i16 251 %vecext.3 = extractelement <4 x i16> %0, i16 352 %4 = call i16 @llvm.ctpop.i16(i16 %vecext.3)53 %vecins.3 = insertelement <4 x i16> %vecins.2, i16 %4, i16 354 ret <4 x i16> %vecins.355}56 57define <4 x i32> @ctpop_v4i32(ptr %a) {58; CHECK-LABEL: define <4 x i32> @ctpop_v4i3259; CHECK-SAME: (ptr [[A:%.*]]) #[[ATTR0]] {60; CHECK-NEXT: entry:61; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, ptr [[A]], align 1662; CHECK-NEXT: [[TMP1:%.*]] = call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> [[TMP0]])63; CHECK-NEXT: ret <4 x i32> [[TMP1]]64;65entry:66 %0 = load <4 x i32>, ptr %a67 %vecext = extractelement <4 x i32> %0, i32 068 %1 = call i32 @llvm.ctpop.i32(i32 %vecext)69 %vecins = insertelement <4 x i32> undef, i32 %1, i32 070 %vecext.1 = extractelement <4 x i32> %0, i32 171 %2 = call i32 @llvm.ctpop.i32(i32 %vecext.1)72 %vecins.1 = insertelement <4 x i32> %vecins, i32 %2, i32 173 %vecext.2 = extractelement <4 x i32> %0, i32 274 %3 = call i32 @llvm.ctpop.i32(i32 %vecext.2)75 %vecins.2 = insertelement <4 x i32> %vecins.1, i32 %3, i32 276 %vecext.3 = extractelement <4 x i32> %0, i32 377 %4 = call i32 @llvm.ctpop.i32(i32 %vecext.3)78 %vecins.3 = insertelement <4 x i32> %vecins.2, i32 %4, i32 379 ret <4 x i32> %vecins.380}81 82define <4 x i64> @ctpop_v4i64(ptr %a) {83; CHECK-LABEL: define <4 x i64> @ctpop_v4i6484; CHECK-SAME: (ptr [[A:%.*]]) #[[ATTR0]] {85; CHECK-NEXT: entry:86; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i64>, ptr [[A]], align 3287; CHECK-NEXT: [[TMP1:%.*]] = call <4 x i64> @llvm.ctpop.v4i64(<4 x i64> [[TMP0]])88; CHECK-NEXT: ret <4 x i64> [[TMP1]]89;90entry:91 %0 = load <4 x i64>, ptr %a92 %vecext = extractelement <4 x i64> %0, i32 093 %1 = call i64 @llvm.ctpop.i64(i64 %vecext)94 %vecins = insertelement <4 x i64> undef, i64 %1, i64 095 %vecext.1 = extractelement <4 x i64> %0, i32 196 %2 = call i64 @llvm.ctpop.i64(i64 %vecext.1)97 %vecins.1 = insertelement <4 x i64> %vecins, i64 %2, i64 198 %vecext.2 = extractelement <4 x i64> %0, i32 299 %3 = call i64 @llvm.ctpop.i64(i64 %vecext.2)100 %vecins.2 = insertelement <4 x i64> %vecins.1, i64 %3, i64 2101 %vecext.3 = extractelement <4 x i64> %0, i32 3102 %4 = call i64 @llvm.ctpop.i64(i64 %vecext.3)103 %vecins.3 = insertelement <4 x i64> %vecins.2, i64 %4, i64 3104 ret <4 x i64> %vecins.3105}106 107declare i8 @llvm.ctpop.i8(i8)108declare i16 @llvm.ctpop.i16(i16)109declare i32 @llvm.ctpop.i32(i32)110declare i64 @llvm.ctpop.i64(i64)111