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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 42; RUN: opt -S --passes=slp-vectorizer -mtriple=riscv64-unknown-linux -mattr=+v < %s | FileCheck %s3 4define void @test(ptr %p, i16 %load794) {5; CHECK-LABEL: define void @test(6; CHECK-SAME: ptr [[P:%.*]], i16 [[LOAD794:%.*]]) #[[ATTR0:[0-9]+]] {7; CHECK-NEXT: [[ZEXT795:%.*]] = zext i16 [[LOAD794]] to i328; CHECK-NEXT: [[GEP799:%.*]] = getelementptr inbounds i8, ptr [[P]], i64 169; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i16>, ptr [[P]], align 210; CHECK-NEXT: [[TMP2:%.*]] = load <2 x i16>, ptr [[GEP799]], align 211; CHECK-NEXT: [[TMP3:%.*]] = zext <2 x i16> [[TMP1]] to <2 x i32>12; CHECK-NEXT: [[TMP4:%.*]] = zext <2 x i16> [[TMP2]] to <2 x i32>13; CHECK-NEXT: [[TMP7:%.*]] = sub nsw <2 x i32> [[TMP4]], [[TMP3]]14; CHECK-NEXT: [[TMP8:%.*]] = add nsw <2 x i32> [[TMP7]], splat (i32 3329)15; CHECK-NEXT: [[TMP5:%.*]] = insertelement <2 x i32> poison, i32 [[ZEXT795]], i32 016; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <2 x i32> [[TMP5]], <2 x i32> poison, <2 x i32> zeroinitializer17; CHECK-NEXT: [[TMP12:%.*]] = mul <2 x i32> [[TMP8]], [[TMP6]]18; CHECK-NEXT: [[TMP9:%.*]] = zext <2 x i32> [[TMP12]] to <2 x i64>19; CHECK-NEXT: [[TMP22:%.*]] = mul nuw nsw <2 x i64> [[TMP9]], splat (i64 5039)20; CHECK-NEXT: [[TMP11:%.*]] = lshr <2 x i64> [[TMP22]], splat (i64 24)21; CHECK-NEXT: [[TMP13:%.*]] = trunc <2 x i64> [[TMP11]] to <2 x i32>22; CHECK-NEXT: [[TMP20:%.*]] = mul <2 x i32> [[TMP13]], splat (i32 62207)23; CHECK-NEXT: [[TMP21:%.*]] = add <2 x i32> [[TMP20]], [[TMP12]]24; CHECK-NEXT: [[TMP14:%.*]] = trunc <2 x i32> [[TMP21]] to <2 x i16>25; CHECK-NEXT: [[TMP15:%.*]] = add <2 x i16> [[TMP14]], splat (i16 -3329)26; CHECK-NEXT: [[TMP16:%.*]] = icmp slt <2 x i16> [[TMP15]], zeroinitializer27; CHECK-NEXT: [[TMP17:%.*]] = select <2 x i1> [[TMP16]], <2 x i16> [[TMP14]], <2 x i16> zeroinitializer28; CHECK-NEXT: [[TMP18:%.*]] = call <2 x i16> @llvm.smax.v2i16(<2 x i16> [[TMP15]], <2 x i16> zeroinitializer)29; CHECK-NEXT: [[TMP19:%.*]] = or <2 x i16> [[TMP17]], [[TMP18]]30; CHECK-NEXT: store <2 x i16> [[TMP19]], ptr [[P]], align 231; CHECK-NEXT: ret void32;33 %zext795 = zext i16 %load794 to i3234 %load798 = load i16, ptr %p, align 235 %gep799 = getelementptr inbounds i8, ptr %p, i64 1636 %load800 = load i16, ptr %gep799, align 237 %zext801 = zext i16 %load798 to i3238 %zext802 = zext i16 %load800 to i3239 %sub809 = sub nsw i32 %zext802, %zext80140 %add810 = add nsw i32 %sub809, 332941 %mul811 = mul i32 %add810, %zext79542 %zext812 = zext i32 %mul811 to i6443 %mul813 = mul nuw nsw i64 %zext812, 503944 %lshr814 = lshr i64 %mul813, 2445 %trunc815 = trunc nuw nsw i64 %lshr814 to i3246 %mul816 = mul i32 %trunc815, 6220747 %add817 = add i32 %mul816, %mul81148 %trunc818 = trunc i32 %add817 to i1649 %add819 = add i16 %trunc818, -332950 %icmp820 = icmp slt i16 %add819, 051 %select821 = select i1 %icmp820, i16 %trunc818, i16 052 %call822 = call i16 @llvm.smax.i16(i16 %add819, i16 0)53 %or823 = or i16 %select821, %call82254 store i16 %or823, ptr %p, align 255 %gep826 = getelementptr inbounds i8, ptr %p, i64 256 %load827 = load i16, ptr %gep826, align 257 %gep828 = getelementptr inbounds i8, ptr %p, i64 1858 %load829 = load i16, ptr %gep828, align 259 %zext830 = zext i16 %load827 to i3260 %zext831 = zext i16 %load829 to i3261 %sub838 = sub nsw i32 %zext831, %zext83062 %add839 = add nsw i32 %sub838, 332963 %mul840 = mul i32 %add839, %zext79564 %zext841 = zext i32 %mul840 to i6465 %mul842 = mul nuw nsw i64 %zext841, 503966 %lshr843 = lshr i64 %mul842, 2467 %trunc844 = trunc nuw nsw i64 %lshr843 to i3268 %mul845 = mul i32 %trunc844, 6220769 %add846 = add i32 %mul845, %mul84070 %trunc847 = trunc i32 %add846 to i1671 %add848 = add i16 %trunc847, -332972 %icmp849 = icmp slt i16 %add848, 073 %select850 = select i1 %icmp849, i16 %trunc847, i16 074 %call851 = call i16 @llvm.smax.i16(i16 %add848, i16 0)75 %or852 = or i16 %select850, %call85176 store i16 %or852, ptr %gep826, align 277 ret void78}79 80