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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 42; RUN: opt -S --passes=slp-vectorizer -mtriple=s390x-unknown-linux -mcpu=z14 < %s | FileCheck %s3 4define void @test() {5; CHECK-LABEL: define void @test(6; CHECK-SAME: ) #[[ATTR0:[0-9]+]] {7; CHECK-NEXT: [[TMP1:%.*]] = zext i8 0 to i328; CHECK-NEXT: [[TMP2:%.*]] = zext i8 0 to i329; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> <i32 poison, i32 0, i32 0, i32 0>, i32 [[TMP2]], i32 010; CHECK-NEXT: [[TMP4:%.*]] = select <4 x i1> zeroinitializer, <4 x i32> zeroinitializer, <4 x i32> [[TMP3]]11; CHECK-NEXT: [[TMP5:%.*]] = select i1 false, i32 0, i32 012; CHECK-NEXT: [[TMP6:%.*]] = select i1 false, i32 0, i32 [[TMP1]]13; CHECK-NEXT: [[TMP7:%.*]] = select i1 false, i32 0, i32 [[TMP2]]14; CHECK-NEXT: [[TMP8:%.*]] = call i32 @llvm.vector.reduce.xor.v4i32(<4 x i32> [[TMP4]])15; CHECK-NEXT: [[OP_RDX:%.*]] = xor i32 [[TMP8]], [[TMP5]]16; CHECK-NEXT: [[OP_RDX1:%.*]] = xor i32 [[TMP6]], [[TMP7]]17; CHECK-NEXT: [[OP_RDX2:%.*]] = xor i32 [[OP_RDX]], [[OP_RDX1]]18; CHECK-NEXT: [[TMP9:%.*]] = trunc i32 [[OP_RDX2]] to i1619; CHECK-NEXT: store i16 [[TMP9]], ptr null, align 220; CHECK-NEXT: ret void21;22 %1 = zext i8 0 to i3223 %.not = icmp sgt i32 0, %124 %2 = zext i8 0 to i3225 %3 = select i1 %.not, i32 0, i32 026 %4 = zext i8 0 to i3227 %.not.1 = icmp sgt i32 0, %428 %5 = zext i8 0 to i3229 %6 = select i1 %.not.1, i32 0, i32 %530 %7 = xor i32 %6, %331 %8 = zext i8 0 to i3232 %.not.2 = icmp sgt i32 0, %833 %9 = select i1 %.not.2, i32 0, i32 034 %10 = xor i32 %9, %735 %11 = zext i8 0 to i3236 %.not.3 = icmp sgt i32 0, %1137 %12 = select i1 %.not.3, i32 0, i32 038 %13 = xor i32 %12, %1039 %14 = select i1 false, i32 0, i32 040 %15 = xor i32 %14, %1341 %16 = select i1 false, i32 0, i32 %242 %17 = xor i32 %16, %1543 %18 = select i1 false, i32 0, i32 %544 %19 = xor i32 %18, %1745 %20 = trunc i32 %19 to i1646 store i16 %20, ptr null, align 247 ret void48}49