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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes=slp-vectorizer -slp-vectorize-hor -slp-vectorize-hor-store -S < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s3target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:1"4 5define void @mainTest(ptr %ptr) #0 {6; CHECK-LABEL: @mainTest(7; CHECK-NEXT: entry:8; CHECK-NEXT: [[CMP:%.*]] = icmp eq ptr [[PTR:%.*]], null9; CHECK-NEXT: br i1 [[CMP]], label [[LOOP:%.*]], label [[BAIL_OUT:%.*]]10; CHECK: loop:11; CHECK-NEXT: [[DUMMY_PHI:%.*]] = phi i32 [ 1, [[ENTRY:%.*]] ], [ [[OP_RDX3:%.*]], [[LOOP]] ]12; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[PTR]], i64 113; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr [[PTR]], align 414; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i32> [[TMP1]], i32 315; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i32> [[TMP1]], i32 216; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 417; CHECK-NEXT: [[TMP5:%.*]] = mul <4 x i32> [[TMP1]], [[TMP1]]18; CHECK-NEXT: [[TMP6:%.*]] = sext i32 [[TMP3]] to i6419; CHECK-NEXT: [[TMP7:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP5]])20; CHECK-NEXT: [[OP_RDX:%.*]] = add i32 [[TMP7]], [[TMP4]]21; CHECK-NEXT: [[OP_RDX1:%.*]] = add i32 [[TMP3]], [[TMP2]]22; CHECK-NEXT: [[OP_RDX2:%.*]] = add i32 [[OP_RDX]], [[OP_RDX1]]23; CHECK-NEXT: [[OP_RDX3]] = add i32 [[OP_RDX2]], 124; CHECK-NEXT: br label [[LOOP]]25; CHECK: bail_out:26; CHECK-NEXT: ret void27;28entry:29 %cmp = icmp eq ptr %ptr, null30 br i1 %cmp, label %loop, label %bail_out31 32loop:33 %dummy_phi = phi i32 [ 1, %entry ], [ %18, %loop ]34 %0 = load i32, ptr %ptr , align 435 %1 = mul i32 %0, %036 %2 = add i32 1, %137 %3 = getelementptr inbounds i32, ptr %ptr, i64 138 %4 = load i32, ptr %3 , align 439 %5 = mul i32 %4, %440 %6 = add i32 %2, %441 %7 = add i32 %6, %542 %8 = getelementptr inbounds i32, ptr %ptr, i64 243 %9 = load i32, ptr %8 , align 444 %10 = mul i32 %9, %945 %11 = add i32 %7, %946 %12 = add i32 %11, %1047 %13 = sext i32 %9 to i6448 %14 = getelementptr inbounds i32, ptr %ptr, i64 349 %15 = load i32, ptr %14 , align 450 %16 = mul i32 %15, %1551 %17 = add i32 %12, %1552 %18 = add i32 %17, %1653 br label %loop54 55bail_out:56 ret void57}58 59attributes #0 = { "target-cpu"="westmere" }60 61