84 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu -mcpu=cascadelake < %s | FileCheck %s3 4define void @test(ptr %0, i32 %add651) {5; CHECK-LABEL: define void @test(6; CHECK-SAME: ptr [[TMP0:%.*]], i32 [[ADD651:%.*]]) #[[ATTR0:[0-9]+]] {7; CHECK-NEXT: [[ENTRY:.*:]]8; CHECK-NEXT: [[PREDPEL11:%.*]] = alloca [0 x [0 x [25 x i32]]], i32 0, align 169; CHECK-NEXT: [[ARRAYIDX469_6:%.*]] = getelementptr i8, ptr [[PREDPEL11]], i64 2810; CHECK-NEXT: [[ARRAYIDX469_7:%.*]] = getelementptr i8, ptr [[PREDPEL11]], i64 3211; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[PREDPEL11]], i64 4012; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP1]], align 813; CHECK-NEXT: [[TMP3:%.*]] = load <2 x i32>, ptr [[ARRAYIDX469_6]], align 414; CHECK-NEXT: [[TMP7:%.*]] = load <2 x i32>, ptr [[ARRAYIDX469_7]], align 1615; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX469_7]], align 1616; CHECK-NEXT: [[CONV470_7:%.*]] = trunc i32 [[TMP2]] to i1617; CHECK-NEXT: store i16 [[CONV470_7]], ptr [[TMP0]], align 218; CHECK-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP0]], align 819; CHECK-NEXT: [[ARRAYIDX660:%.*]] = getelementptr i8, ptr [[TMP4]], i64 780020; CHECK-NEXT: [[ARRAYIDX689:%.*]] = getelementptr i8, ptr [[TMP4]], i64 781621; CHECK-NEXT: [[TMP6:%.*]] = add <2 x i32> [[TMP3]], splat (i32 1)22; CHECK-NEXT: [[TMP10:%.*]] = add <2 x i32> [[TMP6]], [[TMP7]]23; CHECK-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> poison, i32 [[ADD651]], i32 024; CHECK-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP2]], i32 125; CHECK-NEXT: [[TMP19:%.*]] = shufflevector <2 x i32> [[TMP10]], <2 x i32> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>26; CHECK-NEXT: [[TMP14:%.*]] = shufflevector <4 x i32> [[TMP13]], <4 x i32> [[TMP19]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>27; CHECK-NEXT: [[TMP20:%.*]] = insertelement <4 x i32> <i32 0, i32 0, i32 1, i32 poison>, i32 [[TMP5]], i32 328; CHECK-NEXT: [[TMP21:%.*]] = add <4 x i32> [[TMP14]], [[TMP20]]29; CHECK-NEXT: [[TMP15:%.*]] = lshr <4 x i32> [[TMP21]], splat (i32 1)30; CHECK-NEXT: [[SHR685:%.*]] = lshr i32 [[TMP2]], 131; CHECK-NEXT: [[TMP16:%.*]] = trunc <4 x i32> [[TMP15]] to <4 x i16>32; CHECK-NEXT: [[CONV686:%.*]] = trunc i32 [[SHR685]] to i1633; CHECK-NEXT: store i16 [[CONV686]], ptr [[ARRAYIDX689]], align 834; CHECK-NEXT: [[ARRAYIDX727:%.*]] = getelementptr i8, ptr [[TMP4]], i64 781835; CHECK-NEXT: [[TMP17:%.*]] = extractelement <4 x i16> [[TMP16]], i32 236; CHECK-NEXT: store i16 [[TMP17]], ptr [[ARRAYIDX727]], align 237; CHECK-NEXT: [[TMP18:%.*]] = extractelement <4 x i16> [[TMP16]], i32 338; CHECK-NEXT: store i16 [[TMP18]], ptr [[TMP4]], align 839; CHECK-NEXT: store <4 x i16> [[TMP16]], ptr [[ARRAYIDX660]], align 840; CHECK-NEXT: ret void41;42entry:43 %PredPel11 = alloca [0 x [0 x [25 x i32]]], i32 0, align 1644 %arrayidx469.6 = getelementptr i8, ptr %PredPel11, i64 2845 %1 = load i32, ptr %arrayidx469.6, align 446 %arrayidx469.7 = getelementptr i8, ptr %PredPel11, i64 3247 %2 = load i32, ptr %arrayidx469.7, align 1648 %conv470.7 = trunc i32 %2 to i1649 store i16 %conv470.7, ptr %0, align 250 %3 = getelementptr i8, ptr %PredPel11, i64 3651 %4 = getelementptr i8, ptr %PredPel11, i64 4052 %5 = load ptr, ptr %0, align 853 %add6511 = add i32 %1, 154 %shr656 = lshr i32 %add651, 155 %conv657 = trunc i32 %shr656 to i1656 %arrayidx660 = getelementptr i8, ptr %5, i64 780057 store i16 %conv657, ptr %arrayidx660, align 858 %shr685 = lshr i32 %2, 159 %conv686 = trunc i32 %shr685 to i1660 %arrayidx689 = getelementptr i8, ptr %5, i64 781661 store i16 %conv686, ptr %arrayidx689, align 862 %arrayidx694 = getelementptr i8, ptr %5, i64 780263 store i16 %conv686, ptr %arrayidx694, align 264 %6 = load i32, ptr %3, align 465 %add716 = add i32 %add6511, %266 %add717 = add i32 %add716, 167 %shr718 = lshr i32 %add717, 168 %conv719 = trunc i32 %shr718 to i1669 %arrayidx727 = getelementptr i8, ptr %5, i64 781870 store i16 %conv719, ptr %arrayidx727, align 271 %arrayidx731 = getelementptr i8, ptr %5, i64 780472 store i16 %conv719, ptr %arrayidx731, align 473 %7 = load i32, ptr %4, align 874 %add750 = add i32 %2, 175 %add753 = add i32 %add750, %676 %add754 = add i32 %add753, %777 %shr755 = lshr i32 %add754, 178 %conv756 = trunc i32 %shr755 to i1679 store i16 %conv756, ptr %5, align 880 %arrayidx772 = getelementptr i8, ptr %5, i64 780681 store i16 %conv756, ptr %arrayidx772, align 282 ret void83}84