77 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=slp-vectorizer -S -mtriple=x86_64-- -mcpu=corei7 | FileCheck %s3 4define void @foo(ptr %v0, ptr readonly %v1) {5; CHECK-LABEL: @foo(6; CHECK-NEXT: [[T14:%.*]] = getelementptr inbounds i32, ptr [[V1:%.*]], i64 47; CHECK-NEXT: [[T142:%.*]] = getelementptr inbounds i64, ptr [[V1]], i64 88; CHECK-NEXT: [[T222:%.*]] = getelementptr inbounds i64, ptr [[V1]], i64 109; CHECK-NEXT: [[T21:%.*]] = getelementptr inbounds i32, ptr [[V0:%.*]], i64 410; CHECK-NEXT: [[T212:%.*]] = getelementptr inbounds i64, ptr [[V0]], i64 811; CHECK-NEXT: [[T292:%.*]] = getelementptr inbounds i64, ptr [[V0]], i64 1012; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr [[T14]], align 413; CHECK-NEXT: [[TMP2:%.*]] = add nsw <4 x i32> [[TMP1]], <i32 4, i32 4, i32 6, i32 7>14; CHECK-NEXT: [[TMP3:%.*]] = load <2 x i64>, ptr [[T142]], align 815; CHECK-NEXT: [[TMP4:%.*]] = add nsw <2 x i64> [[TMP3]], splat (i64 4)16; CHECK-NEXT: [[TMP5:%.*]] = load <2 x i64>, ptr [[T222]], align 817; CHECK-NEXT: [[TMP6:%.*]] = add nsw <2 x i64> [[TMP5]], <i64 6, i64 7>18; CHECK-NEXT: store <2 x i64> [[TMP4]], ptr [[T212]], align 819; CHECK-NEXT: store <2 x i64> [[TMP6]], ptr [[T292]], align 820; CHECK-NEXT: store <4 x i32> [[TMP2]], ptr [[T21]], align 421; CHECK-NEXT: ret void22;23 24 25 %t14 = getelementptr inbounds i32, ptr %v1, i64 426 %t18 = getelementptr inbounds i32, ptr %v1, i64 527 %t22 = getelementptr inbounds i32, ptr %v1, i64 628 %t26 = getelementptr inbounds i32, ptr %v1, i64 729 30 %t142 = getelementptr inbounds i64, ptr %v1, i64 831 %t182 = getelementptr inbounds i64, ptr %v1, i64 932 %t222 = getelementptr inbounds i64, ptr %v1, i64 1033 %t262 = getelementptr inbounds i64, ptr %v1, i64 1134 35 %t21 = getelementptr inbounds i32, ptr %v0, i64 436 %t25 = getelementptr inbounds i32, ptr %v0, i64 537 %t29 = getelementptr inbounds i32, ptr %v0, i64 638 %t32 = getelementptr inbounds i32, ptr %v0, i64 739 40 %t212 = getelementptr inbounds i64, ptr %v0, i64 841 %t252 = getelementptr inbounds i64, ptr %v0, i64 942 %t292 = getelementptr inbounds i64, ptr %v0, i64 1043 %t322 = getelementptr inbounds i64, ptr %v0, i64 1144 45 %t19 = load i32, ptr %t14, align 446 %t23 = load i32, ptr %t18, align 447 %t27 = load i32, ptr %t22, align 448 %t30 = load i32, ptr %t26, align 449 50 %t192 = load i64, ptr %t142, align 851 %t232 = load i64, ptr %t182, align 852 %t272 = load i64, ptr %t222, align 853 %t302 = load i64, ptr %t262, align 854 55 %t20 = add nsw i32 %t19, 456 %t24 = add nsw i32 %t23, 457 %t28 = add nsw i32 %t27, 658 %t31 = add nsw i32 %t30, 759 60 %t202 = add nsw i64 %t192, 461 %t242 = add nsw i64 %t232, 462 %t282 = add nsw i64 %t272, 663 %t312 = add nsw i64 %t302, 764 65 store i64 %t202, ptr %t212, align 866 store i64 %t242, ptr %t252, align 867 store i64 %t282, ptr %t292, align 868 store i64 %t312, ptr %t322, align 869 70 store i32 %t20, ptr %t21, align 471 store i32 %t24, ptr %t25, align 472 store i32 %t28, ptr %t29, align 473 store i32 %t31, ptr %t32, align 474 75 ret void76}77