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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=slp-vectorizer,dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s3 4target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"5target triple = "x86_64-apple-macosx10.7.0"6 7@.str = private unnamed_addr constant [6 x i8] c"bingo\00", align 18 9define void @reduce_compare(ptr nocapture %A, i32 %n) {10; CHECK-LABEL: @reduce_compare(11; CHECK-NEXT: entry:12; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[N:%.*]] to double13; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> poison, double [[CONV]], i32 014; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x double> [[TMP0]], <2 x double> poison, <2 x i32> zeroinitializer15; CHECK-NEXT: br label [[FOR_BODY:%.*]]16; CHECK: for.body:17; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ]18; CHECK-NEXT: [[TMP2:%.*]] = shl nsw i64 [[INDVARS_IV]], 119; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[A:%.*]], i64 [[TMP2]]20; CHECK-NEXT: [[TMP3:%.*]] = load <2 x double>, ptr [[ARRAYIDX]], align 821; CHECK-NEXT: [[TMP4:%.*]] = fmul <2 x double> [[TMP1]], [[TMP3]]22; CHECK-NEXT: [[TMP5:%.*]] = fmul <2 x double> [[TMP4]], <double 7.000000e+00, double 4.000000e+00>23; CHECK-NEXT: [[TMP6:%.*]] = fadd <2 x double> [[TMP5]], <double 5.000000e+00, double 9.000000e+00>24; CHECK-NEXT: [[TMP7:%.*]] = extractelement <2 x double> [[TMP6]], i32 025; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x double> [[TMP6]], i32 126; CHECK-NEXT: [[CMP11:%.*]] = fcmp ogt double [[TMP7]], [[TMP8]]27; CHECK-NEXT: br i1 [[CMP11]], label [[IF_THEN:%.*]], label [[FOR_INC]]28; CHECK: if.then:29; CHECK-NEXT: [[CALL:%.*]] = tail call i32 (ptr, ...) @printf(ptr @.str)30; CHECK-NEXT: br label [[FOR_INC]]31; CHECK: for.inc:32; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], 133; CHECK-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i3234; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], 10035; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]36; CHECK: for.end:37; CHECK-NEXT: ret void38;39entry:40 %conv = sitofp i32 %n to double41 br label %for.body42 43for.body: ; preds = %for.inc, %entry44 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.inc ]45 %0 = shl nsw i64 %indvars.iv, 146 %arrayidx = getelementptr inbounds double, ptr %A, i64 %047 %1 = load double, ptr %arrayidx, align 848 %mul1 = fmul double %conv, %149 %mul2 = fmul double %mul1, 7.000000e+0050 %add = fadd double %mul2, 5.000000e+0051 %2 = or disjoint i64 %0, 152 %arrayidx6 = getelementptr inbounds double, ptr %A, i64 %253 %3 = load double, ptr %arrayidx6, align 854 %mul8 = fmul double %conv, %355 %mul9 = fmul double %mul8, 4.000000e+0056 %add10 = fadd double %mul9, 9.000000e+0057 %cmp11 = fcmp ogt double %add, %add1058 br i1 %cmp11, label %if.then, label %for.inc59 60if.then: ; preds = %for.body61 %call = tail call i32 (ptr, ...) @printf(ptr @.str)62 br label %for.inc63 64for.inc: ; preds = %for.body, %if.then65 %indvars.iv.next = add i64 %indvars.iv, 166 %lftr.wideiv = trunc i64 %indvars.iv.next to i3267 %exitcond = icmp eq i32 %lftr.wideiv, 10068 br i1 %exitcond, label %for.end, label %for.body69 70for.end: ; preds = %for.inc71 ret void72}73 74declare i32 @printf(ptr nocapture, ...)75 76; PR41312 - the order of the reduction ops should not prevent forming a reduction.77; The 'wrong' member of the reduction requires a greater cost if grouped with the78; other candidates in the reduction because it does not have matching predicate79; and/or constant operand.80 81define float @merge_anyof_v4f32_wrong_first(<4 x float> %x) {82; CHECK-LABEL: @merge_anyof_v4f32_wrong_first(83; CHECK-NEXT: [[X3:%.*]] = extractelement <4 x float> [[X:%.*]], i32 384; CHECK-NEXT: [[CMP3WRONG:%.*]] = fcmp olt float [[X3]], 4.200000e+0185; CHECK-NEXT: [[TMP1:%.*]] = fcmp ogt <4 x float> [[X]], splat (float 1.000000e+00)86; CHECK-NEXT: [[TMP2:%.*]] = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> [[TMP1]])87; CHECK-NEXT: [[OP_RDX:%.*]] = or i1 [[TMP2]], [[CMP3WRONG]]88; CHECK-NEXT: [[R:%.*]] = select i1 [[OP_RDX]], float -1.000000e+00, float 1.000000e+0089; CHECK-NEXT: ret float [[R]]90;91 %x0 = extractelement <4 x float> %x, i32 092 %x1 = extractelement <4 x float> %x, i32 193 %x2 = extractelement <4 x float> %x, i32 294 %x3 = extractelement <4 x float> %x, i32 395 %cmp3wrong = fcmp olt float %x3, 42.096 %cmp0 = fcmp ogt float %x0, 1.097 %cmp1 = fcmp ogt float %x1, 1.098 %cmp2 = fcmp ogt float %x2, 1.099 %cmp3 = fcmp ogt float %x3, 1.0100 %or03 = or i1 %cmp0, %cmp3wrong101 %or031 = or i1 %or03, %cmp1102 %or0312 = or i1 %or031, %cmp2103 %or03123 = or i1 %or0312, %cmp3104 %r = select i1 %or03123, float -1.0, float 1.0105 ret float %r106}107 108define float @merge_anyof_v4f32_wrong_last(<4 x float> %x) {109; CHECK-LABEL: @merge_anyof_v4f32_wrong_last(110; CHECK-NEXT: [[X3:%.*]] = extractelement <4 x float> [[X:%.*]], i32 3111; CHECK-NEXT: [[CMP3WRONG:%.*]] = fcmp olt float [[X3]], 4.200000e+01112; CHECK-NEXT: [[TMP1:%.*]] = fcmp ogt <4 x float> [[X]], splat (float 1.000000e+00)113; CHECK-NEXT: [[TMP2:%.*]] = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> [[TMP1]])114; CHECK-NEXT: [[OP_RDX:%.*]] = or i1 [[TMP2]], [[CMP3WRONG]]115; CHECK-NEXT: [[R:%.*]] = select i1 [[OP_RDX]], float -1.000000e+00, float 1.000000e+00116; CHECK-NEXT: ret float [[R]]117;118 %x0 = extractelement <4 x float> %x, i32 0119 %x1 = extractelement <4 x float> %x, i32 1120 %x2 = extractelement <4 x float> %x, i32 2121 %x3 = extractelement <4 x float> %x, i32 3122 %cmp3wrong = fcmp olt float %x3, 42.0123 %cmp0 = fcmp ogt float %x0, 1.0124 %cmp1 = fcmp ogt float %x1, 1.0125 %cmp2 = fcmp ogt float %x2, 1.0126 %cmp3 = fcmp ogt float %x3, 1.0127 %or03 = or i1 %cmp0, %cmp3128 %or031 = or i1 %or03, %cmp1129 %or0312 = or i1 %or031, %cmp2130 %or03123 = or i1 %or0312, %cmp3wrong131 %r = select i1 %or03123, float -1.0, float 1.0132 ret float %r133}134 135define i32 @merge_anyof_v4i32_wrong_middle(<4 x i32> %x) {136; CHECK-LABEL: @merge_anyof_v4i32_wrong_middle(137; CHECK-NEXT: [[X3:%.*]] = extractelement <4 x i32> [[X:%.*]], i32 3138; CHECK-NEXT: [[CMP3WRONG:%.*]] = icmp slt i32 [[X3]], 42139; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt <4 x i32> [[X]], splat (i32 1)140; CHECK-NEXT: [[TMP2:%.*]] = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> [[TMP1]])141; CHECK-NEXT: [[OP_RDX:%.*]] = or i1 [[TMP2]], [[CMP3WRONG]]142; CHECK-NEXT: [[R:%.*]] = select i1 [[OP_RDX]], i32 -1, i32 1143; CHECK-NEXT: ret i32 [[R]]144;145 %x0 = extractelement <4 x i32> %x, i32 0146 %x1 = extractelement <4 x i32> %x, i32 1147 %x2 = extractelement <4 x i32> %x, i32 2148 %x3 = extractelement <4 x i32> %x, i32 3149 %cmp3wrong = icmp slt i32 %x3, 42150 %cmp0 = icmp sgt i32 %x0, 1151 %cmp1 = icmp sgt i32 %x1, 1152 %cmp2 = icmp sgt i32 %x2, 1153 %cmp3 = icmp sgt i32 %x3, 1154 %or03 = or i1 %cmp0, %cmp3155 %or033 = or i1 %or03, %cmp3wrong156 %or0332 = or i1 %or033, %cmp2157 %or03321 = or i1 %or0332, %cmp1158 %r = select i1 %or03321, i32 -1, i32 1159 ret i32 %r160}161 162; Operand/predicate swapping allows forming a reduction, but the163; ideal reduction groups all of the original 'sgt' ops together.164 165define i32 @merge_anyof_v4i32_wrong_middle_better_rdx(<4 x i32> %x, <4 x i32> %y) {166; CHECK-LABEL: @merge_anyof_v4i32_wrong_middle_better_rdx(167; CHECK-NEXT: [[X3:%.*]] = extractelement <4 x i32> [[X:%.*]], i32 3168; CHECK-NEXT: [[Y3:%.*]] = extractelement <4 x i32> [[Y:%.*]], i32 3169; CHECK-NEXT: [[CMP3WRONG:%.*]] = icmp slt i32 [[X3]], [[Y3]]170; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt <4 x i32> [[X]], [[Y]]171; CHECK-NEXT: [[TMP2:%.*]] = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> [[TMP1]])172; CHECK-NEXT: [[OP_RDX:%.*]] = or i1 [[TMP2]], [[CMP3WRONG]]173; CHECK-NEXT: [[R:%.*]] = select i1 [[OP_RDX]], i32 -1, i32 1174; CHECK-NEXT: ret i32 [[R]]175;176 %x0 = extractelement <4 x i32> %x, i32 0177 %x1 = extractelement <4 x i32> %x, i32 1178 %x2 = extractelement <4 x i32> %x, i32 2179 %x3 = extractelement <4 x i32> %x, i32 3180 %y0 = extractelement <4 x i32> %y, i32 0181 %y1 = extractelement <4 x i32> %y, i32 1182 %y2 = extractelement <4 x i32> %y, i32 2183 %y3 = extractelement <4 x i32> %y, i32 3184 %cmp3wrong = icmp slt i32 %x3, %y3185 %cmp0 = icmp sgt i32 %x0, %y0186 %cmp1 = icmp sgt i32 %x1, %y1187 %cmp2 = icmp sgt i32 %x2, %y2188 %cmp3 = icmp sgt i32 %x3, %y3189 %or03 = or i1 %cmp0, %cmp3190 %or033 = or i1 %or03, %cmp3wrong191 %or0332 = or i1 %or033, %cmp2192 %or03321 = or i1 %or0332, %cmp1193 %r = select i1 %or03321, i32 -1, i32 1194 ret i32 %r195}196