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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s3 4define i32 @test(i32 %mul) {5; CHECK-LABEL: define i32 @test(6; CHECK-SAME: i32 [[MUL:%.*]]) {7; CHECK-NEXT: [[ENTRY:.*:]]8; CHECK-NEXT: [[H:%.*]] = alloca [4 x i32], align 169; CHECK-NEXT: [[ADD:%.*]] = add i32 0, 010; CHECK-NEXT: [[ADD4:%.*]] = add i32 [[ADD]], 011; CHECK-NEXT: [[CALL:%.*]] = tail call i32 @f1(i32 [[ADD4]])12; CHECK-NEXT: [[MUL1:%.*]] = shl i32 0, 113; CHECK-NEXT: [[ADD5:%.*]] = add i32 [[CALL]], [[MUL1]]14; CHECK-NEXT: store i32 [[ADD5]], ptr [[H]], align 1615; CHECK-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr i8, ptr [[H]], i64 416; CHECK-NEXT: [[ADD6:%.*]] = add i32 0, 017; CHECK-NEXT: [[ADD7:%.*]] = add i32 [[ADD6]], [[MUL]]18; CHECK-NEXT: [[ADD9:%.*]] = add i32 [[ADD7]], [[ADD4]]19; CHECK-NEXT: store i32 [[ADD9]], ptr [[ARRAYINIT_ELEMENT]], align 420; CHECK-NEXT: [[ARRAYINIT_ELEMENT10:%.*]] = getelementptr i8, ptr [[H]], i64 821; CHECK-NEXT: [[ADD11:%.*]] = or i32 [[ADD]], 022; CHECK-NEXT: [[ADD12:%.*]] = add i32 [[ADD11]], [[ADD4]]23; CHECK-NEXT: store i32 [[ADD12]], ptr [[ARRAYINIT_ELEMENT10]], align 824; CHECK-NEXT: [[ARRAYINIT_ELEMENT13:%.*]] = getelementptr i8, ptr [[H]], i64 1225; CHECK-NEXT: store i32 0, ptr [[ARRAYINIT_ELEMENT13]], align 426; CHECK-NEXT: ret i32 027;28entry:29 %h = alloca [4 x i32], align 1630 %add = add i32 0, 031 %add4 = add i32 %add, 032 %call = tail call i32 @f1(i32 %add4)33 %mul1 = shl i32 0, 134 %add5 = add i32 %call, %mul135 store i32 %add5, ptr %h, align 1636 %arrayinit.element = getelementptr i8, ptr %h, i64 437 %add6 = add i32 0, 038 %add7 = add i32 %add6, %mul39 %add9 = add i32 %add7, %add440 store i32 %add9, ptr %arrayinit.element, align 441 %arrayinit.element10 = getelementptr i8, ptr %h, i64 842 %add11 = or i32 %add, 043 %add12 = add i32 %add11, %add444 store i32 %add12, ptr %arrayinit.element10, align 845 %arrayinit.element13 = getelementptr i8, ptr %h, i64 1246 store i32 0, ptr %arrayinit.element13, align 447 ret i32 048}49 50declare i32 @f1(i32)51 52