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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=slp-vectorizer,dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7 | FileCheck %s3 4target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"5target triple = "x86_64-apple-macosx10.8.0"6 7define void @main(i1 %arg) {8; CHECK-LABEL: @main(9; CHECK-NEXT: entry:10; CHECK-NEXT: br label [[FOR_BODY:%.*]]11; CHECK: for.body:12; CHECK-NEXT: br label [[FOR_COND4_PREHEADER:%.*]]13; CHECK: for.cond4.preheader:14; CHECK-NEXT: br label [[FOR_BODY6:%.*]]15; CHECK: for.body6:16; CHECK-NEXT: br label [[FOR_BODY12:%.*]]17; CHECK: for.body12:18; CHECK-NEXT: [[FZIMG_069:%.*]] = phi double [ undef, [[FOR_BODY6]] ], [ [[ADD19:%.*]], [[IF_END:%.*]] ]19; CHECK-NEXT: [[FZREAL_068:%.*]] = phi double [ undef, [[FOR_BODY6]] ], [ [[ADD20:%.*]], [[IF_END]] ]20; CHECK-NEXT: [[MUL13:%.*]] = fmul double [[FZREAL_068]], [[FZREAL_068]]21; CHECK-NEXT: [[MUL14:%.*]] = fmul double [[FZIMG_069]], [[FZIMG_069]]22; CHECK-NEXT: [[ADD15:%.*]] = fadd double [[MUL13]], [[MUL14]]23; CHECK-NEXT: [[CMP16:%.*]] = fcmp ogt double [[ADD15]], 4.000000e+0024; CHECK-NEXT: br i1 [[CMP16]], label [[FOR_INC21:%.*]], label [[IF_END]]25; CHECK: if.end:26; CHECK-NEXT: [[MUL18:%.*]] = fmul double undef, [[FZIMG_069]]27; CHECK-NEXT: [[ADD19]] = fadd double undef, [[MUL18]]28; CHECK-NEXT: [[SUB:%.*]] = fsub double [[MUL13]], [[MUL14]]29; CHECK-NEXT: [[ADD20]] = fadd double undef, [[SUB]]30; CHECK-NEXT: br i1 %arg, label [[FOR_BODY12]], label [[FOR_INC21]]31; CHECK: for.inc21:32; CHECK-NEXT: br i1 %arg, label [[FOR_END23:%.*]], label [[FOR_BODY6]]33; CHECK: for.end23:34; CHECK-NEXT: br i1 %arg, label [[IF_THEN25:%.*]], label [[IF_THEN26:%.*]]35; CHECK: if.then25:36; CHECK-NEXT: br i1 %arg, label [[FOR_END44:%.*]], label [[FOR_COND4_PREHEADER]]37; CHECK: if.then26:38; CHECK-NEXT: unreachable39; CHECK: for.end44:40; CHECK-NEXT: br i1 %arg, label [[FOR_END48:%.*]], label [[FOR_BODY]]41; CHECK: for.end48:42; CHECK-NEXT: ret void43;44entry:45 br label %for.body46 47for.body: ; preds = %for.end44, %entry48 br label %for.cond4.preheader49 50for.cond4.preheader: ; preds = %if.then25, %for.body51 br label %for.body652 53for.body6: ; preds = %for.inc21, %for.cond4.preheader54 br label %for.body1255 56for.body12: ; preds = %if.end, %for.body657 %fZImg.069 = phi double [ undef, %for.body6 ], [ %add19, %if.end ]58 %fZReal.068 = phi double [ undef, %for.body6 ], [ %add20, %if.end ]59 %mul13 = fmul double %fZReal.068, %fZReal.06860 %mul14 = fmul double %fZImg.069, %fZImg.06961 %add15 = fadd double %mul13, %mul1462 %cmp16 = fcmp ogt double %add15, 4.000000e+0063 br i1 %cmp16, label %for.inc21, label %if.end64 65if.end: ; preds = %for.body1266 %mul18 = fmul double undef, %fZImg.06967 %add19 = fadd double undef, %mul1868 %sub = fsub double %mul13, %mul1469 %add20 = fadd double undef, %sub70 br i1 %arg, label %for.body12, label %for.inc2171 72for.inc21: ; preds = %if.end, %for.body1273 br i1 %arg, label %for.end23, label %for.body674 75for.end23: ; preds = %for.inc2176 br i1 %arg, label %if.then25, label %if.then2677 78if.then25: ; preds = %for.end2379 br i1 %arg, label %for.end44, label %for.cond4.preheader80 81if.then26: ; preds = %for.end2382 unreachable83 84for.end44: ; preds = %if.then2585 br i1 %arg, label %for.end48, label %for.body86 87for.end48: ; preds = %for.end4488 ret void89}90 91%struct.hoge = type { double, double, double}92 93define void @zot(ptr %arg, i1 %arg2) {94; CHECK-LABEL: @zot(95; CHECK-NEXT: bb:96; CHECK-NEXT: [[TMP:%.*]] = load double, ptr undef, align 897; CHECK-NEXT: [[TMP2:%.*]] = load double, ptr undef, align 898; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_HOGE:%.*]], ptr [[ARG:%.*]], i64 0, i32 199; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> poison, double [[TMP2]], i32 0100; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> [[TMP0]], double [[TMP]], i32 1101; CHECK-NEXT: [[TMP2:%.*]] = fsub <2 x double> [[TMP1]], undef102; CHECK-NEXT: [[TMP3:%.*]] = fmul <2 x double> [[TMP2]], undef103; CHECK-NEXT: [[TMP4:%.*]] = fsub <2 x double> [[TMP3]], undef104; CHECK-NEXT: store <2 x double> [[TMP4]], ptr [[TMP7]], align 8105; CHECK-NEXT: br i1 %arg2, label [[BB11:%.*]], label [[BB12:%.*]]106; CHECK: bb11:107; CHECK-NEXT: br label [[BB14:%.*]]108; CHECK: bb12:109; CHECK-NEXT: br label [[BB14]]110; CHECK: bb14:111; CHECK-NEXT: ret void112;113bb:114 %tmp = load double, ptr undef, align 8115 %tmp1 = fsub double %tmp, undef116 %tmp2 = load double, ptr undef, align 8117 %tmp3 = fsub double %tmp2, undef118 %tmp4 = fmul double %tmp3, undef119 %tmp5 = fmul double %tmp3, undef120 %tmp6 = fsub double %tmp5, undef121 %tmp7 = getelementptr inbounds %struct.hoge, ptr %arg, i64 0, i32 1122 store double %tmp6, ptr %tmp7, align 8123 %tmp8 = fmul double %tmp1, undef124 %tmp9 = fsub double %tmp8, undef125 %tmp10 = getelementptr inbounds %struct.hoge, ptr %arg, i64 0, i32 2126 store double %tmp9, ptr %tmp10, align 8127 br i1 %arg2, label %bb11, label %bb12128 129bb11: ; preds = %bb130 br label %bb14131 132bb12: ; preds = %bb133 %tmp13 = fmul double undef, %tmp2134 br label %bb14135 136bb14: ; preds = %bb12, %bb11137 ret void138}139 140 141%struct.rc4_state.0.24 = type { i32, i32, [256 x i32] }142 143define void @rc4_crypt(ptr nocapture %s, i1 %arg) {144; CHECK-LABEL: @rc4_crypt(145; CHECK-NEXT: entry:146; CHECK-NEXT: [[Y2:%.*]] = getelementptr inbounds [[STRUCT_RC4_STATE_0_24:%.*]], ptr [[S:%.*]], i64 0, i32 1147; CHECK-NEXT: br i1 %arg, label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]148; CHECK: for.body:149; CHECK-NEXT: [[CONV4:%.*]] = and i32 undef, 255150; CHECK-NEXT: [[CONV7:%.*]] = and i32 undef, 255151; CHECK-NEXT: br i1 %arg, label [[FOR_END]], label [[FOR_BODY]]152; CHECK: for.end:153; CHECK-NEXT: [[X_0_LCSSA:%.*]] = phi i32 [ undef, [[ENTRY:%.*]] ], [ [[CONV4]], [[FOR_BODY]] ]154; CHECK-NEXT: [[Y_0_LCSSA:%.*]] = phi i32 [ undef, [[ENTRY]] ], [ [[CONV7]], [[FOR_BODY]] ]155; CHECK-NEXT: store i32 [[X_0_LCSSA]], ptr [[S]], align 4156; CHECK-NEXT: store i32 [[Y_0_LCSSA]], ptr [[Y2]], align 4157; CHECK-NEXT: ret void158;159entry:160 %y2 = getelementptr inbounds %struct.rc4_state.0.24, ptr %s, i64 0, i32 1161 br i1 %arg, label %for.body, label %for.end162 163for.body: ; preds = %for.body, %entry164 %x.045 = phi i32 [ %conv4, %for.body ], [ undef, %entry ]165 %conv4 = and i32 undef, 255166 %conv7 = and i32 undef, 255167 %idxprom842 = zext i32 %conv7 to i64168 br i1 %arg, label %for.end, label %for.body169 170for.end: ; preds = %for.body, %entry171 %x.0.lcssa = phi i32 [ undef, %entry ], [ %conv4, %for.body ]172 %y.0.lcssa = phi i32 [ undef, %entry ], [ %conv7, %for.body ]173 store i32 %x.0.lcssa, ptr %s, align 4174 store i32 %y.0.lcssa, ptr %y2, align 4175 ret void176}177 178