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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=slp-vectorizer,dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7 | FileCheck %s3 4target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"5target triple = "x86_64-apple-macosx10.8.0"6 7%struct.DState = type { i32, i32 }8 9@b = common global %struct.DState zeroinitializer, align 410@d = common global i32 0, align 411@c = common global i32 0, align 412@a = common global i32 0, align 413@e = common global i32 0, align 414 15define i32 @fn1() {16; CHECK-LABEL: @fn1(17; CHECK-NEXT: entry:18; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i32>, ptr @b, align 419; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @d, align 420; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[TMP1]], 021; CHECK-NEXT: br i1 [[COND]], label [[SW_BB:%.*]], label [[SAVE_STATE_AND_RETURN:%.*]]22; CHECK: sw.bb:23; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr @c, align 424; CHECK-NEXT: [[AND:%.*]] = and i32 [[TMP2]], 725; CHECK-NEXT: store i32 [[AND]], ptr @a, align 426; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <2 x i32> [[TMP0]], <2 x i32> <i32 poison, i32 0>, <2 x i32> <i32 0, i32 3>27; CHECK-NEXT: switch i32 [[AND]], label [[IF_END:%.*]] [28; CHECK-NEXT: i32 7, label [[SAVE_STATE_AND_RETURN]]29; CHECK-NEXT: i32 0, label [[SAVE_STATE_AND_RETURN]]30; CHECK-NEXT: ]31; CHECK: if.end:32; CHECK-NEXT: br label [[SAVE_STATE_AND_RETURN]]33; CHECK: save_state_and_return:34; CHECK-NEXT: [[TMP4:%.*]] = phi <2 x i32> [ zeroinitializer, [[IF_END]] ], [ [[TMP0]], [[ENTRY:%.*]] ], [ [[TMP3]], [[SW_BB]] ], [ [[TMP3]], [[SW_BB]] ]35; CHECK-NEXT: store <2 x i32> [[TMP4]], ptr @b, align 436; CHECK-NEXT: ret i32 undef37;38entry:39 %0 = load i32, ptr @b, align 440 %1 = load i32, ptr getelementptr inbounds (%struct.DState, ptr @b, i32 0, i32 1), align 441 %2 = load i32, ptr @d, align 442 %cond = icmp eq i32 %2, 043 br i1 %cond, label %sw.bb, label %save_state_and_return44 45sw.bb: ; preds = %entry46 %3 = load i32, ptr @c, align 447 %and = and i32 %3, 748 store i32 %and, ptr @a, align 449 switch i32 %and, label %if.end [50 i32 7, label %save_state_and_return51 i32 0, label %save_state_and_return52 ]53 54if.end: ; preds = %sw.bb55 br label %save_state_and_return56 57save_state_and_return: ; preds = %sw.bb, %sw.bb, %if.end, %entry58 %t.0 = phi i32 [ 0, %if.end ], [ %0, %entry ], [ %0, %sw.bb ], [ %0, %sw.bb ]59 %f.0 = phi i32 [ 0, %if.end ], [ %1, %entry ], [ 0, %sw.bb ], [ 0, %sw.bb ]60 store i32 %t.0, ptr @b, align 461 store i32 %f.0, ptr getelementptr inbounds (%struct.DState, ptr @b, i32 0, i32 1), align 462 ret i32 undef63}64 65