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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=slp-vectorizer,dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7 | FileCheck %s3 4%struct.Ray = type { %struct.Vec, %struct.Vec }5%struct.Vec = type { double, double, double }6 7define void @main(i1 %arg) {8; CHECK-LABEL: @main(9; CHECK-NEXT: entry:10; CHECK-NEXT: br i1 %arg, label [[COND_TRUE:%.*]], label [[COND_END:%.*]]11; CHECK: cond.true:12; CHECK-NEXT: unreachable13; CHECK: cond.end:14; CHECK-NEXT: br label [[INVOKE_CONT:%.*]]15; CHECK: invoke.cont:16; CHECK-NEXT: br i1 %arg, label [[ARRAYCTOR_CONT:%.*]], label [[INVOKE_CONT]]17; CHECK: arrayctor.cont:18; CHECK-NEXT: [[AGG_TMP101211_SROA_0_0_IDX:%.*]] = getelementptr inbounds [[STRUCT_RAY:%.*]], ptr undef, i64 0, i32 1, i32 019; CHECK-NEXT: br label [[FOR_COND36_PREHEADER:%.*]]20; CHECK: for.cond36.preheader:21; CHECK-NEXT: br i1 %arg, label [[FOR_BODY42_LR_PH_US:%.*]], label [[_Z5CLAMPD_EXIT_1:%.*]]22; CHECK: cond.false51.us:23; CHECK-NEXT: unreachable24; CHECK: cond.true48.us:25; CHECK-NEXT: br i1 %arg, label [[COND_TRUE63_US:%.*]], label [[COND_FALSE66_US:%.*]]26; CHECK: cond.false66.us:27; CHECK-NEXT: [[ADD_I276_US:%.*]] = fadd double 0.000000e+00, 0x3EB0C6F7A0B5ED8D28; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> <double poison, double 0xBFA5CC2D1960285F>, double [[ADD_I276_US]], i32 029; CHECK-NEXT: [[TMP1:%.*]] = fadd <2 x double> <double 0.000000e+00, double 1.000000e-01>, [[TMP0]]30; CHECK-NEXT: [[TMP2:%.*]] = fmul <2 x double> [[TMP1]], splat (double 1.400000e+02)31; CHECK-NEXT: [[TMP3:%.*]] = fadd <2 x double> [[TMP2]], <double 5.000000e+01, double 5.200000e+01>32; CHECK-NEXT: store <2 x double> [[TMP3]], ptr undef, align 833; CHECK-NEXT: [[TMP4:%.*]] = fmul <2 x double> <double 2.000000e-01, double 3.000000e-01>, [[TMP1]]34; CHECK-NEXT: store <2 x double> [[TMP4]], ptr [[AGG_TMP101211_SROA_0_0_IDX]], align 835; CHECK-NEXT: ret void36; CHECK: cond.true63.us:37; CHECK-NEXT: unreachable38; CHECK: for.body42.lr.ph.us:39; CHECK-NEXT: br i1 %arg, label [[COND_TRUE48_US:%.*]], label [[COND_FALSE51_US:%.*]]40; CHECK: _Z5clampd.exit.1:41; CHECK-NEXT: br label [[FOR_COND36_PREHEADER]]42;43entry:44 br i1 %arg, label %cond.true, label %cond.end45 46cond.true:47 unreachable48 49cond.end:50 br label %invoke.cont51 52invoke.cont:53 br i1 %arg, label %arrayctor.cont, label %invoke.cont54 55arrayctor.cont:56 %agg.tmp99208.sroa.1.8.idx388 = getelementptr inbounds %struct.Ray, ptr undef, i64 0, i32 0, i32 157 %agg.tmp101211.sroa.0.0.idx = getelementptr inbounds %struct.Ray, ptr undef, i64 0, i32 1, i32 058 %agg.tmp101211.sroa.1.8.idx390 = getelementptr inbounds %struct.Ray, ptr undef, i64 0, i32 1, i32 159 br label %for.cond36.preheader60 61for.cond36.preheader:62 br i1 %arg, label %for.body42.lr.ph.us, label %_Z5clampd.exit.163 64cond.false51.us:65 unreachable66 67cond.true48.us:68 br i1 %arg, label %cond.true63.us, label %cond.false66.us69 70cond.false66.us:71 %add.i276.us = fadd double 0.000000e+00, 0.000001e+0072 %add.i264.us = fadd double %add.i276.us, 0.000000e+0073 %add4.i267.us = fadd double 0.1e+00, 0xBFA5CC2D1960285F74 %mul.i254.us = fmul double %add.i264.us, 1.400000e+0275 %mul2.i256.us = fmul double %add4.i267.us, 1.400000e+0276 %add.i243.us = fadd double %mul.i254.us, 5.000000e+0177 %add4.i246.us = fadd double %mul2.i256.us, 5.200000e+0178 %mul.i.i.us = fmul double 0.2e+00, %add.i264.us79 %mul2.i.i.us = fmul double 0.3e+00, %add4.i267.us80 store double %add.i243.us, ptr undef, align 881 store double %add4.i246.us, ptr %agg.tmp99208.sroa.1.8.idx388, align 882 store double %mul.i.i.us, ptr %agg.tmp101211.sroa.0.0.idx, align 883 store double %mul2.i.i.us, ptr %agg.tmp101211.sroa.1.8.idx390, align 884 ret void85 86cond.true63.us:87 unreachable88 89for.body42.lr.ph.us:90 br i1 %arg, label %cond.true48.us, label %cond.false51.us91 92_Z5clampd.exit.1:93 br label %for.cond36.preheader94}95 96define void @test(i1 %arg) {97; CHECK-LABEL: @test(98; CHECK-NEXT: entry:99; CHECK-NEXT: br i1 %arg, label [[IF_THEN78:%.*]], label [[IF_THEN38:%.*]]100; CHECK: if.then38:101; CHECK-NEXT: [[AGG_TMP74663_SROA_0_0_IDX:%.*]] = getelementptr inbounds [[STRUCT_RAY:%.*]], ptr undef, i64 0, i32 1, i32 0102; CHECK-NEXT: store <2 x double> <double 0x3FFA356C1D8A7F76, double 0x3FFDC4F38B38BEF4>, ptr [[AGG_TMP74663_SROA_0_0_IDX]], align 8103; CHECK-NEXT: br label [[IF_THEN78]]104; CHECK: if.then78:105; CHECK-NEXT: ret void106;107entry:108 br i1 %arg, label %if.then78, label %if.then38109 110if.then38:111 %mul.i.i790 = fmul double 0.0, 0.1112 %mul3.i.i792 = fmul double 0.2, 0.3113 %mul.i764 = fmul double 0.4, %mul3.i.i792114 %mul4.i767 = fmul double 0.5, 0.6115 %sub.i768 = fsub double %mul.i764, %mul4.i767116 %mul6.i770 = fmul double 0.7, %mul.i.i790117 %mul9.i772 = fmul double 0.8, %mul3.i.i792118 %sub10.i773 = fsub double %mul6.i770, %mul9.i772119 %mul.i736 = fmul double 0.9, %sub.i768120 %mul2.i738 = fmul double 0.91, %sub10.i773121 %mul.i727 = fmul double 0.92, %mul.i736122 %mul2.i729 = fmul double 0.93, %mul2.i738123 %add.i716 = fadd double 0.94, %mul.i727124 %add4.i719 = fadd double 0.95, %mul2.i729125 %add.i695 = fadd double 0.96, %add.i716126 %add4.i698 = fadd double 0.97, %add4.i719127 %mul.i.i679 = fmul double 0.98, %add.i695128 %mul2.i.i680 = fmul double 0.99, %add4.i698129 %agg.tmp74663.sroa.0.0.idx = getelementptr inbounds %struct.Ray, ptr undef, i64 0, i32 1, i32 0130 store double %mul.i.i679, ptr %agg.tmp74663.sroa.0.0.idx, align 8131 %agg.tmp74663.sroa.1.8.idx943 = getelementptr inbounds %struct.Ray, ptr undef, i64 0, i32 1, i32 1132 store double %mul2.i.i680, ptr %agg.tmp74663.sroa.1.8.idx943, align 8133 br label %if.then78134 135if.then78:136 ret void137}138 139