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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=slp-vectorizer,dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s3 4target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"5target triple = "x86_64-apple-macosx10.8.0"6 7; int foo(ptr A, ptr B, int g) {8; float B0 = B[0];9; float B1 = B[1]; <----- BasicBlock #110; B0 += 5;11; B1 += 8;12;13; if (g) bar();14;15; A[0] += B0; <------- BasicBlock #316; A[1] += B1;17; }18 19 20define i32 @foo(ptr nocapture %A, ptr nocapture %B, i32 %g) {21; CHECK-LABEL: @foo(22; CHECK-NEXT: entry:23; CHECK-NEXT: [[TMP1:%.*]] = load <2 x float>, ptr [[B:%.*]], align 424; CHECK-NEXT: [[TMP2:%.*]] = fadd <2 x float> [[TMP1]], <float 5.000000e+00, float 8.000000e+00>25; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[G:%.*]], 026; CHECK-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]27; CHECK: if.then:28; CHECK-NEXT: [[CALL:%.*]] = tail call i32 (...) @bar()29; CHECK-NEXT: br label [[IF_END]]30; CHECK: if.end:31; CHECK-NEXT: [[TMP3:%.*]] = fpext <2 x float> [[TMP2]] to <2 x double>32; CHECK-NEXT: [[TMP5:%.*]] = load <2 x double>, ptr [[A:%.*]], align 833; CHECK-NEXT: [[TMP6:%.*]] = fadd <2 x double> [[TMP3]], [[TMP5]]34; CHECK-NEXT: store <2 x double> [[TMP6]], ptr [[A]], align 835; CHECK-NEXT: ret i32 undef36;37entry:38 %0 = load float, ptr %B, align 439 %arrayidx1 = getelementptr inbounds float, ptr %B, i64 140 %1 = load float, ptr %arrayidx1, align 441 %add = fadd float %0, 5.000000e+0042 %add2 = fadd float %1, 8.000000e+0043 %tobool = icmp eq i32 %g, 044 br i1 %tobool, label %if.end, label %if.then45 46if.then:47 %call = tail call i32 (...) @bar()48 br label %if.end49 50if.end:51 %conv = fpext float %add to double52 %2 = load double, ptr %A, align 853 %add4 = fadd double %conv, %254 store double %add4, ptr %A, align 855 %conv5 = fpext float %add2 to double56 %arrayidx6 = getelementptr inbounds double, ptr %A, i64 157 %3 = load double, ptr %arrayidx6, align 858 %add7 = fadd double %conv5, %359 store double %add7, ptr %arrayidx6, align 860 ret i32 undef61}62 63declare i32 @bar(...)64