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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s3 4define i32 @test(ptr %c, i16 %a, i16 %0) {5; CHECK-LABEL: define i32 @test(6; CHECK-SAME: ptr [[C:%.*]], i16 [[A:%.*]], i16 [[TMP0:%.*]]) {7; CHECK-NEXT:  [[ENTRY:.*:]]8; CHECK-NEXT:    [[TMP1:%.*]] = insertelement <4 x i16> poison, i16 [[A]], i32 09; CHECK-NEXT:    [[TMP2:%.*]] = shufflevector <4 x i16> [[TMP1]], <4 x i16> poison, <4 x i32> zeroinitializer10; CHECK-NEXT:    [[TMP3:%.*]] = icmp ne <4 x i16> [[TMP2]], zeroinitializer11; CHECK-NEXT:    [[TMP16:%.*]] = zext <4 x i1> [[TMP3]] to <4 x i8>12; CHECK-NEXT:    [[TMP5:%.*]] = shufflevector <4 x i16> [[TMP2]], <4 x i16> poison, <2 x i32> <i32 poison, i32 0>13; CHECK-NEXT:    [[TMP6:%.*]] = insertelement <2 x i16> [[TMP5]], i16 [[TMP0]], i32 014; CHECK-NEXT:    [[TMP7:%.*]] = shufflevector <2 x i16> [[TMP6]], <2 x i16> poison, <4 x i32> <i32 0, i32 0, i32 0, i32 1>15; CHECK-NEXT:    [[TMP4:%.*]] = zext <4 x i8> [[TMP16]] to <4 x i16>16; CHECK-NEXT:    [[TMP8:%.*]] = icmp ugt <4 x i16> [[TMP7]], [[TMP4]]17; CHECK-NEXT:    [[TMP9:%.*]] = icmp ult i16 [[A]], -218; CHECK-NEXT:    [[TMP10:%.*]] = shufflevector <4 x i1> [[TMP3]], <4 x i1> poison, <8 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 0, i32 1, i32 2, i32 poison>19; CHECK-NEXT:    [[TMP11:%.*]] = insertelement <8 x i1> [[TMP10]], i1 [[TMP9]], i32 720; CHECK-NEXT:    [[TMP17:%.*]] = shufflevector <4 x i1> [[TMP8]], <4 x i1> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>21; CHECK-NEXT:    [[TMP12:%.*]] = shufflevector <8 x i1> [[TMP11]], <8 x i1> [[TMP17]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7>22; CHECK-NEXT:    [[TMP13:%.*]] = freeze <8 x i1> [[TMP12]]23; CHECK-NEXT:    [[TMP14:%.*]] = call i1 @llvm.vector.reduce.and.v8i1(<8 x i1> [[TMP13]])24; CHECK-NEXT:    [[TMP15:%.*]] = zext i1 [[TMP14]] to i3225; CHECK-NEXT:    store i32 [[TMP15]], ptr [[C]], align 426; CHECK-NEXT:    ret i32 027;28entry:29  %tobool = icmp ne i16 %a, 030  %1 = zext i1 %tobool to i1631  %cmp3 = icmp ugt i16 %0, %132  %2 = and i1 %tobool, %cmp333  %tobool.1 = icmp ne i16 %a, 034  %3 = zext i1 %tobool.1 to i1635  %cmp3.1 = icmp ugt i16 %0, %336  %4 = and i1 %tobool.1, %cmp3.137  %5 = select i1 %2, i1 %4, i1 false38  %tobool.2 = icmp ne i16 %a, 039  %6 = zext i1 %tobool.2 to i1640  %cmp3.2 = icmp ugt i16 %0, %641  %7 = and i1 %tobool.2, %cmp3.242  %8 = select i1 %5, i1 %7, i1 false43  %tobool.3 = icmp ne i16 %a, 044  %9 = zext i1 %tobool.3 to i1645  %cmp3.3 = icmp ugt i16 %a, %946  %10 = icmp ult i16 %a, -247  %11 = and i1 %10, %cmp3.348  %12 = select i1 %8, i1 %11, i1 false49  %13 = zext i1 %12 to i3250  store i32 %13, ptr %c, align 451  ret i32 052}53