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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -mtriple=x86_64-unknown -passes=slp-vectorizer -S | FileCheck %s --check-prefix=CHECK --check-prefix=SSE3; RUN: opt < %s -mtriple=x86_64-unknown -mcpu=corei7-avx -passes=slp-vectorizer -S | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=AVX256NODQ4; RUN: opt < %s -mtriple=x86_64-unknown -mcpu=bdver1 -passes=slp-vectorizer -S | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=AVX256NODQ5; RUN: opt < %s -mtriple=x86_64-unknown -mcpu=core-avx2 -passes=slp-vectorizer -S | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=AVX256NODQ6; RUN: opt < %s -mtriple=x86_64-unknown -mcpu=skylake-avx512 -mattr=-prefer-256-bit -passes=slp-vectorizer -S | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=AVX5127; RUN: opt < %s -mtriple=x86_64-unknown -mcpu=skylake-avx512 -mattr=+prefer-256-bit -passes=slp-vectorizer -S | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=AVX256DQ8 9target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"10 11@src64 = common global [8 x double] zeroinitializer, align 6412@src32 = common global [16 x float] zeroinitializer, align 6413@dst64 = common global [8 x i64] zeroinitializer, align 6414@dst32 = common global [16 x i32] zeroinitializer, align 6415@dst16 = common global [32 x i16] zeroinitializer, align 6416@dst8 = common global [64 x i8] zeroinitializer, align 6417 18;19; FPTOSI vXf6420;21 22define void @fptosi_8f64_8i64() #0 {23; SSE-LABEL: @fptosi_8f64_8i64(24; SSE-NEXT: [[A0:%.*]] = load double, ptr @src64, align 825; SSE-NEXT: [[A1:%.*]] = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 1), align 826; SSE-NEXT: [[A2:%.*]] = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 2), align 827; SSE-NEXT: [[A3:%.*]] = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 3), align 828; SSE-NEXT: [[A4:%.*]] = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 4), align 829; SSE-NEXT: [[A5:%.*]] = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 5), align 830; SSE-NEXT: [[A6:%.*]] = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 6), align 831; SSE-NEXT: [[A7:%.*]] = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 7), align 832; SSE-NEXT: [[CVT0:%.*]] = fptosi double [[A0]] to i6433; SSE-NEXT: [[CVT1:%.*]] = fptosi double [[A1]] to i6434; SSE-NEXT: [[CVT2:%.*]] = fptosi double [[A2]] to i6435; SSE-NEXT: [[CVT3:%.*]] = fptosi double [[A3]] to i6436; SSE-NEXT: [[CVT4:%.*]] = fptosi double [[A4]] to i6437; SSE-NEXT: [[CVT5:%.*]] = fptosi double [[A5]] to i6438; SSE-NEXT: [[CVT6:%.*]] = fptosi double [[A6]] to i6439; SSE-NEXT: [[CVT7:%.*]] = fptosi double [[A7]] to i6440; SSE-NEXT: store i64 [[CVT0]], ptr @dst64, align 841; SSE-NEXT: store i64 [[CVT1]], ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 1), align 842; SSE-NEXT: store i64 [[CVT2]], ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 2), align 843; SSE-NEXT: store i64 [[CVT3]], ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 3), align 844; SSE-NEXT: store i64 [[CVT4]], ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 4), align 845; SSE-NEXT: store i64 [[CVT5]], ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 5), align 846; SSE-NEXT: store i64 [[CVT6]], ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 6), align 847; SSE-NEXT: store i64 [[CVT7]], ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 7), align 848; SSE-NEXT: ret void49;50; AVX256NODQ-LABEL: @fptosi_8f64_8i64(51; AVX256NODQ-NEXT: [[A0:%.*]] = load double, ptr @src64, align 852; AVX256NODQ-NEXT: [[A1:%.*]] = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 1), align 853; AVX256NODQ-NEXT: [[A2:%.*]] = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 2), align 854; AVX256NODQ-NEXT: [[A3:%.*]] = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 3), align 855; AVX256NODQ-NEXT: [[A4:%.*]] = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 4), align 856; AVX256NODQ-NEXT: [[A5:%.*]] = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 5), align 857; AVX256NODQ-NEXT: [[A6:%.*]] = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 6), align 858; AVX256NODQ-NEXT: [[A7:%.*]] = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 7), align 859; AVX256NODQ-NEXT: [[CVT0:%.*]] = fptosi double [[A0]] to i6460; AVX256NODQ-NEXT: [[CVT1:%.*]] = fptosi double [[A1]] to i6461; AVX256NODQ-NEXT: [[CVT2:%.*]] = fptosi double [[A2]] to i6462; AVX256NODQ-NEXT: [[CVT3:%.*]] = fptosi double [[A3]] to i6463; AVX256NODQ-NEXT: [[CVT4:%.*]] = fptosi double [[A4]] to i6464; AVX256NODQ-NEXT: [[CVT5:%.*]] = fptosi double [[A5]] to i6465; AVX256NODQ-NEXT: [[CVT6:%.*]] = fptosi double [[A6]] to i6466; AVX256NODQ-NEXT: [[CVT7:%.*]] = fptosi double [[A7]] to i6467; AVX256NODQ-NEXT: store i64 [[CVT0]], ptr @dst64, align 868; AVX256NODQ-NEXT: store i64 [[CVT1]], ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 1), align 869; AVX256NODQ-NEXT: store i64 [[CVT2]], ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 2), align 870; AVX256NODQ-NEXT: store i64 [[CVT3]], ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 3), align 871; AVX256NODQ-NEXT: store i64 [[CVT4]], ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 4), align 872; AVX256NODQ-NEXT: store i64 [[CVT5]], ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 5), align 873; AVX256NODQ-NEXT: store i64 [[CVT6]], ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 6), align 874; AVX256NODQ-NEXT: store i64 [[CVT7]], ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 7), align 875; AVX256NODQ-NEXT: ret void76;77; AVX512-LABEL: @fptosi_8f64_8i64(78; AVX512-NEXT: [[TMP1:%.*]] = load <8 x double>, ptr @src64, align 879; AVX512-NEXT: [[TMP2:%.*]] = fptosi <8 x double> [[TMP1]] to <8 x i64>80; AVX512-NEXT: store <8 x i64> [[TMP2]], ptr @dst64, align 881; AVX512-NEXT: ret void82;83; AVX256DQ-LABEL: @fptosi_8f64_8i64(84; AVX256DQ-NEXT: [[TMP1:%.*]] = load <4 x double>, ptr @src64, align 885; AVX256DQ-NEXT: [[TMP2:%.*]] = fptosi <4 x double> [[TMP1]] to <4 x i64>86; AVX256DQ-NEXT: store <4 x i64> [[TMP2]], ptr @dst64, align 887; AVX256DQ-NEXT: [[TMP3:%.*]] = load <4 x double>, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 4), align 888; AVX256DQ-NEXT: [[TMP4:%.*]] = fptosi <4 x double> [[TMP3]] to <4 x i64>89; AVX256DQ-NEXT: store <4 x i64> [[TMP4]], ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 4), align 890; AVX256DQ-NEXT: ret void91;92 %a0 = load double, ptr @src64, align 893 %a1 = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 1), align 894 %a2 = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 2), align 895 %a3 = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 3), align 896 %a4 = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 4), align 897 %a5 = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 5), align 898 %a6 = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 6), align 899 %a7 = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 7), align 8100 %cvt0 = fptosi double %a0 to i64101 %cvt1 = fptosi double %a1 to i64102 %cvt2 = fptosi double %a2 to i64103 %cvt3 = fptosi double %a3 to i64104 %cvt4 = fptosi double %a4 to i64105 %cvt5 = fptosi double %a5 to i64106 %cvt6 = fptosi double %a6 to i64107 %cvt7 = fptosi double %a7 to i64108 store i64 %cvt0, ptr @dst64, align 8109 store i64 %cvt1, ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 1), align 8110 store i64 %cvt2, ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 2), align 8111 store i64 %cvt3, ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 3), align 8112 store i64 %cvt4, ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 4), align 8113 store i64 %cvt5, ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 5), align 8114 store i64 %cvt6, ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 6), align 8115 store i64 %cvt7, ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 7), align 8116 ret void117}118 119define void @fptosi_8f64_8i32() #0 {120; SSE-LABEL: @fptosi_8f64_8i32(121; SSE-NEXT: [[TMP1:%.*]] = load <4 x double>, ptr @src64, align 8122; SSE-NEXT: [[TMP2:%.*]] = fptosi <4 x double> [[TMP1]] to <4 x i32>123; SSE-NEXT: store <4 x i32> [[TMP2]], ptr @dst32, align 4124; SSE-NEXT: [[TMP3:%.*]] = load <4 x double>, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 4), align 8125; SSE-NEXT: [[TMP4:%.*]] = fptosi <4 x double> [[TMP3]] to <4 x i32>126; SSE-NEXT: store <4 x i32> [[TMP4]], ptr getelementptr inbounds ([16 x i32], ptr @dst32, i32 0, i64 4), align 4127; SSE-NEXT: ret void128;129; AVX-LABEL: @fptosi_8f64_8i32(130; AVX-NEXT: [[TMP1:%.*]] = load <8 x double>, ptr @src64, align 8131; AVX-NEXT: [[TMP2:%.*]] = fptosi <8 x double> [[TMP1]] to <8 x i32>132; AVX-NEXT: store <8 x i32> [[TMP2]], ptr @dst32, align 4133; AVX-NEXT: ret void134;135 %a0 = load double, ptr @src64, align 8136 %a1 = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 1), align 8137 %a2 = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 2), align 8138 %a3 = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 3), align 8139 %a4 = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 4), align 8140 %a5 = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 5), align 8141 %a6 = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 6), align 8142 %a7 = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 7), align 8143 %cvt0 = fptosi double %a0 to i32144 %cvt1 = fptosi double %a1 to i32145 %cvt2 = fptosi double %a2 to i32146 %cvt3 = fptosi double %a3 to i32147 %cvt4 = fptosi double %a4 to i32148 %cvt5 = fptosi double %a5 to i32149 %cvt6 = fptosi double %a6 to i32150 %cvt7 = fptosi double %a7 to i32151 store i32 %cvt0, ptr @dst32, align 4152 store i32 %cvt1, ptr getelementptr inbounds ([16 x i32], ptr @dst32, i32 0, i64 1), align 4153 store i32 %cvt2, ptr getelementptr inbounds ([16 x i32], ptr @dst32, i32 0, i64 2), align 4154 store i32 %cvt3, ptr getelementptr inbounds ([16 x i32], ptr @dst32, i32 0, i64 3), align 4155 store i32 %cvt4, ptr getelementptr inbounds ([16 x i32], ptr @dst32, i32 0, i64 4), align 4156 store i32 %cvt5, ptr getelementptr inbounds ([16 x i32], ptr @dst32, i32 0, i64 5), align 4157 store i32 %cvt6, ptr getelementptr inbounds ([16 x i32], ptr @dst32, i32 0, i64 6), align 4158 store i32 %cvt7, ptr getelementptr inbounds ([16 x i32], ptr @dst32, i32 0, i64 7), align 4159 ret void160}161 162define void @fptosi_8f64_8i16() #0 {163; CHECK-LABEL: @fptosi_8f64_8i16(164; CHECK-NEXT: [[TMP1:%.*]] = load <8 x double>, ptr @src64, align 8165; CHECK-NEXT: [[TMP2:%.*]] = fptosi <8 x double> [[TMP1]] to <8 x i16>166; CHECK-NEXT: store <8 x i16> [[TMP2]], ptr @dst16, align 2167; CHECK-NEXT: ret void168;169 %a0 = load double, ptr @src64, align 8170 %a1 = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 1), align 8171 %a2 = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 2), align 8172 %a3 = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 3), align 8173 %a4 = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 4), align 8174 %a5 = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 5), align 8175 %a6 = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 6), align 8176 %a7 = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 7), align 8177 %cvt0 = fptosi double %a0 to i16178 %cvt1 = fptosi double %a1 to i16179 %cvt2 = fptosi double %a2 to i16180 %cvt3 = fptosi double %a3 to i16181 %cvt4 = fptosi double %a4 to i16182 %cvt5 = fptosi double %a5 to i16183 %cvt6 = fptosi double %a6 to i16184 %cvt7 = fptosi double %a7 to i16185 store i16 %cvt0, ptr @dst16, align 2186 store i16 %cvt1, ptr getelementptr inbounds ([32 x i16], ptr @dst16, i32 0, i64 1), align 2187 store i16 %cvt2, ptr getelementptr inbounds ([32 x i16], ptr @dst16, i32 0, i64 2), align 2188 store i16 %cvt3, ptr getelementptr inbounds ([32 x i16], ptr @dst16, i32 0, i64 3), align 2189 store i16 %cvt4, ptr getelementptr inbounds ([32 x i16], ptr @dst16, i32 0, i64 4), align 2190 store i16 %cvt5, ptr getelementptr inbounds ([32 x i16], ptr @dst16, i32 0, i64 5), align 2191 store i16 %cvt6, ptr getelementptr inbounds ([32 x i16], ptr @dst16, i32 0, i64 6), align 2192 store i16 %cvt7, ptr getelementptr inbounds ([32 x i16], ptr @dst16, i32 0, i64 7), align 2193 ret void194}195 196define void @fptosi_8f64_8i8() #0 {197; CHECK-LABEL: @fptosi_8f64_8i8(198; CHECK-NEXT: [[TMP1:%.*]] = load <8 x double>, ptr @src64, align 8199; CHECK-NEXT: [[TMP2:%.*]] = fptosi <8 x double> [[TMP1]] to <8 x i8>200; CHECK-NEXT: store <8 x i8> [[TMP2]], ptr @dst8, align 1201; CHECK-NEXT: ret void202;203 %a0 = load double, ptr @src64, align 8204 %a1 = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 1), align 8205 %a2 = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 2), align 8206 %a3 = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 3), align 8207 %a4 = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 4), align 8208 %a5 = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 5), align 8209 %a6 = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 6), align 8210 %a7 = load double, ptr getelementptr inbounds ([8 x double], ptr @src64, i32 0, i64 7), align 8211 %cvt0 = fptosi double %a0 to i8212 %cvt1 = fptosi double %a1 to i8213 %cvt2 = fptosi double %a2 to i8214 %cvt3 = fptosi double %a3 to i8215 %cvt4 = fptosi double %a4 to i8216 %cvt5 = fptosi double %a5 to i8217 %cvt6 = fptosi double %a6 to i8218 %cvt7 = fptosi double %a7 to i8219 store i8 %cvt0, ptr @dst8, align 1220 store i8 %cvt1, ptr getelementptr inbounds ([64 x i8], ptr @dst8, i32 0, i64 1), align 1221 store i8 %cvt2, ptr getelementptr inbounds ([64 x i8], ptr @dst8, i32 0, i64 2), align 1222 store i8 %cvt3, ptr getelementptr inbounds ([64 x i8], ptr @dst8, i32 0, i64 3), align 1223 store i8 %cvt4, ptr getelementptr inbounds ([64 x i8], ptr @dst8, i32 0, i64 4), align 1224 store i8 %cvt5, ptr getelementptr inbounds ([64 x i8], ptr @dst8, i32 0, i64 5), align 1225 store i8 %cvt6, ptr getelementptr inbounds ([64 x i8], ptr @dst8, i32 0, i64 6), align 1226 store i8 %cvt7, ptr getelementptr inbounds ([64 x i8], ptr @dst8, i32 0, i64 7), align 1227 ret void228}229 230;231; FPTOSI vXf32232;233 234define void @fptosi_8f32_8i64() #0 {235; SSE-LABEL: @fptosi_8f32_8i64(236; SSE-NEXT: [[A0:%.*]] = load float, ptr @src32, align 4237; SSE-NEXT: [[A1:%.*]] = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 1), align 4238; SSE-NEXT: [[A2:%.*]] = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 2), align 4239; SSE-NEXT: [[A3:%.*]] = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 3), align 4240; SSE-NEXT: [[A4:%.*]] = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 4), align 4241; SSE-NEXT: [[A5:%.*]] = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 5), align 4242; SSE-NEXT: [[A6:%.*]] = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 6), align 4243; SSE-NEXT: [[A7:%.*]] = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 7), align 4244; SSE-NEXT: [[CVT0:%.*]] = fptosi float [[A0]] to i64245; SSE-NEXT: [[CVT1:%.*]] = fptosi float [[A1]] to i64246; SSE-NEXT: [[CVT2:%.*]] = fptosi float [[A2]] to i64247; SSE-NEXT: [[CVT3:%.*]] = fptosi float [[A3]] to i64248; SSE-NEXT: [[CVT4:%.*]] = fptosi float [[A4]] to i64249; SSE-NEXT: [[CVT5:%.*]] = fptosi float [[A5]] to i64250; SSE-NEXT: [[CVT6:%.*]] = fptosi float [[A6]] to i64251; SSE-NEXT: [[CVT7:%.*]] = fptosi float [[A7]] to i64252; SSE-NEXT: store i64 [[CVT0]], ptr @dst64, align 8253; SSE-NEXT: store i64 [[CVT1]], ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 1), align 8254; SSE-NEXT: store i64 [[CVT2]], ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 2), align 8255; SSE-NEXT: store i64 [[CVT3]], ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 3), align 8256; SSE-NEXT: store i64 [[CVT4]], ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 4), align 8257; SSE-NEXT: store i64 [[CVT5]], ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 5), align 8258; SSE-NEXT: store i64 [[CVT6]], ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 6), align 8259; SSE-NEXT: store i64 [[CVT7]], ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 7), align 8260; SSE-NEXT: ret void261;262; AVX256NODQ-LABEL: @fptosi_8f32_8i64(263; AVX256NODQ-NEXT: [[A0:%.*]] = load float, ptr @src32, align 4264; AVX256NODQ-NEXT: [[A1:%.*]] = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 1), align 4265; AVX256NODQ-NEXT: [[A2:%.*]] = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 2), align 4266; AVX256NODQ-NEXT: [[A3:%.*]] = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 3), align 4267; AVX256NODQ-NEXT: [[A4:%.*]] = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 4), align 4268; AVX256NODQ-NEXT: [[A5:%.*]] = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 5), align 4269; AVX256NODQ-NEXT: [[A6:%.*]] = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 6), align 4270; AVX256NODQ-NEXT: [[A7:%.*]] = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 7), align 4271; AVX256NODQ-NEXT: [[CVT0:%.*]] = fptosi float [[A0]] to i64272; AVX256NODQ-NEXT: [[CVT1:%.*]] = fptosi float [[A1]] to i64273; AVX256NODQ-NEXT: [[CVT2:%.*]] = fptosi float [[A2]] to i64274; AVX256NODQ-NEXT: [[CVT3:%.*]] = fptosi float [[A3]] to i64275; AVX256NODQ-NEXT: [[CVT4:%.*]] = fptosi float [[A4]] to i64276; AVX256NODQ-NEXT: [[CVT5:%.*]] = fptosi float [[A5]] to i64277; AVX256NODQ-NEXT: [[CVT6:%.*]] = fptosi float [[A6]] to i64278; AVX256NODQ-NEXT: [[CVT7:%.*]] = fptosi float [[A7]] to i64279; AVX256NODQ-NEXT: store i64 [[CVT0]], ptr @dst64, align 8280; AVX256NODQ-NEXT: store i64 [[CVT1]], ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 1), align 8281; AVX256NODQ-NEXT: store i64 [[CVT2]], ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 2), align 8282; AVX256NODQ-NEXT: store i64 [[CVT3]], ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 3), align 8283; AVX256NODQ-NEXT: store i64 [[CVT4]], ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 4), align 8284; AVX256NODQ-NEXT: store i64 [[CVT5]], ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 5), align 8285; AVX256NODQ-NEXT: store i64 [[CVT6]], ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 6), align 8286; AVX256NODQ-NEXT: store i64 [[CVT7]], ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 7), align 8287; AVX256NODQ-NEXT: ret void288;289; AVX512-LABEL: @fptosi_8f32_8i64(290; AVX512-NEXT: [[TMP1:%.*]] = load <8 x float>, ptr @src32, align 4291; AVX512-NEXT: [[TMP2:%.*]] = fptosi <8 x float> [[TMP1]] to <8 x i64>292; AVX512-NEXT: store <8 x i64> [[TMP2]], ptr @dst64, align 8293; AVX512-NEXT: ret void294;295; AVX256DQ-LABEL: @fptosi_8f32_8i64(296; AVX256DQ-NEXT: [[TMP1:%.*]] = load <4 x float>, ptr @src32, align 4297; AVX256DQ-NEXT: [[TMP2:%.*]] = fptosi <4 x float> [[TMP1]] to <4 x i64>298; AVX256DQ-NEXT: store <4 x i64> [[TMP2]], ptr @dst64, align 8299; AVX256DQ-NEXT: [[TMP3:%.*]] = load <4 x float>, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 4), align 4300; AVX256DQ-NEXT: [[TMP4:%.*]] = fptosi <4 x float> [[TMP3]] to <4 x i64>301; AVX256DQ-NEXT: store <4 x i64> [[TMP4]], ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 4), align 8302; AVX256DQ-NEXT: ret void303;304 %a0 = load float, ptr @src32, align 4305 %a1 = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 1), align 4306 %a2 = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 2), align 4307 %a3 = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 3), align 4308 %a4 = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 4), align 4309 %a5 = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 5), align 4310 %a6 = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 6), align 4311 %a7 = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 7), align 4312 %cvt0 = fptosi float %a0 to i64313 %cvt1 = fptosi float %a1 to i64314 %cvt2 = fptosi float %a2 to i64315 %cvt3 = fptosi float %a3 to i64316 %cvt4 = fptosi float %a4 to i64317 %cvt5 = fptosi float %a5 to i64318 %cvt6 = fptosi float %a6 to i64319 %cvt7 = fptosi float %a7 to i64320 store i64 %cvt0, ptr @dst64, align 8321 store i64 %cvt1, ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 1), align 8322 store i64 %cvt2, ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 2), align 8323 store i64 %cvt3, ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 3), align 8324 store i64 %cvt4, ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 4), align 8325 store i64 %cvt5, ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 5), align 8326 store i64 %cvt6, ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 6), align 8327 store i64 %cvt7, ptr getelementptr inbounds ([8 x i64], ptr @dst64, i32 0, i64 7), align 8328 ret void329}330 331define void @fptosi_8f32_8i32() #0 {332; SSE-LABEL: @fptosi_8f32_8i32(333; SSE-NEXT: [[TMP1:%.*]] = load <4 x float>, ptr @src32, align 4334; SSE-NEXT: [[TMP2:%.*]] = fptosi <4 x float> [[TMP1]] to <4 x i32>335; SSE-NEXT: store <4 x i32> [[TMP2]], ptr @dst32, align 4336; SSE-NEXT: [[TMP3:%.*]] = load <4 x float>, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 4), align 4337; SSE-NEXT: [[TMP4:%.*]] = fptosi <4 x float> [[TMP3]] to <4 x i32>338; SSE-NEXT: store <4 x i32> [[TMP4]], ptr getelementptr inbounds ([16 x i32], ptr @dst32, i32 0, i64 4), align 4339; SSE-NEXT: ret void340;341; AVX-LABEL: @fptosi_8f32_8i32(342; AVX-NEXT: [[TMP1:%.*]] = load <8 x float>, ptr @src32, align 4343; AVX-NEXT: [[TMP2:%.*]] = fptosi <8 x float> [[TMP1]] to <8 x i32>344; AVX-NEXT: store <8 x i32> [[TMP2]], ptr @dst32, align 4345; AVX-NEXT: ret void346;347 %a0 = load float, ptr @src32, align 4348 %a1 = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 1), align 4349 %a2 = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 2), align 4350 %a3 = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 3), align 4351 %a4 = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 4), align 4352 %a5 = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 5), align 4353 %a6 = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 6), align 4354 %a7 = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 7), align 4355 %cvt0 = fptosi float %a0 to i32356 %cvt1 = fptosi float %a1 to i32357 %cvt2 = fptosi float %a2 to i32358 %cvt3 = fptosi float %a3 to i32359 %cvt4 = fptosi float %a4 to i32360 %cvt5 = fptosi float %a5 to i32361 %cvt6 = fptosi float %a6 to i32362 %cvt7 = fptosi float %a7 to i32363 store i32 %cvt0, ptr @dst32, align 4364 store i32 %cvt1, ptr getelementptr inbounds ([16 x i32], ptr @dst32, i32 0, i64 1), align 4365 store i32 %cvt2, ptr getelementptr inbounds ([16 x i32], ptr @dst32, i32 0, i64 2), align 4366 store i32 %cvt3, ptr getelementptr inbounds ([16 x i32], ptr @dst32, i32 0, i64 3), align 4367 store i32 %cvt4, ptr getelementptr inbounds ([16 x i32], ptr @dst32, i32 0, i64 4), align 4368 store i32 %cvt5, ptr getelementptr inbounds ([16 x i32], ptr @dst32, i32 0, i64 5), align 4369 store i32 %cvt6, ptr getelementptr inbounds ([16 x i32], ptr @dst32, i32 0, i64 6), align 4370 store i32 %cvt7, ptr getelementptr inbounds ([16 x i32], ptr @dst32, i32 0, i64 7), align 4371 ret void372}373 374define void @fptosi_8f32_8i16() #0 {375; CHECK-LABEL: @fptosi_8f32_8i16(376; CHECK-NEXT: [[TMP1:%.*]] = load <8 x float>, ptr @src32, align 4377; CHECK-NEXT: [[TMP2:%.*]] = fptosi <8 x float> [[TMP1]] to <8 x i16>378; CHECK-NEXT: store <8 x i16> [[TMP2]], ptr @dst16, align 2379; CHECK-NEXT: ret void380;381 %a0 = load float, ptr @src32, align 4382 %a1 = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 1), align 4383 %a2 = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 2), align 4384 %a3 = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 3), align 4385 %a4 = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 4), align 4386 %a5 = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 5), align 4387 %a6 = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 6), align 4388 %a7 = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 7), align 4389 %cvt0 = fptosi float %a0 to i16390 %cvt1 = fptosi float %a1 to i16391 %cvt2 = fptosi float %a2 to i16392 %cvt3 = fptosi float %a3 to i16393 %cvt4 = fptosi float %a4 to i16394 %cvt5 = fptosi float %a5 to i16395 %cvt6 = fptosi float %a6 to i16396 %cvt7 = fptosi float %a7 to i16397 store i16 %cvt0, ptr @dst16, align 2398 store i16 %cvt1, ptr getelementptr inbounds ([32 x i16], ptr @dst16, i32 0, i64 1), align 2399 store i16 %cvt2, ptr getelementptr inbounds ([32 x i16], ptr @dst16, i32 0, i64 2), align 2400 store i16 %cvt3, ptr getelementptr inbounds ([32 x i16], ptr @dst16, i32 0, i64 3), align 2401 store i16 %cvt4, ptr getelementptr inbounds ([32 x i16], ptr @dst16, i32 0, i64 4), align 2402 store i16 %cvt5, ptr getelementptr inbounds ([32 x i16], ptr @dst16, i32 0, i64 5), align 2403 store i16 %cvt6, ptr getelementptr inbounds ([32 x i16], ptr @dst16, i32 0, i64 6), align 2404 store i16 %cvt7, ptr getelementptr inbounds ([32 x i16], ptr @dst16, i32 0, i64 7), align 2405 ret void406}407 408define void @fptosi_8f32_8i8() #0 {409; CHECK-LABEL: @fptosi_8f32_8i8(410; CHECK-NEXT: [[TMP1:%.*]] = load <8 x float>, ptr @src32, align 4411; CHECK-NEXT: [[TMP2:%.*]] = fptosi <8 x float> [[TMP1]] to <8 x i8>412; CHECK-NEXT: store <8 x i8> [[TMP2]], ptr @dst8, align 1413; CHECK-NEXT: ret void414;415 %a0 = load float, ptr @src32, align 4416 %a1 = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 1), align 4417 %a2 = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 2), align 4418 %a3 = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 3), align 4419 %a4 = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 4), align 4420 %a5 = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 5), align 4421 %a6 = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 6), align 4422 %a7 = load float, ptr getelementptr inbounds ([16 x float], ptr @src32, i32 0, i64 7), align 4423 %cvt0 = fptosi float %a0 to i8424 %cvt1 = fptosi float %a1 to i8425 %cvt2 = fptosi float %a2 to i8426 %cvt3 = fptosi float %a3 to i8427 %cvt4 = fptosi float %a4 to i8428 %cvt5 = fptosi float %a5 to i8429 %cvt6 = fptosi float %a6 to i8430 %cvt7 = fptosi float %a7 to i8431 store i8 %cvt0, ptr @dst8, align 1432 store i8 %cvt1, ptr getelementptr inbounds ([64 x i8], ptr @dst8, i32 0, i64 1), align 1433 store i8 %cvt2, ptr getelementptr inbounds ([64 x i8], ptr @dst8, i32 0, i64 2), align 1434 store i8 %cvt3, ptr getelementptr inbounds ([64 x i8], ptr @dst8, i32 0, i64 3), align 1435 store i8 %cvt4, ptr getelementptr inbounds ([64 x i8], ptr @dst8, i32 0, i64 4), align 1436 store i8 %cvt5, ptr getelementptr inbounds ([64 x i8], ptr @dst8, i32 0, i64 5), align 1437 store i8 %cvt6, ptr getelementptr inbounds ([64 x i8], ptr @dst8, i32 0, i64 6), align 1438 store i8 %cvt7, ptr getelementptr inbounds ([64 x i8], ptr @dst8, i32 0, i64 7), align 1439 ret void440}441 442;443; FPTOSI BUILDVECTOR444;445 446define <4 x i32> @fptosi_4xf64_4i32(double %a0, double %a1, double %a2, double %a3) #0 {447; CHECK-LABEL: @fptosi_4xf64_4i32(448; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x double> poison, double [[A0:%.*]], i32 0449; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x double> [[TMP1]], double [[A1:%.*]], i32 1450; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x double> [[TMP2]], double [[A2:%.*]], i32 2451; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x double> [[TMP3]], double [[A3:%.*]], i32 3452; CHECK-NEXT: [[TMP5:%.*]] = fptosi <4 x double> [[TMP4]] to <4 x i32>453; CHECK-NEXT: ret <4 x i32> [[TMP5]]454;455 %cvt0 = fptosi double %a0 to i32456 %cvt1 = fptosi double %a1 to i32457 %cvt2 = fptosi double %a2 to i32458 %cvt3 = fptosi double %a3 to i32459 %res0 = insertelement <4 x i32> undef, i32 %cvt0, i32 0460 %res1 = insertelement <4 x i32> %res0, i32 %cvt1, i32 1461 %res2 = insertelement <4 x i32> %res1, i32 %cvt2, i32 2462 %res3 = insertelement <4 x i32> %res2, i32 %cvt3, i32 3463 ret <4 x i32> %res3464}465 466define <4 x i32> @fptosi_4xf32_4i32(float %a0, float %a1, float %a2, float %a3) #0 {467; CHECK-LABEL: @fptosi_4xf32_4i32(468; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A0:%.*]], i32 0469; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float [[A1:%.*]], i32 1470; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float [[A2:%.*]], i32 2471; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> [[TMP3]], float [[A3:%.*]], i32 3472; CHECK-NEXT: [[TMP5:%.*]] = fptosi <4 x float> [[TMP4]] to <4 x i32>473; CHECK-NEXT: ret <4 x i32> [[TMP5]]474;475 %cvt0 = fptosi float %a0 to i32476 %cvt1 = fptosi float %a1 to i32477 %cvt2 = fptosi float %a2 to i32478 %cvt3 = fptosi float %a3 to i32479 %res0 = insertelement <4 x i32> undef, i32 %cvt0, i32 0480 %res1 = insertelement <4 x i32> %res0, i32 %cvt1, i32 1481 %res2 = insertelement <4 x i32> %res1, i32 %cvt2, i32 2482 %res3 = insertelement <4 x i32> %res2, i32 %cvt3, i32 3483 ret <4 x i32> %res3484}485 486attributes #0 = { nounwind }487