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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 42; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s3 4define i32 @test() {5; CHECK-LABEL: define i32 @test() {6; CHECK-NEXT: entry:7; CHECK-NEXT: [[A_PROMOTED:%.*]] = load i8, ptr null, align 18; CHECK-NEXT: [[TMP10:%.*]] = or i8 [[A_PROMOTED]], 09; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i8> poison, i8 [[A_PROMOTED]], i32 010; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i8> [[TMP0]], <4 x i8> poison, <4 x i32> zeroinitializer11; CHECK-NEXT: [[TMP2:%.*]] = add <4 x i8> [[TMP1]], zeroinitializer12; CHECK-NEXT: [[TMP5:%.*]] = zext <4 x i8> [[TMP2]] to <4 x i16>13; CHECK-NEXT: [[TMP6:%.*]] = add <4 x i16> [[TMP5]], <i16 0, i16 -1, i16 0, i16 0>14; CHECK-NEXT: [[TMP7:%.*]] = call i16 @llvm.vector.reduce.or.v4i16(<4 x i16> [[TMP6]])15; CHECK-NEXT: [[TMP8:%.*]] = zext i16 [[TMP7]] to i3216; CHECK-NEXT: [[TMP9:%.*]] = and i32 [[TMP8]], 6553517; CHECK-NEXT: store i8 [[TMP10]], ptr null, align 118; CHECK-NEXT: [[CALL3:%.*]] = tail call i32 (ptr, ...) null(ptr null, i32 [[TMP9]])19; CHECK-NEXT: ret i32 020;21entry:22 %a.promoted = load i8, ptr null, align 123 %dec.4 = add i8 %a.promoted, 024 %conv.i.4 = zext i8 %dec.4 to i3225 %sub.i.4 = add nuw nsw i32 %conv.i.4, 026 %dec.5 = add i8 %a.promoted, 027 %conv.i.5 = zext i8 %dec.5 to i3228 %sub.i.5 = add nuw nsw i32 %conv.i.5, 6553529 %0 = or i32 %sub.i.4, %sub.i.530 %dec.6 = or i8 %a.promoted, 031 %conv.i.6 = zext i8 %dec.6 to i3232 %sub.i.6 = add nuw nsw i32 %conv.i.6, 033 %1 = or i32 %0, %sub.i.634 %dec.7 = or i8 %a.promoted, 035 %conv.i.7 = zext i8 %dec.7 to i3236 %sub.i.7 = add nuw nsw i32 %conv.i.7, 037 %2 = or i32 %1, %sub.i.738 %3 = and i32 %2, 6553539 store i8 %dec.7, ptr null, align 140 %call3 = tail call i32 (ptr, ...) null(ptr null, i32 %3)41 ret i32 042}43