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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -S --passes=slp-vectorizer -S -mtriple=i686-unknown-linux-android29 -mattr=+sse2 < %s | FileCheck %s3 4define void @test(ptr %0, i64 %1, i64 %2, i1 %3, i64 %4, i64 %5) {5; CHECK-LABEL: define void @test(6; CHECK-SAME: ptr [[TMP0:%.*]], i64 [[TMP1:%.*]], i64 [[TMP2:%.*]], i1 [[TMP3:%.*]], i64 [[TMP4:%.*]], i64 [[TMP5:%.*]]) #[[ATTR0:[0-9]+]] {7; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2408; CHECK-NEXT: [[TMP9:%.*]] = insertelement <4 x i64> poison, i64 [[TMP1]], i32 09; CHECK-NEXT: [[TMP10:%.*]] = shufflevector <4 x i64> [[TMP9]], <4 x i64> poison, <4 x i32> zeroinitializer10; CHECK-NEXT: [[TMP11:%.*]] = insertelement <4 x i64> <i64 1, i64 1, i64 1, i64 poison>, i64 [[TMP2]], i32 311; CHECK-NEXT: [[TMP12:%.*]] = add <4 x i64> [[TMP10]], [[TMP11]]12; CHECK-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12813; CHECK-NEXT: [[TMP13:%.*]] = load <2 x i64>, ptr [[TMP7]], align 414; CHECK-NEXT: [[TMP14:%.*]] = load i64, ptr null, align 415; CHECK-NEXT: [[TMP15:%.*]] = load <2 x i64>, ptr [[TMP8]], align 416; CHECK-NEXT: [[TMP16:%.*]] = shufflevector <2 x i64> [[TMP13]], <2 x i64> [[TMP15]], <6 x i32> <i32 0, i32 1, i32 poison, i32 3, i32 2, i32 2>17; CHECK-NEXT: [[TMP17:%.*]] = insertelement <6 x i64> poison, i64 [[TMP14]], i32 018; CHECK-NEXT: [[TMP18:%.*]] = shufflevector <6 x i64> [[TMP17]], <6 x i64> poison, <6 x i32> <i32 poison, i32 poison, i32 0, i32 poison, i32 poison, i32 poison>19; CHECK-NEXT: [[TMP19:%.*]] = shufflevector <6 x i64> [[TMP16]], <6 x i64> [[TMP18]], <6 x i32> <i32 0, i32 1, i32 8, i32 3, i32 4, i32 5>20; CHECK-NEXT: [[TMP20:%.*]] = shufflevector <4 x i64> [[TMP10]], <4 x i64> poison, <6 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 0>21; CHECK-NEXT: [[TMP21:%.*]] = shufflevector <6 x i64> [[TMP20]], <6 x i64> <i64 0, i64 0, i64 0, i64 0, i64 0, i64 poison>, <6 x i32> <i32 6, i32 7, i32 8, i32 9, i32 10, i32 0>22; CHECK-NEXT: [[TMP22:%.*]] = add <6 x i64> [[TMP19]], [[TMP21]]23; CHECK-NEXT: [[TMP23:%.*]] = shufflevector <2 x i64> [[TMP13]], <2 x i64> poison, <4 x i32> <i32 0, i32 1, i32 0, i32 1>24; CHECK-NEXT: [[TMP24:%.*]] = shufflevector <4 x i64> [[TMP10]], <4 x i64> [[TMP23]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>25; CHECK-NEXT: [[TMP25:%.*]] = sub <4 x i64> zeroinitializer, [[TMP24]]26; CHECK-NEXT: [[TMP26:%.*]] = sub <6 x i64> zeroinitializer, [[TMP22]]27; CHECK-NEXT: [[TMP27:%.*]] = shufflevector <6 x i64> [[TMP19]], <6 x i64> poison, <2 x i32> <i32 2, i32 2>28; CHECK-NEXT: [[TMP28:%.*]] = add <2 x i64> [[TMP27]], splat (i64 1)29; CHECK-NEXT: [[TMP29:%.*]] = ashr <2 x i64> [[TMP28]], splat (i64 14)30; CHECK-NEXT: [[TMP30:%.*]] = shufflevector <6 x i64> [[TMP26]], <6 x i64> poison, <14 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 poison, i32 poison>31; CHECK-NEXT: [[TMP31:%.*]] = shufflevector <4 x i64> [[TMP12]], <4 x i64> poison, <14 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>32; CHECK-NEXT: [[TMP32:%.*]] = shufflevector <14 x i64> [[TMP30]], <14 x i64> [[TMP31]], <14 x i32> <i32 14, i32 15, i32 16, i32 17, i32 poison, i32 poison, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 poison, i32 poison>33; CHECK-NEXT: [[TMP33:%.*]] = shufflevector <4 x i64> [[TMP25]], <4 x i64> poison, <14 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>34; CHECK-NEXT: [[TMP34:%.*]] = shufflevector <14 x i64> [[TMP32]], <14 x i64> [[TMP33]], <14 x i32> <i32 0, i32 1, i32 2, i32 3, i32 14, i32 15, i32 16, i32 17, i32 8, i32 9, i32 10, i32 11, i32 poison, i32 poison>35; CHECK-NEXT: [[TMP35:%.*]] = shufflevector <2 x i64> [[TMP29]], <2 x i64> poison, <14 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>36; CHECK-NEXT: [[TMP36:%.*]] = shufflevector <14 x i64> [[TMP34]], <14 x i64> [[TMP35]], <14 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 14, i32 15>37; CHECK-NEXT: br i1 [[TMP3]], label %[[BB52:.*]], label %[[BB37:.*]]38; CHECK: [[BB37]]:39; CHECK-NEXT: [[TMP38:%.*]] = add <4 x i64> [[TMP10]], splat (i64 1)40; CHECK-NEXT: [[TMP39:%.*]] = shufflevector <4 x i64> [[TMP10]], <4 x i64> poison, <2 x i32> zeroinitializer41; CHECK-NEXT: [[TMP40:%.*]] = add <2 x i64> [[TMP39]], splat (i64 1)42; CHECK-NEXT: [[TMP41:%.*]] = lshr <2 x i64> [[TMP39]], splat (i64 1)43; CHECK-NEXT: [[TMP42:%.*]] = add <2 x i64> [[TMP40]], [[TMP41]]44; CHECK-NEXT: [[TMP43:%.*]] = shufflevector <4 x i64> [[TMP10]], <4 x i64> [[TMP11]], <10 x i32> <i32 0, i32 7, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>45; CHECK-NEXT: [[TMP44:%.*]] = insertelement <10 x i64> [[TMP43]], i64 [[TMP4]], i32 646; CHECK-NEXT: [[TMP45:%.*]] = insertelement <10 x i64> [[TMP44]], i64 [[TMP5]], i32 747; CHECK-NEXT: [[TMP46:%.*]] = shufflevector <4 x i64> [[TMP38]], <4 x i64> poison, <10 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison>48; CHECK-NEXT: [[TMP47:%.*]] = shufflevector <2 x i64> [[TMP42]], <2 x i64> poison, <10 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>49; CHECK-NEXT: [[TMP48:%.*]] = shufflevector <10 x i64> [[TMP46]], <10 x i64> [[TMP47]], <10 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 4, i32 5, i32 6, i32 7, i32 10, i32 11>50; CHECK-NEXT: [[TMP49:%.*]] = shufflevector <10 x i64> [[TMP48]], <10 x i64> [[TMP45]], <10 x i32> <i32 10, i32 11, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 8, i32 9>51; CHECK-NEXT: [[TMP50:%.*]] = shufflevector <10 x i64> [[TMP49]], <10 x i64> poison, <14 x i32> <i32 0, i32 1, i32 0, i32 2, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 0, i32 0>52; CHECK-NEXT: [[TMP51:%.*]] = ashr <14 x i64> [[TMP50]], splat (i64 2)53; CHECK-NEXT: br label %[[BB52]]54; CHECK: [[BB52]]:55; CHECK-NEXT: [[TMP53:%.*]] = phi <14 x i64> [ [[TMP51]], %[[BB37]] ], [ [[TMP36]], [[TMP6:%.*]] ]56; CHECK-NEXT: [[TMP54:%.*]] = extractelement <14 x i64> [[TMP53]], i32 057; CHECK-NEXT: [[TMP55:%.*]] = extractelement <14 x i64> [[TMP53]], i32 1358; CHECK-NEXT: [[TMP56:%.*]] = or i64 [[TMP54]], [[TMP55]]59; CHECK-NEXT: [[TMP57:%.*]] = extractelement <14 x i64> [[TMP53]], i32 460; CHECK-NEXT: [[TMP58:%.*]] = extractelement <14 x i64> [[TMP53]], i32 1261; CHECK-NEXT: [[TMP59:%.*]] = or i64 [[TMP57]], [[TMP58]]62; CHECK-NEXT: [[TMP60:%.*]] = extractelement <14 x i64> [[TMP53]], i32 163; CHECK-NEXT: [[TMP61:%.*]] = extractelement <14 x i64> [[TMP53]], i32 264; CHECK-NEXT: [[TMP62:%.*]] = or i64 [[TMP60]], [[TMP61]]65; CHECK-NEXT: [[TMP63:%.*]] = or i64 [[TMP59]], [[TMP56]]66; CHECK-NEXT: [[TMP64:%.*]] = extractelement <14 x i64> [[TMP53]], i32 567; CHECK-NEXT: [[TMP65:%.*]] = extractelement <14 x i64> [[TMP53]], i32 868; CHECK-NEXT: [[TMP66:%.*]] = or i64 [[TMP64]], [[TMP65]]69; CHECK-NEXT: [[TMP67:%.*]] = extractelement <14 x i64> [[TMP53]], i32 370; CHECK-NEXT: [[TMP68:%.*]] = or i64 [[TMP67]], [[TMP62]]71; CHECK-NEXT: [[TMP69:%.*]] = extractelement <14 x i64> [[TMP53]], i32 972; CHECK-NEXT: [[TMP70:%.*]] = or i64 [[TMP69]], [[TMP66]]73; CHECK-NEXT: [[TMP71:%.*]] = extractelement <14 x i64> [[TMP53]], i32 674; CHECK-NEXT: [[TMP72:%.*]] = or i64 [[TMP71]], [[TMP70]]75; CHECK-NEXT: [[TMP73:%.*]] = or i64 [[TMP63]], [[TMP72]]76; CHECK-NEXT: [[TMP74:%.*]] = extractelement <14 x i64> [[TMP53]], i32 1077; CHECK-NEXT: [[TMP75:%.*]] = or i64 [[TMP74]], [[TMP73]]78; CHECK-NEXT: store i64 [[TMP68]], ptr [[TMP0]], align 479; CHECK-NEXT: [[TMP76:%.*]] = extractelement <14 x i64> [[TMP53]], i32 1180; CHECK-NEXT: store i64 [[TMP76]], ptr null, align 481; CHECK-NEXT: [[TMP77:%.*]] = extractelement <14 x i64> [[TMP53]], i32 782; CHECK-NEXT: store i64 [[TMP77]], ptr [[TMP0]], align 483; CHECK-NEXT: store i64 [[TMP75]], ptr null, align 484; CHECK-NEXT: ret void85;86 %7 = getelementptr i8, ptr %0, i32 24887 %8 = load i64, ptr %7, align 488 %9 = getelementptr i8, ptr %0, i32 24089 %10 = load i64, ptr %9, align 490 %11 = load i64, ptr null, align 491 %12 = add i64 %1, 192 %13 = add i64 %1, 193 %14 = add i64 %1, %294 %15 = getelementptr i8, ptr %0, i32 13695 %16 = load i64, ptr %15, align 496 %17 = getelementptr i8, ptr %0, i32 12897 %18 = load i64, ptr %17, align 498 %19 = add i64 %18, %199 %20 = sub i64 0, %18100 %21 = sub i64 0, %16101 %22 = sub i64 0, %11102 %23 = add i64 %1, 1103 %24 = sub i64 0, %1104 %25 = sub i64 0, %1105 %26 = sub i64 0, %10106 %27 = sub i64 0, %8107 %28 = sub i64 0, %19108 %29 = add i64 %11, 1109 %30 = ashr i64 %29, 14110 %31 = add i64 %11, 1111 %32 = ashr i64 %31, 14112 br i1 %3, label %58, label %33113 11433:115 %34 = ashr i64 %2, 2116 %35 = ashr i64 %1, 2117 %36 = add i64 %1, 1118 %37 = ashr i64 %36, 2119 %38 = add i64 %1, 1120 %39 = lshr i64 %1, 1121 %40 = add i64 %38, %39122 %41 = ashr i64 %40, 2123 %42 = add i64 %1, 1124 %43 = lshr i64 %1, 1125 %44 = add i64 %42, %43126 %45 = ashr i64 %44, 2127 %46 = ashr i64 %5, 2128 %47 = ashr i64 %4, 2129 %48 = ashr i64 %1, 2130 %49 = ashr i64 %1, 2131 %50 = ashr i64 %1, 2132 %51 = ashr i64 %1, 2133 %52 = add i64 %1, 1134 %53 = ashr i64 %52, 2135 %54 = add i64 %1, 1136 %55 = ashr i64 %54, 2137 %56 = add i64 %1, 1138 %57 = ashr i64 %56, 2139 br label %58140 14158:142 %59 = phi i64 [ %51, %33 ], [ %24, %6 ]143 %60 = phi i64 [ %50, %33 ], [ %32, %6 ]144 %61 = phi i64 [ %53, %33 ], [ %25, %6 ]145 %62 = phi i64 [ %55, %33 ], [ %26, %6 ]146 %63 = phi i64 [ %57, %33 ], [ %27, %6 ]147 %64 = phi i64 [ %49, %33 ], [ %30, %6 ]148 %65 = phi i64 [ %48, %33 ], [ %23, %6 ]149 %66 = phi i64 [ %47, %33 ], [ %22, %6 ]150 %67 = phi i64 [ %46, %33 ], [ %21, %6 ]151 %68 = phi i64 [ %45, %33 ], [ %20, %6 ]152 %69 = phi i64 [ %41, %33 ], [ %28, %6 ]153 %70 = phi i64 [ %34, %33 ], [ %12, %6 ]154 %71 = phi i64 [ %35, %33 ], [ %13, %6 ]155 %72 = phi i64 [ %37, %33 ], [ %14, %6 ]156 %73 = or i64 %65, %64157 %74 = or i64 %59, %60158 %75 = or i64 %70, %71159 %76 = or i64 %74, %73160 %77 = or i64 %61, %66161 %78 = or i64 %72, %75162 %79 = or i64 %67, %77163 %80 = or i64 %62, %79164 %81 = or i64 %76, %80165 %82 = or i64 %68, %81166 store i64 %78, ptr %0, align 4167 store i64 %69, ptr null, align 4168 store i64 %63, ptr %0, align 4169 store i64 %82, ptr null, align 4170 ret void171}172 173