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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=slp-vectorizer -S -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE3; RUN: opt < %s -passes=slp-vectorizer -S -mtriple=x86_64-unknown-linux-gnu -mattr=+avx  | FileCheck %s --check-prefixes=CHECK,AVX4; RUN: opt < %s -passes=slp-vectorizer -S -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX5 6define void @powof2mul_uniform(ptr noalias nocapture %a, ptr noalias nocapture readonly %b, ptr noalias nocapture readonly %c){7; CHECK-LABEL: @powof2mul_uniform(8; CHECK-NEXT:  entry:9; CHECK-NEXT:    [[TMP1:%.*]] = load <4 x i32>, ptr [[B:%.*]], align 410; CHECK-NEXT:    [[TMP3:%.*]] = load <4 x i32>, ptr [[C:%.*]], align 411; CHECK-NEXT:    [[TMP4:%.*]] = add nsw <4 x i32> [[TMP3]], [[TMP1]]12; CHECK-NEXT:    [[TMP5:%.*]] = mul <4 x i32> [[TMP4]], splat (i32 2)13; CHECK-NEXT:    store <4 x i32> [[TMP5]], ptr [[A:%.*]], align 414; CHECK-NEXT:    ret void15;16entry:17  %0 = load i32, ptr %b, align 418  %1 = load i32, ptr %c, align 419  %add = add nsw i32 %1, %020  %mul = mul i32 %add, 221  store i32 %mul, ptr %a, align 422  %arrayidx3 = getelementptr inbounds i32, ptr %b, i64 123  %2 = load i32, ptr %arrayidx3, align 424  %arrayidx4 = getelementptr inbounds i32, ptr %c, i64 125  %3 = load i32, ptr %arrayidx4, align 426  %add5 = add nsw i32 %3, %227  %mul6 = mul i32 %add5, 228  %arrayidx7 = getelementptr inbounds i32, ptr %a, i64 129  store i32 %mul6, ptr %arrayidx7, align 430  %arrayidx8 = getelementptr inbounds i32, ptr %b, i64 231  %4 = load i32, ptr %arrayidx8, align 432  %arrayidx9 = getelementptr inbounds i32, ptr %c, i64 233  %5 = load i32, ptr %arrayidx9, align 434  %add10 = add nsw i32 %5, %435  %mul11 = mul i32 %add10, 236  %arrayidx12 = getelementptr inbounds i32, ptr %a, i64 237  store i32 %mul11, ptr %arrayidx12, align 438  %arrayidx13 = getelementptr inbounds i32, ptr %b, i64 339  %6 = load i32, ptr %arrayidx13, align 440  %arrayidx14 = getelementptr inbounds i32, ptr %c, i64 341  %7 = load i32, ptr %arrayidx14, align 442  %add15 = add nsw i32 %7, %643  %mul16 = mul i32 %add15, 244  %arrayidx17 = getelementptr inbounds i32, ptr %a, i64 345  store i32 %mul16, ptr %arrayidx17, align 446  ret void47}48 49define void @negpowof2mul_uniform(ptr noalias nocapture %a, ptr noalias nocapture readonly %b, ptr noalias nocapture readonly %c){50; CHECK-LABEL: @negpowof2mul_uniform(51; CHECK-NEXT:  entry:52; CHECK-NEXT:    [[TMP1:%.*]] = load <4 x i32>, ptr [[B:%.*]], align 453; CHECK-NEXT:    [[TMP3:%.*]] = load <4 x i32>, ptr [[C:%.*]], align 454; CHECK-NEXT:    [[TMP4:%.*]] = add nsw <4 x i32> [[TMP3]], [[TMP1]]55; CHECK-NEXT:    [[TMP5:%.*]] = mul <4 x i32> [[TMP4]], splat (i32 -2)56; CHECK-NEXT:    store <4 x i32> [[TMP5]], ptr [[A:%.*]], align 457; CHECK-NEXT:    ret void58;59entry:60  %0 = load i32, ptr %b, align 461  %1 = load i32, ptr %c, align 462  %add = add nsw i32 %1, %063  %mul = mul i32 %add, -264  store i32 %mul, ptr %a, align 465  %arrayidx3 = getelementptr inbounds i32, ptr %b, i64 166  %2 = load i32, ptr %arrayidx3, align 467  %arrayidx4 = getelementptr inbounds i32, ptr %c, i64 168  %3 = load i32, ptr %arrayidx4, align 469  %add5 = add nsw i32 %3, %270  %mul6 = mul i32 %add5, -271  %arrayidx7 = getelementptr inbounds i32, ptr %a, i64 172  store i32 %mul6, ptr %arrayidx7, align 473  %arrayidx8 = getelementptr inbounds i32, ptr %b, i64 274  %4 = load i32, ptr %arrayidx8, align 475  %arrayidx9 = getelementptr inbounds i32, ptr %c, i64 276  %5 = load i32, ptr %arrayidx9, align 477  %add10 = add nsw i32 %5, %478  %mul11 = mul i32 %add10, -279  %arrayidx12 = getelementptr inbounds i32, ptr %a, i64 280  store i32 %mul11, ptr %arrayidx12, align 481  %arrayidx13 = getelementptr inbounds i32, ptr %b, i64 382  %6 = load i32, ptr %arrayidx13, align 483  %arrayidx14 = getelementptr inbounds i32, ptr %c, i64 384  %7 = load i32, ptr %arrayidx14, align 485  %add15 = add nsw i32 %7, %686  %mul16 = mul i32 %add15, -287  %arrayidx17 = getelementptr inbounds i32, ptr %a, i64 388  store i32 %mul16, ptr %arrayidx17, align 489  ret void90}91 92define void @powof2mul_nonuniform(ptr noalias nocapture %a, ptr noalias nocapture readonly %b, ptr noalias nocapture readonly %c){93; CHECK-LABEL: @powof2mul_nonuniform(94; CHECK-NEXT:  entry:95; CHECK-NEXT:    [[TMP1:%.*]] = load <4 x i32>, ptr [[B:%.*]], align 496; CHECK-NEXT:    [[TMP3:%.*]] = load <4 x i32>, ptr [[C:%.*]], align 497; CHECK-NEXT:    [[TMP4:%.*]] = add nsw <4 x i32> [[TMP3]], [[TMP1]]98; CHECK-NEXT:    [[TMP5:%.*]] = mul <4 x i32> [[TMP4]], <i32 2, i32 4, i32 8, i32 16>99; CHECK-NEXT:    store <4 x i32> [[TMP5]], ptr [[A:%.*]], align 4100; CHECK-NEXT:    ret void101;102entry:103  %0 = load i32, ptr %b, align 4104  %1 = load i32, ptr %c, align 4105  %add = add nsw i32 %1, %0106  %mul = mul i32 %add, 2107  store i32 %mul, ptr %a, align 4108  %arrayidx3 = getelementptr inbounds i32, ptr %b, i64 1109  %2 = load i32, ptr %arrayidx3, align 4110  %arrayidx4 = getelementptr inbounds i32, ptr %c, i64 1111  %3 = load i32, ptr %arrayidx4, align 4112  %add5 = add nsw i32 %3, %2113  %mul6 = mul i32 %add5, 4114  %arrayidx7 = getelementptr inbounds i32, ptr %a, i64 1115  store i32 %mul6, ptr %arrayidx7, align 4116  %arrayidx8 = getelementptr inbounds i32, ptr %b, i64 2117  %4 = load i32, ptr %arrayidx8, align 4118  %arrayidx9 = getelementptr inbounds i32, ptr %c, i64 2119  %5 = load i32, ptr %arrayidx9, align 4120  %add10 = add nsw i32 %5, %4121  %mul11 = mul i32 %add10, 8122  %arrayidx12 = getelementptr inbounds i32, ptr %a, i64 2123  store i32 %mul11, ptr %arrayidx12, align 4124  %arrayidx13 = getelementptr inbounds i32, ptr %b, i64 3125  %6 = load i32, ptr %arrayidx13, align 4126  %arrayidx14 = getelementptr inbounds i32, ptr %c, i64 3127  %7 = load i32, ptr %arrayidx14, align 4128  %add15 = add nsw i32 %7, %6129  %mul16 = mul i32 %add15, 16130  %arrayidx17 = getelementptr inbounds i32, ptr %a, i64 3131  store i32 %mul16, ptr %arrayidx17, align 4132  ret void133}134 135define void @negpowof2mul_nonuniform(ptr noalias nocapture %a, ptr noalias nocapture readonly %b, ptr noalias nocapture readonly %c){136; CHECK-LABEL: @negpowof2mul_nonuniform(137; CHECK-NEXT:  entry:138; CHECK-NEXT:    [[TMP1:%.*]] = load <4 x i32>, ptr [[B:%.*]], align 4139; CHECK-NEXT:    [[TMP3:%.*]] = load <4 x i32>, ptr [[C:%.*]], align 4140; CHECK-NEXT:    [[TMP4:%.*]] = add nsw <4 x i32> [[TMP3]], [[TMP1]]141; CHECK-NEXT:    [[TMP5:%.*]] = mul <4 x i32> [[TMP4]], <i32 -2, i32 -4, i32 -8, i32 -16>142; CHECK-NEXT:    store <4 x i32> [[TMP5]], ptr [[A:%.*]], align 4143; CHECK-NEXT:    ret void144;145entry:146  %0 = load i32, ptr %b, align 4147  %1 = load i32, ptr %c, align 4148  %add = add nsw i32 %1, %0149  %mul = mul i32 %add, -2150  store i32 %mul, ptr %a, align 4151  %arrayidx3 = getelementptr inbounds i32, ptr %b, i64 1152  %2 = load i32, ptr %arrayidx3, align 4153  %arrayidx4 = getelementptr inbounds i32, ptr %c, i64 1154  %3 = load i32, ptr %arrayidx4, align 4155  %add5 = add nsw i32 %3, %2156  %mul6 = mul i32 %add5, -4157  %arrayidx7 = getelementptr inbounds i32, ptr %a, i64 1158  store i32 %mul6, ptr %arrayidx7, align 4159  %arrayidx8 = getelementptr inbounds i32, ptr %b, i64 2160  %4 = load i32, ptr %arrayidx8, align 4161  %arrayidx9 = getelementptr inbounds i32, ptr %c, i64 2162  %5 = load i32, ptr %arrayidx9, align 4163  %add10 = add nsw i32 %5, %4164  %mul11 = mul i32 %add10, -8165  %arrayidx12 = getelementptr inbounds i32, ptr %a, i64 2166  store i32 %mul11, ptr %arrayidx12, align 4167  %arrayidx13 = getelementptr inbounds i32, ptr %b, i64 3168  %6 = load i32, ptr %arrayidx13, align 4169  %arrayidx14 = getelementptr inbounds i32, ptr %c, i64 3170  %7 = load i32, ptr %arrayidx14, align 4171  %add15 = add nsw i32 %7, %6172  %mul16 = mul i32 %add15, -16173  %arrayidx17 = getelementptr inbounds i32, ptr %a, i64 3174  store i32 %mul16, ptr %arrayidx17, align 4175  ret void176}177 178define void @PR51436(ptr nocapture %a) {179; SSE-LABEL: @PR51436(180; SSE-NEXT:  entry:181; SSE-NEXT:    [[GEP2:%.*]] = getelementptr inbounds i64, ptr [[A:%.*]], i64 2182; SSE-NEXT:    [[GEP4:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 4183; SSE-NEXT:    [[GEP6:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 6184; SSE-NEXT:    [[TMP1:%.*]] = load <2 x i64>, ptr [[A]], align 8185; SSE-NEXT:    [[TMP2:%.*]] = mul <2 x i64> [[TMP1]], splat (i64 -17592186044416)186; SSE-NEXT:    [[TMP3:%.*]] = add <2 x i64> [[TMP2]], splat (i64 -17592186044416)187; SSE-NEXT:    store <2 x i64> [[TMP3]], ptr [[A]], align 8188; SSE-NEXT:    [[TMP6:%.*]] = load <2 x i64>, ptr [[GEP2]], align 8189; SSE-NEXT:    [[TMP4:%.*]] = mul <2 x i64> [[TMP6]], splat (i64 -17592186044416)190; SSE-NEXT:    [[TMP8:%.*]] = add <2 x i64> [[TMP4]], splat (i64 -17592186044416)191; SSE-NEXT:    store <2 x i64> [[TMP8]], ptr [[GEP2]], align 8192; SSE-NEXT:    [[TMP11:%.*]] = load <2 x i64>, ptr [[GEP4]], align 8193; SSE-NEXT:    [[TMP7:%.*]] = mul <2 x i64> [[TMP11]], splat (i64 -17592186044416)194; SSE-NEXT:    [[TMP13:%.*]] = add <2 x i64> [[TMP7]], splat (i64 -17592186044416)195; SSE-NEXT:    store <2 x i64> [[TMP13]], ptr [[GEP4]], align 8196; SSE-NEXT:    [[TMP16:%.*]] = load <2 x i64>, ptr [[GEP6]], align 8197; SSE-NEXT:    [[TMP10:%.*]] = mul <2 x i64> [[TMP16]], splat (i64 -17592186044416)198; SSE-NEXT:    [[TMP18:%.*]] = add <2 x i64> [[TMP10]], splat (i64 -17592186044416)199; SSE-NEXT:    store <2 x i64> [[TMP18]], ptr [[GEP6]], align 8200; SSE-NEXT:    ret void201;202; AVX-LABEL: @PR51436(203; AVX-NEXT:  entry:204; AVX-NEXT:    [[GEP4:%.*]] = getelementptr inbounds i64, ptr [[A:%.*]], i64 4205; AVX-NEXT:    [[TMP1:%.*]] = load <4 x i64>, ptr [[A]], align 8206; AVX-NEXT:    [[TMP2:%.*]] = mul <4 x i64> [[TMP1]], splat (i64 -17592186044416)207; AVX-NEXT:    [[TMP3:%.*]] = add <4 x i64> [[TMP2]], splat (i64 -17592186044416)208; AVX-NEXT:    store <4 x i64> [[TMP3]], ptr [[A]], align 8209; AVX-NEXT:    [[TMP6:%.*]] = load <4 x i64>, ptr [[GEP4]], align 8210; AVX-NEXT:    [[TMP4:%.*]] = mul <4 x i64> [[TMP6]], splat (i64 -17592186044416)211; AVX-NEXT:    [[TMP8:%.*]] = add <4 x i64> [[TMP4]], splat (i64 -17592186044416)212; AVX-NEXT:    store <4 x i64> [[TMP8]], ptr [[GEP4]], align 8213; AVX-NEXT:    ret void214;215entry:216  %gep1 = getelementptr inbounds i64, ptr %a, i64 1217  %gep2 = getelementptr inbounds i64, ptr %a, i64 2218  %gep3 = getelementptr inbounds i64, ptr %a, i64 3219  %gep4 = getelementptr inbounds i64, ptr %a, i64 4220  %gep5 = getelementptr inbounds i64, ptr %a, i64 5221  %gep6 = getelementptr inbounds i64, ptr %a, i64 6222  %gep7 = getelementptr inbounds i64, ptr %a, i64 7223  %load0 = load i64, ptr %a, align 8224  %load1 = load i64, ptr %gep1, align 8225  %load2 = load i64, ptr %gep2, align 8226  %load3 = load i64, ptr %gep3, align 8227  %load4 = load i64, ptr %gep4, align 8228  %load5 = load i64, ptr %gep5, align 8229  %load6 = load i64, ptr %gep6, align 8230  %load7 = load i64, ptr %gep7, align 8231  %mul0 = mul i64 %load0, -17592186044416232  %mul1 = mul i64 %load1, -17592186044416233  %mul2 = mul i64 %load2, -17592186044416234  %mul3 = mul i64 %load3, -17592186044416235  %mul4 = mul i64 %load4, -17592186044416236  %mul5 = mul i64 %load5, -17592186044416237  %mul6 = mul i64 %load6, -17592186044416238  %mul7 = mul i64 %load7, -17592186044416239  %add0 = add i64 %mul0, -17592186044416240  %add1 = add i64 %mul1, -17592186044416241  %add2 = add i64 %mul2, -17592186044416242  %add3 = add i64 %mul3, -17592186044416243  %add4 = add i64 %mul4, -17592186044416244  %add5 = add i64 %mul5, -17592186044416245  %add6 = add i64 %mul6, -17592186044416246  %add7 = add i64 %mul7, -17592186044416247  store i64 %add0, ptr %a, align 8248  store i64 %add1, ptr %gep1, align 8249  store i64 %add2, ptr %gep2, align 8250  store i64 %add3, ptr %gep3, align 8251  store i64 %add4, ptr %gep4, align 8252  store i64 %add5, ptr %gep5, align 8253  store i64 %add6, ptr %gep6, align 8254  store i64 %add7, ptr %gep7, align 8255  ret void256}257