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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 62; RUN: opt -passes=slp-vectorizer -S -mtriple=x86_64-- -mcpu=corei7 < %s | FileCheck %s3 4define void @test1(float %a, float %b, float %c, float %d, ptr nocapture %p) {5; CHECK-LABEL: define void @test1(6; CHECK-SAME: float [[A:%.*]], float [[B:%.*]], float [[C:%.*]], float [[D:%.*]], ptr captures(none) [[P:%.*]]) #[[ATTR0:[0-9]+]] {7; CHECK-NEXT: [[ENTRY:.*:]]8; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x float> poison, float [[A]], i32 09; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> [[TMP0]], float [[B]], i32 110; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float [[C]], i32 211; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float [[D]], i32 312; CHECK-NEXT: [[TMP4:%.*]] = fptosi <4 x float> [[TMP3]] to <4 x i32>13; CHECK-NEXT: store <4 x i32> [[TMP4]], ptr [[P]], align 4, !tbaa [[INT_TBAA0:![0-9]+]]14; CHECK-NEXT: ret void15;16entry:17 %conv = fptosi float %a to i3218 %conv1 = fptosi float %b to i3219 %conv3 = fptosi float %c to i3220 %conv5 = fptosi float %d to i3221 %incdec.ptr = getelementptr inbounds i32, ptr %p, i64 122 store i32 %conv, ptr %p, align 4, !tbaa !223 %incdec.ptr8 = getelementptr inbounds i32, ptr %p, i64 224 store i32 %conv1, ptr %incdec.ptr, align 4, !tbaa !225 %incdec.ptr10 = getelementptr inbounds i32, ptr %p, i64 326 store i32 %conv3, ptr %incdec.ptr8, align 4, !tbaa !227 store i32 %conv5, ptr %incdec.ptr10, align 4, !tbaa !228 ret void29}30 31define void @test1_vec(float %a, float %b, float %c, float %d, ptr nocapture %p) {32; CHECK-LABEL: define void @test1_vec(33; CHECK-SAME: float [[A:%.*]], float [[B:%.*]], float [[C:%.*]], float [[D:%.*]], ptr captures(none) [[P:%.*]]) #[[ATTR0]] {34; CHECK-NEXT: [[ENTRY:.*:]]35; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x float> poison, float [[A]], i32 036; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> [[TMP0]], float [[B]], i32 137; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float [[C]], i32 238; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float [[D]], i32 339; CHECK-NEXT: [[TMP4:%.*]] = fptosi <4 x float> [[TMP3]] to <4 x i32>40; CHECK-NEXT: store <4 x i32> [[TMP4]], ptr [[P]], align 16, !tbaa [[INT_TBAA0]]41; CHECK-NEXT: ret void42;43entry:44 %conv = fptosi float %a to i3245 %vecinit = insertelement <4 x i32> undef, i32 %conv, i32 046 %conv1 = fptosi float %b to i3247 %vecinit2 = insertelement <4 x i32> %vecinit, i32 %conv1, i32 148 %conv3 = fptosi float %c to i3249 %vecinit4 = insertelement <4 x i32> %vecinit2, i32 %conv3, i32 250 %conv5 = fptosi float %d to i3251 %vecinit6 = insertelement <4 x i32> %vecinit4, i32 %conv5, i32 352 store <4 x i32> %vecinit6, ptr %p, align 16, !tbaa !253 ret void54}55 56define void @test2(i32 %a, i32 %b, i32 %c, i32 %d, ptr nocapture %p) {57; CHECK-LABEL: define void @test2(58; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]], i32 [[D:%.*]], ptr captures(none) [[P:%.*]]) #[[ATTR0]] {59; CHECK-NEXT: [[ENTRY:.*:]]60; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> poison, i32 [[A]], i32 061; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[B]], i32 162; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[C]], i32 263; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[D]], i32 364; CHECK-NEXT: [[TMP4:%.*]] = add nsw <4 x i32> [[TMP3]], splat (i32 1)65; CHECK-NEXT: store <4 x i32> [[TMP4]], ptr [[P]], align 4, !tbaa [[INT_TBAA0]]66; CHECK-NEXT: ret void67;68entry:69 %add = add nsw i32 %a, 170 %add1 = add nsw i32 %b, 171 %add3 = add nsw i32 %c, 172 %add5 = add nsw i32 %d, 173 %incdec.ptr = getelementptr inbounds i32, ptr %p, i64 174 store i32 %add, ptr %p, align 4, !tbaa !275 %incdec.ptr8 = getelementptr inbounds i32, ptr %p, i64 276 store i32 %add1, ptr %incdec.ptr, align 4, !tbaa !277 %incdec.ptr10 = getelementptr inbounds i32, ptr %p, i64 378 store i32 %add3, ptr %incdec.ptr8, align 4, !tbaa !279 store i32 %add5, ptr %incdec.ptr10, align 4, !tbaa !280 ret void81}82 83define void @test2_vec(i32 %0, i32 %1, i32 %2, i32 %3, ptr nocapture %4) {84; CHECK-LABEL: define void @test2_vec(85; CHECK-SAME: i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], i32 [[TMP3:%.*]], ptr captures(none) [[TMP4:%.*]]) #[[ATTR0]] {86; CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> poison, i32 [[TMP0]], i32 087; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> [[TMP6]], i32 [[TMP1]], i32 188; CHECK-NEXT: [[TMP8:%.*]] = insertelement <4 x i32> [[TMP7]], i32 [[TMP2]], i32 289; CHECK-NEXT: [[TMP9:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[TMP3]], i32 390; CHECK-NEXT: [[TMP10:%.*]] = add nsw <4 x i32> [[TMP9]], splat (i32 1)91; CHECK-NEXT: store <4 x i32> [[TMP10]], ptr [[TMP4]], align 16, !tbaa [[INT_TBAA0]]92; CHECK-NEXT: ret void93;94 %6 = add nsw i32 %0, 195 %7 = insertelement <4 x i32> undef, i32 %6, i32 096 %8 = add nsw i32 %1, 197 %9 = insertelement <4 x i32> %7, i32 %8, i32 198 %10 = add nsw i32 %2, 199 %11 = insertelement <4 x i32> %9, i32 %10, i32 2100 %12 = add nsw i32 %3, 1101 %13 = insertelement <4 x i32> %11, i32 %12, i32 3102 store <4 x i32> %13, ptr %4, align 16, !tbaa !2103 ret void104}105 106!2 = !{!3, !3, i64 0}107!3 = !{!"int", !4, i64 0}108!4 = !{!"omnipotent char", !5, i64 0}109!5 = !{!"Simple C++ TBAA"}110;.111; CHECK: [[INT_TBAA0]] = !{[[META1:![0-9]+]], [[META1]], i64 0}112; CHECK: [[META1]] = !{!"int", [[META2:![0-9]+]], i64 0}113; CHECK: [[META2]] = !{!"omnipotent char", [[META3:![0-9]+]], i64 0}114; CHECK: [[META3]] = !{!"Simple C++ TBAA"}115;.116