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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 62; RUN: opt < %s -passes=slp-vectorizer -S -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2 -slp-threshold=-1 | FileCheck %s3; RUN: opt < %s -passes=slp-vectorizer -S -mtriple=x86_64-unknown-linux-gnu -mattr=+sse4.2 | FileCheck %s4; RUN: opt < %s -passes=slp-vectorizer -S -mtriple=x86_64-unknown-linux-gnu -mattr=+avx | FileCheck %s5; RUN: opt < %s -passes=slp-vectorizer -S -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 | FileCheck %s6; RUN: opt < %s -passes=slp-vectorizer -S -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512bw,+avx512vl | FileCheck %s7 8define void @store_i32(ptr nocapture %0, i32 %1, i32 %2) {9; CHECK-LABEL: define void @store_i32(10; CHECK-SAME: ptr captures(none) [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]]) #[[ATTR0:[0-9]+]] {11; CHECK-NEXT: [[TMP4:%.*]] = load <4 x i32>, ptr [[TMP0]], align 4, !tbaa [[INT_TBAA0:![0-9]+]]12; CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x i32> poison, i32 [[TMP1]], i32 013; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <4 x i32> [[TMP5]], <4 x i32> poison, <4 x i32> zeroinitializer14; CHECK-NEXT: [[TMP7:%.*]] = mul <4 x i32> [[TMP4]], [[TMP6]]15; CHECK-NEXT: [[TMP8:%.*]] = lshr <4 x i32> [[TMP7]], splat (i32 15)16; CHECK-NEXT: [[TMP9:%.*]] = icmp ult <4 x i32> [[TMP8]], splat (i32 255)17; CHECK-NEXT: [[TMP10:%.*]] = select <4 x i1> [[TMP9]], <4 x i32> [[TMP8]], <4 x i32> splat (i32 255)18; CHECK-NEXT: store <4 x i32> [[TMP10]], ptr [[TMP0]], align 4, !tbaa [[INT_TBAA0]]19; CHECK-NEXT: ret void20;21 %4 = load i32, ptr %0, align 4, !tbaa !222 %5 = mul i32 %4, %123 %6 = lshr i32 %5, 1524 %7 = icmp ult i32 %6, 25525 %8 = select i1 %7, i32 %6, i32 25526 store i32 %8, ptr %0, align 4, !tbaa !227 %9 = getelementptr inbounds i32, ptr %0, i64 128 %10 = load i32, ptr %9, align 4, !tbaa !229 %11 = mul i32 %10, %130 %12 = lshr i32 %11, 1531 %13 = icmp ult i32 %12, 25532 %14 = select i1 %13, i32 %12, i32 25533 store i32 %14, ptr %9, align 4, !tbaa !234 %15 = getelementptr inbounds i32, ptr %0, i64 235 %16 = load i32, ptr %15, align 4, !tbaa !236 %17 = mul i32 %16, %137 %18 = lshr i32 %17, 1538 %19 = icmp ult i32 %18, 25539 %20 = select i1 %19, i32 %18, i32 25540 store i32 %20, ptr %15, align 4, !tbaa !241 %21 = getelementptr inbounds i32, ptr %0, i64 342 %22 = load i32, ptr %21, align 4, !tbaa !243 %23 = mul i32 %22, %144 %24 = lshr i32 %23, 1545 %25 = icmp ult i32 %24, 25546 %26 = select i1 %25, i32 %24, i32 25547 store i32 %26, ptr %21, align 4, !tbaa !248 ret void49}50 51define void @store_i8(ptr nocapture %0, i32 %1, i32 %2) {52; CHECK-LABEL: define void @store_i8(53; CHECK-SAME: ptr captures(none) [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]]) #[[ATTR0]] {54; CHECK-NEXT: [[TMP4:%.*]] = load <4 x i8>, ptr [[TMP0]], align 1, !tbaa [[CHAR_TBAA4:![0-9]+]]55; CHECK-NEXT: [[TMP5:%.*]] = zext <4 x i8> [[TMP4]] to <4 x i32>56; CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> poison, i32 [[TMP1]], i32 057; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <4 x i32> [[TMP6]], <4 x i32> poison, <4 x i32> zeroinitializer58; CHECK-NEXT: [[TMP8:%.*]] = mul <4 x i32> [[TMP5]], [[TMP7]]59; CHECK-NEXT: [[TMP9:%.*]] = lshr <4 x i32> [[TMP8]], splat (i32 15)60; CHECK-NEXT: [[TMP10:%.*]] = icmp ult <4 x i32> [[TMP9]], splat (i32 255)61; CHECK-NEXT: [[TMP11:%.*]] = select <4 x i1> [[TMP10]], <4 x i32> [[TMP9]], <4 x i32> splat (i32 255)62; CHECK-NEXT: [[TMP12:%.*]] = trunc <4 x i32> [[TMP11]] to <4 x i8>63; CHECK-NEXT: store <4 x i8> [[TMP12]], ptr [[TMP0]], align 1, !tbaa [[CHAR_TBAA4]]64; CHECK-NEXT: ret void65;66 %4 = load i8, ptr %0, align 1, !tbaa !667 %5 = zext i8 %4 to i3268 %6 = mul i32 %5, %169 %7 = lshr i32 %6, 1570 %8 = icmp ult i32 %7, 25571 %9 = select i1 %8, i32 %7, i32 25572 %10 = trunc i32 %9 to i873 store i8 %10, ptr %0, align 1, !tbaa !674 %11 = getelementptr inbounds i8, ptr %0, i64 175 %12 = load i8, ptr %11, align 1, !tbaa !676 %13 = zext i8 %12 to i3277 %14 = mul i32 %13, %178 %15 = lshr i32 %14, 1579 %16 = icmp ult i32 %15, 25580 %17 = select i1 %16, i32 %15, i32 25581 %18 = trunc i32 %17 to i882 store i8 %18, ptr %11, align 1, !tbaa !683 %19 = getelementptr inbounds i8, ptr %0, i64 284 %20 = load i8, ptr %19, align 1, !tbaa !685 %21 = zext i8 %20 to i3286 %22 = mul i32 %21, %187 %23 = lshr i32 %22, 1588 %24 = icmp ult i32 %23, 25589 %25 = select i1 %24, i32 %23, i32 25590 %26 = trunc i32 %25 to i891 store i8 %26, ptr %19, align 1, !tbaa !692 %27 = getelementptr inbounds i8, ptr %0, i64 393 %28 = load i8, ptr %27, align 1, !tbaa !694 %29 = zext i8 %28 to i3295 %30 = mul i32 %29, %196 %31 = lshr i32 %30, 1597 %32 = icmp ult i32 %31, 25598 %33 = select i1 %32, i32 %31, i32 25599 %34 = trunc i32 %33 to i8100 store i8 %34, ptr %27, align 1, !tbaa !6101 ret void102}103 104define void @store_i64(ptr nocapture %0, i32 %1, i32 %2) {105; CHECK-LABEL: define void @store_i64(106; CHECK-SAME: ptr captures(none) [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]]) #[[ATTR0]] {107; CHECK-NEXT: [[TMP4:%.*]] = zext i32 [[TMP1]] to i64108; CHECK-NEXT: [[TMP5:%.*]] = load <4 x i64>, ptr [[TMP0]], align 8, !tbaa [[LONG_TBAA5:![0-9]+]]109; CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i64> poison, i64 [[TMP4]], i32 0110; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <4 x i64> [[TMP6]], <4 x i64> poison, <4 x i32> zeroinitializer111; CHECK-NEXT: [[TMP8:%.*]] = mul <4 x i64> [[TMP5]], [[TMP7]]112; CHECK-NEXT: [[TMP9:%.*]] = lshr <4 x i64> [[TMP8]], splat (i64 15)113; CHECK-NEXT: [[TMP10:%.*]] = trunc <4 x i64> [[TMP9]] to <4 x i32>114; CHECK-NEXT: [[TMP11:%.*]] = icmp ult <4 x i32> [[TMP10]], splat (i32 255)115; CHECK-NEXT: [[TMP12:%.*]] = and <4 x i64> [[TMP9]], splat (i64 4294967295)116; CHECK-NEXT: [[TMP13:%.*]] = select <4 x i1> [[TMP11]], <4 x i64> [[TMP12]], <4 x i64> splat (i64 255)117; CHECK-NEXT: store <4 x i64> [[TMP13]], ptr [[TMP0]], align 8, !tbaa [[LONG_TBAA5]]118; CHECK-NEXT: ret void119;120 %4 = zext i32 %1 to i64121 %5 = load i64, ptr %0, align 8, !tbaa !7122 %6 = mul i64 %5, %4123 %7 = lshr i64 %6, 15124 %8 = trunc i64 %7 to i32125 %9 = icmp ult i32 %8, 255126 %10 = and i64 %7, 4294967295127 %11 = select i1 %9, i64 %10, i64 255128 store i64 %11, ptr %0, align 8, !tbaa !7129 %12 = getelementptr inbounds i64, ptr %0, i64 1130 %13 = load i64, ptr %12, align 8, !tbaa !7131 %14 = mul i64 %13, %4132 %15 = lshr i64 %14, 15133 %16 = trunc i64 %15 to i32134 %17 = icmp ult i32 %16, 255135 %18 = and i64 %15, 4294967295136 %19 = select i1 %17, i64 %18, i64 255137 store i64 %19, ptr %12, align 8, !tbaa !7138 %20 = getelementptr inbounds i64, ptr %0, i64 2139 %21 = load i64, ptr %20, align 8, !tbaa !7140 %22 = mul i64 %21, %4141 %23 = lshr i64 %22, 15142 %24 = trunc i64 %23 to i32143 %25 = icmp ult i32 %24, 255144 %26 = and i64 %23, 4294967295145 %27 = select i1 %25, i64 %26, i64 255146 store i64 %27, ptr %20, align 8, !tbaa !7147 %28 = getelementptr inbounds i64, ptr %0, i64 3148 %29 = load i64, ptr %28, align 8, !tbaa !7149 %30 = mul i64 %29, %4150 %31 = lshr i64 %30, 15151 %32 = trunc i64 %31 to i32152 %33 = icmp ult i32 %32, 255153 %34 = and i64 %31, 4294967295154 %35 = select i1 %33, i64 %34, i64 255155 store i64 %35, ptr %28, align 8, !tbaa !7156 ret void157}158 159!2 = !{!3, !3, i64 0}160!3 = !{!"int", !4, i64 0}161!4 = !{!"omnipotent char", !5, i64 0}162!5 = !{!"Simple C++ TBAA"}163!6 = !{!4, !4, i64 0}164!7 = !{!8, !8, i64 0}165!8 = !{!"long", !4, i64 0}166;.167; CHECK: [[INT_TBAA0]] = !{[[META1:![0-9]+]], [[META1]], i64 0}168; CHECK: [[META1]] = !{!"int", [[META2:![0-9]+]], i64 0}169; CHECK: [[META2]] = !{!"omnipotent char", [[META3:![0-9]+]], i64 0}170; CHECK: [[META3]] = !{!"Simple C++ TBAA"}171; CHECK: [[CHAR_TBAA4]] = !{[[META2]], [[META2]], i64 0}172; CHECK: [[LONG_TBAA5]] = !{[[META6:![0-9]+]], [[META6]], i64 0}173; CHECK: [[META6]] = !{!"long", [[META2]], i64 0}174;.175