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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu -mcpu=znver2 < %s | FileCheck %s3 4define i32 @test(i32 %arg) {5; CHECK-LABEL: define i32 @test(6; CHECK-SAME: i32 [[ARG:%.*]]) #[[ATTR0:[0-9]+]] {7; CHECK-NEXT: [[BB:.*]]:8; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> <i32 0, i32 poison, i32 0, i32 0>, i32 [[ARG]], i32 19; CHECK-NEXT: br label %[[BB1:.*]]10; CHECK: [[BB1]]:11; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ 0, %[[BB]] ], [ [[OP_RDX:%.*]], %[[BB1]] ]12; CHECK-NEXT: [[TMP5:%.*]] = or <4 x i32> [[TMP0]], zeroinitializer13; CHECK-NEXT: [[TMP6:%.*]] = or <4 x i32> [[TMP5]], zeroinitializer14; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <4 x i32> [[TMP6]], <4 x i32> poison, <8 x i32> <i32 0, i32 0, i32 1, i32 1, i32 2, i32 2, i32 3, i32 3>15; CHECK-NEXT: [[TMP8:%.*]] = shufflevector <4 x i32> [[TMP6]], <4 x i32> poison, <2 x i32> <i32 0, i32 3>16; CHECK-NEXT: [[TMP9:%.*]] = mul <2 x i32> zeroinitializer, [[TMP8]]17; CHECK-NEXT: [[TMP10:%.*]] = shufflevector <2 x i32> [[TMP9]], <2 x i32> poison, <4 x i32> <i32 0, i32 0, i32 1, i32 1>18; CHECK-NEXT: [[TMP11:%.*]] = shufflevector <8 x i32> [[TMP7]], <8 x i32> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>19; CHECK-NEXT: [[RDX_OP:%.*]] = mul <4 x i32> [[TMP11]], [[TMP10]]20; CHECK-NEXT: [[TMP14:%.*]] = shufflevector <4 x i32> [[RDX_OP]], <4 x i32> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>21; CHECK-NEXT: [[TMP12:%.*]] = shufflevector <8 x i32> [[TMP7]], <8 x i32> [[TMP14]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7>22; CHECK-NEXT: [[TMP13:%.*]] = call i32 @llvm.vector.reduce.mul.v8i32(<8 x i32> [[TMP12]])23; CHECK-NEXT: [[OP_RDX]] = mul i32 0, [[TMP13]]24; CHECK-NEXT: br label %[[BB1]]25;26bb:27 br label %bb128 29bb1:30 %phi = phi i32 [ 0, %bb ], [ %mul37, %bb1 ]31 %mul = mul i64 0, 032 %trunc = trunc i64 %mul to i3233 %or = or i32 0, %trunc34 %or2 = or i32 0, %or35 %or3 = or i32 %or2, 036 %mul4 = mul i32 0, %or337 %mul5 = mul i32 %or3, 038 %mul6 = mul i32 %mul5, %mul439 %mul7 = mul i32 %mul6, %mul440 %mul8 = mul i32 %mul7, %or341 %mul9 = mul i64 0, 042 %trunc10 = trunc i64 %mul9 to i3243 %or11 = or i32 0, %trunc1044 %or12 = or i32 %arg, %or1145 %or13 = or i32 %or12, 046 %mul14 = mul i32 %or13, %mul847 %mul15 = mul i32 %mul14, 048 %mul16 = mul i32 %mul15, 049 %mul17 = mul i32 %mul16, %or1350 %shl = shl i64 0, 051 %mul18 = mul i64 %shl, 052 %trunc19 = trunc i64 %mul18 to i3253 %or20 = or i32 0, %trunc1954 %or21 = or i32 0, %or2055 %or22 = or i32 %or21, 056 %mul23 = mul i32 %or22, %mul1757 %mul24 = mul i32 %mul23, 058 %mul25 = mul i32 %mul24, 059 %mul26 = mul i32 %mul25, %or2260 %shl27 = shl i64 0, 061 %mul28 = mul i64 %shl27, 062 %trunc29 = trunc i64 %mul28 to i3263 %or30 = or i32 0, %trunc2964 %or31 = or i32 0, %or3065 %or32 = or i32 %or31, 066 %mul33 = mul i32 0, %or3267 %mul34 = mul i32 %or32, %mul2668 %mul35 = mul i32 %mul34, %mul3369 %mul36 = mul i32 %mul35, %mul3370 %mul37 = mul i32 %mul36, %or3271 br label %bb172}73