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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes=slp-vectorizer -S < %s | FileCheck %s3 4target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128-ni:1-p2:32:8:8:32-ni:2"5target triple = "x86_64-unknown-linux-gnu"6 7define void @"foo"(ptr addrspace(1) %0, ptr addrspace(1) %1) #0 {8; CHECK-LABEL: @foo(9; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP0:%.*]], i64 810; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP1:%.*]], i64 811; CHECK-NEXT: [[TMP5:%.*]] = call <6 x float> @llvm.masked.load.v6f32.p1(ptr addrspace(1) align 4 [[TMP3]], <6 x i1> <i1 true, i1 true, i1 false, i1 false, i1 true, i1 true>, <6 x float> poison)12; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <6 x float> [[TMP5]], <6 x float> poison, <4 x i32> <i32 0, i32 1, i32 5, i32 4>13; CHECK-NEXT: [[TMP9:%.*]] = load <8 x float>, ptr addrspace(1) [[TMP4]], align 414; CHECK-NEXT: [[TMP12:%.*]] = shufflevector <6 x float> [[TMP5]], <6 x float> poison, <8 x i32> <i32 0, i32 4, i32 0, i32 4, i32 5, i32 1, i32 5, i32 1>15; CHECK-NEXT: [[TMP13:%.*]] = fmul <8 x float> [[TMP12]], [[TMP9]]16; CHECK-NEXT: [[TMP14:%.*]] = fadd <8 x float> [[TMP13]], zeroinitializer17; CHECK-NEXT: [[TMP15:%.*]] = shufflevector <8 x float> [[TMP14]], <8 x float> poison, <8 x i32> <i32 0, i32 5, i32 2, i32 7, i32 4, i32 1, i32 6, i32 3>18; CHECK-NEXT: store <8 x float> [[TMP15]], ptr addrspace(1) [[TMP3]], align 419; CHECK-NEXT: ret void20;21 %3 = getelementptr inbounds i8, ptr addrspace(1) %0, i64 822 %4 = load float, ptr addrspace(1) %3 , align 423 %5 = getelementptr inbounds i8, ptr addrspace(1) %1, i64 824 %6 = load float, ptr addrspace(1) %5 , align 425 %7 = fmul float %4, %626 %8 = fadd float %7, 0.000000e+0027 %9 = getelementptr inbounds i8, ptr addrspace(1) %0, i64 1228 %10 = load float, ptr addrspace(1) %9 , align 429 %11 = getelementptr inbounds i8, ptr addrspace(1) %1, i64 2830 %12 = load float, ptr addrspace(1) %11 , align 431 %13 = fmul float %10, %1232 %14 = fadd float %13, 0.000000e+0033 %15 = getelementptr inbounds i8, ptr addrspace(1) %1, i64 1634 %16 = load float, ptr addrspace(1) %15 , align 435 %17 = fmul float %4, %1636 %18 = fadd float %17, 0.000000e+0037 %19 = getelementptr inbounds i8, ptr addrspace(1) %1, i64 3638 %20 = load float, ptr addrspace(1) %19 , align 439 %21 = fmul float %10, %2040 %22 = fadd float %21, 0.000000e+0041 %23 = getelementptr inbounds i8, ptr addrspace(1) %0, i64 2842 %24 = load float, ptr addrspace(1) %23 , align 443 %25 = getelementptr inbounds i8, ptr addrspace(1) %1, i64 2444 %26 = load float, ptr addrspace(1) %25 , align 445 %27 = fmul float %24, %2646 %28 = fadd float %27, 0.000000e+0047 %29 = getelementptr inbounds i8, ptr addrspace(1) %0, i64 2448 %30 = load float, ptr addrspace(1) %29 , align 449 %31 = getelementptr inbounds i8, ptr addrspace(1) %1, i64 1250 %32 = load float, ptr addrspace(1) %31 , align 451 %33 = fmul float %30, %3252 %34 = fadd float %33, 0.000000e+0053 %35 = getelementptr inbounds i8, ptr addrspace(1) %1, i64 3254 %36 = load float, ptr addrspace(1) %35 , align 455 %37 = fmul float %24, %3656 %38 = fadd float %37, 0.000000e+0057 %39 = getelementptr inbounds i8, ptr addrspace(1) %1, i64 2058 %40 = load float, ptr addrspace(1) %39 , align 459 %41 = fmul float %30, %4060 %42 = fadd float %41, 0.000000e+0061 store float %8, ptr addrspace(1) %3 , align 462 store float %14, ptr addrspace(1) %9 , align 463 %43 = getelementptr inbounds i8, ptr addrspace(1) %0, i64 1664 store float %18, ptr addrspace(1) %43 , align 465 %44 = getelementptr inbounds i8, ptr addrspace(1) %0, i64 2066 store float %22, ptr addrspace(1) %44 , align 467 store float %28, ptr addrspace(1) %29 , align 468 store float %34, ptr addrspace(1) %23 , align 469 %45 = getelementptr inbounds i8, ptr addrspace(1) %0, i64 3270 store float %38, ptr addrspace(1) %45 , align 471 %46 = getelementptr inbounds i8, ptr addrspace(1) %0, i64 3672 store float %42, ptr addrspace(1) %46 , align 473 ret void74}75 76attributes #0 = { "target-cpu"="skylake" }77 78