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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu -slp-threshold=-4 < %s | FileCheck %s3 4define i32 @test(ptr %f, i1 %tobool.i.4, i32 %retval.0.i.219) {5; CHECK-LABEL: define i32 @test(6; CHECK-SAME: ptr [[F:%.*]], i1 [[TOBOOL_I_4:%.*]], i32 [[RETVAL_0_I_219:%.*]]) {7; CHECK-NEXT: [[ENTRY:.*]]:8; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[F]], align 49; CHECK-NEXT: br label %[[D_EXIT_3:.*]]10; CHECK: [[IF_END_I_1:.*]]:11; CHECK-NEXT: br label %[[D_EXIT_3]]12; CHECK: [[IF_END_I_2:.*]]:13; CHECK-NEXT: br i1 false, label %[[D_EXIT_3]], label %[[D_EXIT_6:.*]]14; CHECK: [[D_EXIT_3]]:15; CHECK-NEXT: [[TMP1:%.*]] = phi <2 x i32> [ poison, %[[IF_END_I_2]] ], [ zeroinitializer, %[[ENTRY]] ], [ poison, %[[IF_END_I_1]] ]16; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> <i32 poison, i32 1>, i32 [[RETVAL_0_I_219]], i32 017; CHECK-NEXT: br i1 [[TOBOOL_I_4]], label %[[D_EXIT_4:.*]], label %[[D_EXIT_6]]18; CHECK: [[D_EXIT_4]]:19; CHECK-NEXT: br label %[[D_EXIT_6]]20; CHECK: [[IF_END_I_5:.*]]:21; CHECK-NEXT: br i1 false, label %[[D_EXIT_6]], label %[[D_EXIT_7:.*]]22; CHECK: [[D_EXIT_6]]:23; CHECK-NEXT: [[TMP3:%.*]] = phi <2 x i32> [ poison, %[[IF_END_I_5]] ], [ [[TMP1]], %[[D_EXIT_3]] ], [ poison, %[[IF_END_I_2]] ], [ [[TMP1]], %[[D_EXIT_4]] ]24; CHECK-NEXT: [[TMP4:%.*]] = phi <2 x i32> [ poison, %[[IF_END_I_5]] ], [ [[TMP2]], %[[D_EXIT_3]] ], [ poison, %[[IF_END_I_2]] ], [ zeroinitializer, %[[D_EXIT_4]] ]25; CHECK-NEXT: [[TMP8:%.*]] = phi <2 x i32> [ poison, %[[IF_END_I_5]] ], [ zeroinitializer, %[[D_EXIT_3]] ], [ poison, %[[IF_END_I_2]] ], [ zeroinitializer, %[[D_EXIT_4]] ]26; CHECK-NEXT: br label %[[D_EXIT_7]]27; CHECK: [[D_EXIT_7]]:28; CHECK-NEXT: [[TMP6:%.*]] = phi <2 x i32> [ [[TMP3]], %[[D_EXIT_6]] ], [ poison, %[[IF_END_I_5]] ]29; CHECK-NEXT: [[TMP7:%.*]] = phi <2 x i32> [ [[TMP4]], %[[D_EXIT_6]] ], [ poison, %[[IF_END_I_5]] ]30; CHECK-NEXT: [[TMP5:%.*]] = phi <2 x i32> [ [[TMP8]], %[[D_EXIT_6]] ], [ poison, %[[IF_END_I_5]] ]31; CHECK-NEXT: [[TMP13:%.*]] = shufflevector <2 x i32> [[TMP5]], <2 x i32> poison, <4 x i32> <i32 0, i32 1, i32 0, i32 1>32; CHECK-NEXT: [[TMP10:%.*]] = shufflevector <2 x i32> [[TMP7]], <2 x i32> poison, <4 x i32> <i32 0, i32 1, i32 0, i32 1>33; CHECK-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> <i32 poison, i32 1, i32 1, i32 poison>, i32 [[TMP0]], i32 034; CHECK-NEXT: [[TMP15:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[RETVAL_0_I_219]], i32 335; CHECK-NEXT: [[TMP16:%.*]] = add <4 x i32> [[TMP15]], [[TMP13]]36; CHECK-NEXT: [[TMP14:%.*]] = shufflevector <2 x i32> [[TMP6]], <2 x i32> poison, <4 x i32> <i32 0, i32 1, i32 0, i32 1>37; CHECK-NEXT: [[TMP21:%.*]] = shufflevector <4 x i32> [[TMP14]], <4 x i32> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>38; CHECK-NEXT: [[TMP24:%.*]] = shufflevector <4 x i32> [[TMP10]], <4 x i32> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>39; CHECK-NEXT: [[TMP22:%.*]] = shufflevector <8 x i32> [[TMP21]], <8 x i32> [[TMP24]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>40; CHECK-NEXT: [[TMP23:%.*]] = shufflevector <2 x i32> [[TMP2]], <2 x i32> poison, <8 x i32> <i32 0, i32 0, i32 poison, i32 poison, i32 poison, i32 0, i32 0, i32 poison>41; CHECK-NEXT: [[TMP18:%.*]] = shufflevector <8 x i32> [[TMP23]], <8 x i32> <i32 poison, i32 poison, i32 1, i32 1, i32 1, i32 poison, i32 poison, i32 1>, <8 x i32> <i32 0, i32 1, i32 10, i32 11, i32 12, i32 5, i32 6, i32 15>42; CHECK-NEXT: [[TMP19:%.*]] = add <8 x i32> [[TMP18]], [[TMP22]]43; CHECK-NEXT: [[TMP20:%.*]] = shufflevector <8 x i32> [[TMP19]], <8 x i32> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>44; CHECK-NEXT: [[RDX_OP:%.*]] = or <4 x i32> [[TMP20]], [[TMP16]]45; CHECK-NEXT: [[TMP25:%.*]] = shufflevector <4 x i32> [[RDX_OP]], <4 x i32> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>46; CHECK-NEXT: [[TMP12:%.*]] = shufflevector <8 x i32> [[TMP19]], <8 x i32> [[TMP25]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7>47; CHECK-NEXT: [[TMP17:%.*]] = call i32 @llvm.vector.reduce.or.v8i32(<8 x i32> [[TMP12]])48; CHECK-NEXT: ret i32 [[TMP17]]49;50entry:51 %0 = load i32, ptr %f, align 452 br label %d.exit.353 54if.end.i.1:55 br label %d.exit.356 57if.end.i.2:58 br i1 false, label %d.exit.3, label %d.exit.659 60d.exit.3:61 %retval.0.i.2191 = phi i32 [ 1, %if.end.i.2 ], [ 0, %entry ], [ 0, %if.end.i.1 ]62 %retval.0.i91117 = phi i32 [ 0, %if.end.i.2 ], [ 0, %entry ], [ 1, %if.end.i.1 ]63 br i1 %tobool.i.4, label %d.exit.4, label %d.exit.664 65d.exit.4:66 br label %d.exit.667 68if.end.i.5:69 br i1 false, label %d.exit.6, label %d.exit.770 71d.exit.6:72 %retval.0.i.549 = phi i32 [ -1, %if.end.i.5 ], [ 0, %d.exit.3 ], [ 0, %if.end.i.2 ], [ 0, %d.exit.4 ]73 %retval.0.i.3272947 = phi i32 [ 0, %if.end.i.5 ], [ 1, %d.exit.3 ], [ 0, %if.end.i.2 ], [ 0, %d.exit.4 ]74 %retval.0.i.11315253145 = phi i32 [ 0, %if.end.i.5 ], [ %retval.0.i.2191, %d.exit.3 ], [ 0, %if.end.i.2 ], [ %retval.0.i.2191, %d.exit.4 ]75 %retval.0.i91117233343 = phi i32 [ 0, %if.end.i.5 ], [ %retval.0.i91117, %d.exit.3 ], [ 0, %if.end.i.2 ], [ %retval.0.i91117, %d.exit.4 ]76 %retval.0.i.219213541 = phi i32 [ 0, %if.end.i.5 ], [ %retval.0.i.219, %d.exit.3 ], [ 0, %if.end.i.2 ], [ 0, %d.exit.4 ]77 %retval.0.i.43739 = phi i32 [ 1, %if.end.i.5 ], [ 0, %d.exit.3 ], [ 0, %if.end.i.2 ], [ 0, %d.exit.4 ]78 br label %d.exit.779 80d.exit.7:81 %retval.0.i.4373961 = phi i32 [ %retval.0.i.43739, %d.exit.6 ], [ 0, %if.end.i.5 ]82 %retval.0.i.21921354159 = phi i32 [ %retval.0.i.219213541, %d.exit.6 ], [ 0, %if.end.i.5 ]83 %retval.0.i9111723334357 = phi i32 [ %retval.0.i91117233343, %d.exit.6 ], [ 0, %if.end.i.5 ]84 %retval.0.i.1131525314555 = phi i32 [ %retval.0.i.11315253145, %d.exit.6 ], [ 0, %if.end.i.5 ]85 %retval.0.i.327294753 = phi i32 [ %retval.0.i.3272947, %d.exit.6 ], [ 0, %if.end.i.5 ]86 %retval.0.i.54951 = phi i32 [ %retval.0.i.549, %d.exit.6 ], [ 0, %if.end.i.5 ]87 %add.5 = add nsw i32 %retval.0.i.54951, 188 %add.4 = add i32 %0, %retval.0.i.437396189 %add.3 = add i32 %retval.0.i.219, %retval.0.i.32729475390 %add.2 = add i32 %retval.0.i.21921354159, 191 %add.1 = add i32 %retval.0.i.219, %retval.0.i.113152531455592 %add = add i32 %retval.0.i.219, %retval.0.i911172333435793 %add1 = add nsw i32 %retval.0.i9111723334357, 194 %1 = or i32 %add, %add195 %2 = or i32 %add.1, %196 %add1.1 = add nsw i32 %retval.0.i.1131525314555, 197 %or2.1 = or i32 %2, %add1.198 %3 = or i32 %add.2, %or2.199 %add1.2 = add i32 %retval.0.i.219, %retval.0.i.21921354159100 %or2.2 = or i32 %3, %add1.2101 %4 = or i32 %add.3, %or2.2102 %add1.3 = add nsw i32 %retval.0.i.327294753, 1103 %or2.3 = or i32 %4, %add1.3104 %5 = or i32 %add.4, %or2.3105 %add1.4 = add nsw i32 %retval.0.i.4373961, 1106 %or2.4 = or i32 %5, %add1.4107 %6 = or i32 %add.5, %or2.4108 %add1.5 = add i32 %retval.0.i.219, %retval.0.i.54951109 %or2.5 = or i32 %6, %add1.5110 ret i32 %or2.5111}112