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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -S -passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu -mcpu=cascadelake < %s | FileCheck %s3 4define void @test() {5; CHECK-LABEL: @test(6; CHECK-NEXT: entry:7; CHECK-NEXT: [[ARRAYIDX10_I_I86:%.*]] = getelementptr inbounds float, ptr undef, i64 28; CHECK-NEXT: [[ARRAYIDX21_I:%.*]] = getelementptr inbounds [4 x float], ptr undef, i64 29; CHECK-NEXT: br label [[BB1:%.*]]10; CHECK: bb1:11; CHECK-NEXT: [[TMP2:%.*]] = load float, ptr [[ARRAYIDX10_I_I86]], align 412; CHECK-NEXT: [[TMP0:%.*]] = load <2 x float>, ptr undef, align 413; CHECK-NEXT: [[TMP3:%.*]] = load <2 x float>, ptr undef, align 414; CHECK-NEXT: [[TMP1:%.*]] = fsub <2 x float> zeroinitializer, [[TMP0]]15; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x float> <float 0.000000e+00, float poison>, float [[TMP2]], i32 116; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x float> <float poison, float 0.000000e+00>, float [[TMP2]], i32 017; CHECK-NEXT: [[TMP7:%.*]] = call <2 x float> @llvm.fmuladd.v2f32(<2 x float> [[TMP4]], <2 x float> [[TMP3]], <2 x float> [[TMP6]])18; CHECK-NEXT: br i1 false, label [[BB2:%.*]], label [[BB3:%.*]]19; CHECK: bb2:20; CHECK-NEXT: [[TMP8:%.*]] = fmul <2 x float> [[TMP7]], zeroinitializer21; CHECK-NEXT: br label [[BB3]]22; CHECK: bb3:23; CHECK-NEXT: [[TMP9:%.*]] = phi <2 x float> [ [[TMP8]], [[BB2]] ], [ zeroinitializer, [[BB1]] ]24; CHECK-NEXT: [[TMP10:%.*]] = shufflevector <2 x float> [[TMP9]], <2 x float> poison, <2 x i32> <i32 1, i32 0>25; CHECK-NEXT: [[TMP11:%.*]] = fadd <2 x float> [[TMP1]], [[TMP10]]26; CHECK-NEXT: [[TMP12:%.*]] = fadd <2 x float> [[TMP11]], zeroinitializer27; CHECK-NEXT: [[TMP13:%.*]] = fsub <2 x float> [[TMP12]], zeroinitializer28; CHECK-NEXT: [[TMP14:%.*]] = fsub <2 x float> [[TMP13]], zeroinitializer29; CHECK-NEXT: store <2 x float> [[TMP14]], ptr [[ARRAYIDX21_I]], align 1630; CHECK-NEXT: ret void31;32entry:33 %arrayidx10.i.i86 = getelementptr inbounds float, ptr undef, i64 234 %arrayidx6.i66.i = getelementptr inbounds float, ptr undef, i64 135 %arrayidx21.i = getelementptr inbounds [4 x float], ptr undef, i64 236 %arrayidx6.i109.i = getelementptr inbounds [4 x float], ptr undef, i64 2, i64 137 br label %bb138 39bb1:40 %0 = load float, ptr undef, align 441 %sub.i71.i = fsub float 0.000000e+00, %042 %1 = load float, ptr %arrayidx6.i66.i, align 443 %sub5.i74.i = fsub float 0.000000e+00, %144 %2 = load float, ptr %arrayidx10.i.i86, align 445 %3 = call float @llvm.fmuladd.f32(float %1, float %2, float 0.000000e+00)46 %4 = load float, ptr undef, align 447 %5 = call float @llvm.fmuladd.f32(float 0.000000e+00, float %4, float %2)48 br i1 false, label %bb2, label %bb349 50bb2:51 %mul.i95 = fmul float %3, 0.000000e+0052 %mul3.i96 = fmul float %5, 0.000000e+0053 br label %bb354 55bb3:56 %vddir.sroa.8.0.i = phi float [ %mul3.i96, %bb2 ], [ 0.000000e+00, %bb1 ]57 %vddir.sroa.0.0.i = phi float [ %mul.i95, %bb2 ], [ 0.000000e+00, %bb1 ]58 %add.i.i = fadd float %sub.i71.i, %vddir.sroa.0.0.i59 %add5.i.i = fadd float %sub5.i74.i, %vddir.sroa.8.0.i60 %add.i105.i = fadd float %add.i.i, 0.000000e+0061 %add5.i108.i = fadd float %add5.i.i, 0.000000e+0062 %sub.i114.i = fsub float %add.i105.i, 0.000000e+0063 %sub4.i.i = fsub float %add5.i108.i, 0.000000e+0064 %sub.i118.i = fsub float %sub.i114.i, 0.000000e+0065 store float %sub.i118.i, ptr %arrayidx21.i, align 1666 %sub4.i121.i = fsub float %sub4.i.i, 0.000000e+0067 store float %sub4.i121.i, ptr %arrayidx6.i109.i, align 468 ret void69}70 71declare float @llvm.fmuladd.f32(float, float, float)72 73