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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=slp-vectorizer,dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s3 4target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"5target triple = "x86_64-apple-macosx10.8.0"6 7define i32 @rollable(ptr noalias nocapture %in, ptr noalias nocapture %out, i64 %n) {8; CHECK-LABEL: @rollable(9; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[N:%.*]], 010; CHECK-NEXT: br i1 [[TMP1]], label [[DOT_CRIT_EDGE:%.*]], label [[DOTLR_PH:%.*]]11; CHECK: .lr.ph:12; CHECK-NEXT: [[I_019:%.*]] = phi i64 [ [[TMP8:%.*]], [[DOTLR_PH]] ], [ 0, [[TMP0:%.*]] ]13; CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[I_019]], 214; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[IN:%.*]], i64 [[TMP2]]15; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i32, ptr [[OUT:%.*]], i64 [[TMP2]]16; CHECK-NEXT: [[TMP5:%.*]] = load <4 x i32>, ptr [[TMP3]], align 417; CHECK-NEXT: [[TMP6:%.*]] = mul <4 x i32> [[TMP5]], splat (i32 7)18; CHECK-NEXT: [[TMP7:%.*]] = add <4 x i32> [[TMP6]], <i32 7, i32 14, i32 21, i32 28>19; CHECK-NEXT: store <4 x i32> [[TMP7]], ptr [[TMP4]], align 420; CHECK-NEXT: [[TMP8]] = add i64 [[I_019]], 121; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[TMP8]], [[N]]22; CHECK-NEXT: br i1 [[EXITCOND]], label [[DOT_CRIT_EDGE]], label [[DOTLR_PH]]23; CHECK: ._crit_edge:24; CHECK-NEXT: ret i32 undef25;26 %1 = icmp eq i64 %n, 027 br i1 %1, label %._crit_edge, label %.lr.ph28 29.lr.ph: ; preds = %0, %.lr.ph30 %i.019 = phi i64 [ %26, %.lr.ph ], [ 0, %0 ]31 %2 = shl i64 %i.019, 232 %3 = getelementptr inbounds i32, ptr %in, i64 %233 %4 = load i32, ptr %3, align 434 %5 = or disjoint i64 %2, 135 %6 = getelementptr inbounds i32, ptr %in, i64 %536 %7 = load i32, ptr %6, align 437 %8 = or disjoint i64 %2, 238 %9 = getelementptr inbounds i32, ptr %in, i64 %839 %10 = load i32, ptr %9, align 440 %11 = or disjoint i64 %2, 341 %12 = getelementptr inbounds i32, ptr %in, i64 %1142 %13 = load i32, ptr %12, align 443 %14 = mul i32 %4, 744 %15 = add i32 %14, 745 %16 = mul i32 %7, 746 %17 = add i32 %16, 1447 %18 = mul i32 %10, 748 %19 = add i32 %18, 2149 %20 = mul i32 %13, 750 %21 = add i32 %20, 2851 %22 = getelementptr inbounds i32, ptr %out, i64 %252 store i32 %15, ptr %22, align 453 %23 = getelementptr inbounds i32, ptr %out, i64 %554 store i32 %17, ptr %23, align 455 %24 = getelementptr inbounds i32, ptr %out, i64 %856 store i32 %19, ptr %24, align 457 %25 = getelementptr inbounds i32, ptr %out, i64 %1158 store i32 %21, ptr %25, align 459 %26 = add i64 %i.019, 160 %exitcond = icmp eq i64 %26, %n61 br i1 %exitcond, label %._crit_edge, label %.lr.ph62 63._crit_edge: ; preds = %.lr.ph, %064 ret i32 undef65}66 67define i32 @unrollable(ptr %in, ptr %out, i64 %n) nounwind ssp uwtable {68; CHECK-LABEL: @unrollable(69; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[N:%.*]], 070; CHECK-NEXT: br i1 [[TMP1]], label [[DOT_CRIT_EDGE:%.*]], label [[DOTLR_PH:%.*]]71; CHECK: .lr.ph:72; CHECK-NEXT: [[I_019:%.*]] = phi i64 [ [[TMP14:%.*]], [[DOTLR_PH]] ], [ 0, [[TMP0:%.*]] ]73; CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[I_019]], 274; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[IN:%.*]], i64 [[TMP2]]75; CHECK-NEXT: [[TMP4:%.*]] = or disjoint i64 [[TMP2]], 276; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, ptr [[IN]], i64 [[TMP4]]77; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[OUT:%.*]], i64 [[TMP2]]78; CHECK-NEXT: [[TMP7:%.*]] = load <2 x i32>, ptr [[TMP3]], align 479; CHECK-NEXT: [[TMP8:%.*]] = mul <2 x i32> [[TMP7]], splat (i32 7)80; CHECK-NEXT: [[TMP9:%.*]] = add <2 x i32> [[TMP8]], <i32 7, i32 14>81; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, ptr [[OUT]], i64 [[TMP4]]82; CHECK-NEXT: [[TMP11:%.*]] = load <2 x i32>, ptr [[TMP5]], align 483; CHECK-NEXT: [[TMP12:%.*]] = mul <2 x i32> [[TMP11]], splat (i32 7)84; CHECK-NEXT: [[TMP13:%.*]] = add <2 x i32> [[TMP12]], <i32 21, i32 28>85; CHECK-NEXT: store <2 x i32> [[TMP9]], ptr [[TMP6]], align 486; CHECK-NEXT: [[BARRIER:%.*]] = call i32 @goo(i32 0)87; CHECK-NEXT: store <2 x i32> [[TMP13]], ptr [[TMP10]], align 488; CHECK-NEXT: [[TMP14]] = add i64 [[I_019]], 189; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[TMP14]], [[N]]90; CHECK-NEXT: br i1 [[EXITCOND]], label [[DOT_CRIT_EDGE]], label [[DOTLR_PH]]91; CHECK: ._crit_edge:92; CHECK-NEXT: ret i32 undef93;94 %1 = icmp eq i64 %n, 095 br i1 %1, label %._crit_edge, label %.lr.ph96 97.lr.ph: ; preds = %0, %.lr.ph98 %i.019 = phi i64 [ %26, %.lr.ph ], [ 0, %0 ]99 %2 = shl i64 %i.019, 2100 %3 = getelementptr inbounds i32, ptr %in, i64 %2101 %4 = load i32, ptr %3, align 4102 %5 = or disjoint i64 %2, 1103 %6 = getelementptr inbounds i32, ptr %in, i64 %5104 %7 = load i32, ptr %6, align 4105 %8 = or disjoint i64 %2, 2106 %9 = getelementptr inbounds i32, ptr %in, i64 %8107 %10 = load i32, ptr %9, align 4108 %11 = or disjoint i64 %2, 3109 %12 = getelementptr inbounds i32, ptr %in, i64 %11110 %13 = load i32, ptr %12, align 4111 %14 = mul i32 %4, 7112 %15 = add i32 %14, 7113 %16 = mul i32 %7, 7114 %17 = add i32 %16, 14115 %18 = mul i32 %10, 7116 %19 = add i32 %18, 21117 %20 = mul i32 %13, 7118 %21 = add i32 %20, 28119 %22 = getelementptr inbounds i32, ptr %out, i64 %2120 store i32 %15, ptr %22, align 4121 %23 = getelementptr inbounds i32, ptr %out, i64 %5122 store i32 %17, ptr %23, align 4123 %barrier = call i32 @goo(i32 0) ; <---------------- memory barrier.124 %24 = getelementptr inbounds i32, ptr %out, i64 %8125 store i32 %19, ptr %24, align 4126 %25 = getelementptr inbounds i32, ptr %out, i64 %11127 store i32 %21, ptr %25, align 4128 %26 = add i64 %i.019, 1129 %exitcond = icmp eq i64 %26, %n130 br i1 %exitcond, label %._crit_edge, label %.lr.ph131 132._crit_edge: ; preds = %.lr.ph, %0133 ret i32 undef134}135 136declare i32 @goo(i32)137