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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -mtriple=x86_64-unknown -passes=slp-vectorizer -S | FileCheck %s --check-prefixes=CHECK,SSE3; RUN: opt < %s -mtriple=x86_64-unknown -mcpu=corei7-avx -passes=slp-vectorizer -S | FileCheck %s --check-prefixes=CHECK,AVX,AVX256,AVX256NODQ4; RUN: opt < %s -mtriple=x86_64-unknown -mcpu=bdver1 -passes=slp-vectorizer -S | FileCheck %s --check-prefixes=CHECK,AVX,AVX256,AVX256NODQ5; RUN: opt < %s -mtriple=x86_64-unknown -mcpu=core-avx2 -passes=slp-vectorizer -S | FileCheck %s --check-prefixes=CHECK,AVX,AVX256,AVX256NODQ6; RUN: opt < %s -mtriple=x86_64-unknown -mcpu=skylake-avx512 -mattr=-prefer-256-bit -passes=slp-vectorizer -S | FileCheck %s --check-prefixes=CHECK,AVX,AVX5127; RUN: opt < %s -mtriple=x86_64-unknown -mcpu=skylake-avx512 -mattr=+prefer-256-bit -passes=slp-vectorizer -S | FileCheck %s --check-prefixes=CHECK,AVX,AVX256,AVX256DQ8 9target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"10 11@src64 = common global [8 x i64] zeroinitializer, align 6412@src32 = common global [16 x i32] zeroinitializer, align 6413@src16 = common global [32 x i16] zeroinitializer, align 6414@src8 = common global [64 x i8] zeroinitializer, align 6415 16@dst64 = common global [8 x double] zeroinitializer, align 6417@dst32 = common global [16 x float] zeroinitializer, align 6418 19;20; SITOFP to vXf6421;22 23define void @sitofp_2i64_2f64() #0 {24; SSE-LABEL: @sitofp_2i64_2f64(25; SSE-NEXT: [[LD0:%.*]] = load i64, ptr @src64, align 6426; SSE-NEXT: [[LD1:%.*]] = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 1), align 827; SSE-NEXT: [[CVT0:%.*]] = sitofp i64 [[LD0]] to double28; SSE-NEXT: [[CVT1:%.*]] = sitofp i64 [[LD1]] to double29; SSE-NEXT: store double [[CVT0]], ptr @dst64, align 6430; SSE-NEXT: store double [[CVT1]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 1), align 831; SSE-NEXT: ret void32;33; AVX256NODQ-LABEL: @sitofp_2i64_2f64(34; AVX256NODQ-NEXT: [[LD0:%.*]] = load i64, ptr @src64, align 6435; AVX256NODQ-NEXT: [[LD1:%.*]] = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 1), align 836; AVX256NODQ-NEXT: [[CVT0:%.*]] = sitofp i64 [[LD0]] to double37; AVX256NODQ-NEXT: [[CVT1:%.*]] = sitofp i64 [[LD1]] to double38; AVX256NODQ-NEXT: store double [[CVT0]], ptr @dst64, align 6439; AVX256NODQ-NEXT: store double [[CVT1]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 1), align 840; AVX256NODQ-NEXT: ret void41;42; AVX512-LABEL: @sitofp_2i64_2f64(43; AVX512-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr @src64, align 6444; AVX512-NEXT: [[TMP2:%.*]] = sitofp <2 x i64> [[TMP1]] to <2 x double>45; AVX512-NEXT: store <2 x double> [[TMP2]], ptr @dst64, align 6446; AVX512-NEXT: ret void47;48; AVX256DQ-LABEL: @sitofp_2i64_2f64(49; AVX256DQ-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr @src64, align 6450; AVX256DQ-NEXT: [[TMP2:%.*]] = sitofp <2 x i64> [[TMP1]] to <2 x double>51; AVX256DQ-NEXT: store <2 x double> [[TMP2]], ptr @dst64, align 6452; AVX256DQ-NEXT: ret void53;54 %ld0 = load i64, ptr @src64, align 6455 %ld1 = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 1), align 856 %cvt0 = sitofp i64 %ld0 to double57 %cvt1 = sitofp i64 %ld1 to double58 store double %cvt0, ptr @dst64, align 6459 store double %cvt1, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 1), align 860 ret void61}62 63define void @sitofp_4i64_4f64() #0 {64; SSE-LABEL: @sitofp_4i64_4f64(65; SSE-NEXT: [[LD0:%.*]] = load i64, ptr @src64, align 6466; SSE-NEXT: [[LD1:%.*]] = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 1), align 867; SSE-NEXT: [[LD2:%.*]] = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 2), align 1668; SSE-NEXT: [[LD3:%.*]] = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 3), align 869; SSE-NEXT: [[CVT0:%.*]] = sitofp i64 [[LD0]] to double70; SSE-NEXT: [[CVT1:%.*]] = sitofp i64 [[LD1]] to double71; SSE-NEXT: [[CVT2:%.*]] = sitofp i64 [[LD2]] to double72; SSE-NEXT: [[CVT3:%.*]] = sitofp i64 [[LD3]] to double73; SSE-NEXT: store double [[CVT0]], ptr @dst64, align 6474; SSE-NEXT: store double [[CVT1]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 1), align 875; SSE-NEXT: store double [[CVT2]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 2), align 1676; SSE-NEXT: store double [[CVT3]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 3), align 877; SSE-NEXT: ret void78;79; AVX256NODQ-LABEL: @sitofp_4i64_4f64(80; AVX256NODQ-NEXT: [[LD0:%.*]] = load i64, ptr @src64, align 6481; AVX256NODQ-NEXT: [[LD1:%.*]] = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 1), align 882; AVX256NODQ-NEXT: [[LD2:%.*]] = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 2), align 1683; AVX256NODQ-NEXT: [[LD3:%.*]] = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 3), align 884; AVX256NODQ-NEXT: [[CVT0:%.*]] = sitofp i64 [[LD0]] to double85; AVX256NODQ-NEXT: [[CVT1:%.*]] = sitofp i64 [[LD1]] to double86; AVX256NODQ-NEXT: [[CVT2:%.*]] = sitofp i64 [[LD2]] to double87; AVX256NODQ-NEXT: [[CVT3:%.*]] = sitofp i64 [[LD3]] to double88; AVX256NODQ-NEXT: store double [[CVT0]], ptr @dst64, align 6489; AVX256NODQ-NEXT: store double [[CVT1]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 1), align 890; AVX256NODQ-NEXT: store double [[CVT2]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 2), align 1691; AVX256NODQ-NEXT: store double [[CVT3]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 3), align 892; AVX256NODQ-NEXT: ret void93;94; AVX512-LABEL: @sitofp_4i64_4f64(95; AVX512-NEXT: [[TMP1:%.*]] = load <4 x i64>, ptr @src64, align 6496; AVX512-NEXT: [[TMP2:%.*]] = sitofp <4 x i64> [[TMP1]] to <4 x double>97; AVX512-NEXT: store <4 x double> [[TMP2]], ptr @dst64, align 6498; AVX512-NEXT: ret void99;100; AVX256DQ-LABEL: @sitofp_4i64_4f64(101; AVX256DQ-NEXT: [[TMP1:%.*]] = load <4 x i64>, ptr @src64, align 64102; AVX256DQ-NEXT: [[TMP2:%.*]] = sitofp <4 x i64> [[TMP1]] to <4 x double>103; AVX256DQ-NEXT: store <4 x double> [[TMP2]], ptr @dst64, align 64104; AVX256DQ-NEXT: ret void105;106 %ld0 = load i64, ptr @src64, align 64107 %ld1 = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 1), align 8108 %ld2 = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 2), align 16109 %ld3 = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 3), align 8110 %cvt0 = sitofp i64 %ld0 to double111 %cvt1 = sitofp i64 %ld1 to double112 %cvt2 = sitofp i64 %ld2 to double113 %cvt3 = sitofp i64 %ld3 to double114 store double %cvt0, ptr @dst64, align 64115 store double %cvt1, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 1), align 8116 store double %cvt2, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 2), align 16117 store double %cvt3, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 3), align 8118 ret void119}120 121define void @sitofp_8i64_8f64() #0 {122; SSE-LABEL: @sitofp_8i64_8f64(123; SSE-NEXT: [[LD0:%.*]] = load i64, ptr @src64, align 64124; SSE-NEXT: [[LD1:%.*]] = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 1), align 8125; SSE-NEXT: [[LD2:%.*]] = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 2), align 16126; SSE-NEXT: [[LD3:%.*]] = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 3), align 8127; SSE-NEXT: [[LD4:%.*]] = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 4), align 32128; SSE-NEXT: [[LD5:%.*]] = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 5), align 8129; SSE-NEXT: [[LD6:%.*]] = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 6), align 16130; SSE-NEXT: [[LD7:%.*]] = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 7), align 8131; SSE-NEXT: [[CVT0:%.*]] = sitofp i64 [[LD0]] to double132; SSE-NEXT: [[CVT1:%.*]] = sitofp i64 [[LD1]] to double133; SSE-NEXT: [[CVT2:%.*]] = sitofp i64 [[LD2]] to double134; SSE-NEXT: [[CVT3:%.*]] = sitofp i64 [[LD3]] to double135; SSE-NEXT: [[CVT4:%.*]] = sitofp i64 [[LD4]] to double136; SSE-NEXT: [[CVT5:%.*]] = sitofp i64 [[LD5]] to double137; SSE-NEXT: [[CVT6:%.*]] = sitofp i64 [[LD6]] to double138; SSE-NEXT: [[CVT7:%.*]] = sitofp i64 [[LD7]] to double139; SSE-NEXT: store double [[CVT0]], ptr @dst64, align 64140; SSE-NEXT: store double [[CVT1]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 1), align 8141; SSE-NEXT: store double [[CVT2]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 2), align 16142; SSE-NEXT: store double [[CVT3]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 3), align 8143; SSE-NEXT: store double [[CVT4]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 4), align 32144; SSE-NEXT: store double [[CVT5]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 5), align 8145; SSE-NEXT: store double [[CVT6]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 6), align 16146; SSE-NEXT: store double [[CVT7]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 7), align 8147; SSE-NEXT: ret void148;149; AVX256NODQ-LABEL: @sitofp_8i64_8f64(150; AVX256NODQ-NEXT: [[LD0:%.*]] = load i64, ptr @src64, align 64151; AVX256NODQ-NEXT: [[LD1:%.*]] = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 1), align 8152; AVX256NODQ-NEXT: [[LD2:%.*]] = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 2), align 16153; AVX256NODQ-NEXT: [[LD3:%.*]] = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 3), align 8154; AVX256NODQ-NEXT: [[LD4:%.*]] = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 4), align 32155; AVX256NODQ-NEXT: [[LD5:%.*]] = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 5), align 8156; AVX256NODQ-NEXT: [[LD6:%.*]] = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 6), align 16157; AVX256NODQ-NEXT: [[LD7:%.*]] = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 7), align 8158; AVX256NODQ-NEXT: [[CVT0:%.*]] = sitofp i64 [[LD0]] to double159; AVX256NODQ-NEXT: [[CVT1:%.*]] = sitofp i64 [[LD1]] to double160; AVX256NODQ-NEXT: [[CVT2:%.*]] = sitofp i64 [[LD2]] to double161; AVX256NODQ-NEXT: [[CVT3:%.*]] = sitofp i64 [[LD3]] to double162; AVX256NODQ-NEXT: [[CVT4:%.*]] = sitofp i64 [[LD4]] to double163; AVX256NODQ-NEXT: [[CVT5:%.*]] = sitofp i64 [[LD5]] to double164; AVX256NODQ-NEXT: [[CVT6:%.*]] = sitofp i64 [[LD6]] to double165; AVX256NODQ-NEXT: [[CVT7:%.*]] = sitofp i64 [[LD7]] to double166; AVX256NODQ-NEXT: store double [[CVT0]], ptr @dst64, align 64167; AVX256NODQ-NEXT: store double [[CVT1]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 1), align 8168; AVX256NODQ-NEXT: store double [[CVT2]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 2), align 16169; AVX256NODQ-NEXT: store double [[CVT3]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 3), align 8170; AVX256NODQ-NEXT: store double [[CVT4]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 4), align 32171; AVX256NODQ-NEXT: store double [[CVT5]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 5), align 8172; AVX256NODQ-NEXT: store double [[CVT6]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 6), align 16173; AVX256NODQ-NEXT: store double [[CVT7]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 7), align 8174; AVX256NODQ-NEXT: ret void175;176; AVX512-LABEL: @sitofp_8i64_8f64(177; AVX512-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @src64, align 64178; AVX512-NEXT: [[TMP2:%.*]] = sitofp <8 x i64> [[TMP1]] to <8 x double>179; AVX512-NEXT: store <8 x double> [[TMP2]], ptr @dst64, align 64180; AVX512-NEXT: ret void181;182; AVX256DQ-LABEL: @sitofp_8i64_8f64(183; AVX256DQ-NEXT: [[TMP1:%.*]] = load <4 x i64>, ptr @src64, align 64184; AVX256DQ-NEXT: [[TMP2:%.*]] = sitofp <4 x i64> [[TMP1]] to <4 x double>185; AVX256DQ-NEXT: store <4 x double> [[TMP2]], ptr @dst64, align 64186; AVX256DQ-NEXT: [[TMP3:%.*]] = load <4 x i64>, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 4), align 32187; AVX256DQ-NEXT: [[TMP4:%.*]] = sitofp <4 x i64> [[TMP3]] to <4 x double>188; AVX256DQ-NEXT: store <4 x double> [[TMP4]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 4), align 32189; AVX256DQ-NEXT: ret void190;191 %ld0 = load i64, ptr @src64, align 64192 %ld1 = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 1), align 8193 %ld2 = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 2), align 16194 %ld3 = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 3), align 8195 %ld4 = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 4), align 32196 %ld5 = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 5), align 8197 %ld6 = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 6), align 16198 %ld7 = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 7), align 8199 %cvt0 = sitofp i64 %ld0 to double200 %cvt1 = sitofp i64 %ld1 to double201 %cvt2 = sitofp i64 %ld2 to double202 %cvt3 = sitofp i64 %ld3 to double203 %cvt4 = sitofp i64 %ld4 to double204 %cvt5 = sitofp i64 %ld5 to double205 %cvt6 = sitofp i64 %ld6 to double206 %cvt7 = sitofp i64 %ld7 to double207 store double %cvt0, ptr @dst64, align 64208 store double %cvt1, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 1), align 8209 store double %cvt2, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 2), align 16210 store double %cvt3, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 3), align 8211 store double %cvt4, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 4), align 32212 store double %cvt5, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 5), align 8213 store double %cvt6, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 6), align 16214 store double %cvt7, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 7), align 8215 ret void216}217 218define void @sitofp_2i32_2f64() #0 {219; CHECK-LABEL: @sitofp_2i32_2f64(220; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i32>, ptr @src32, align 64221; CHECK-NEXT: [[TMP2:%.*]] = sitofp <2 x i32> [[TMP1]] to <2 x double>222; CHECK-NEXT: store <2 x double> [[TMP2]], ptr @dst64, align 64223; CHECK-NEXT: ret void224;225 %ld0 = load i32, ptr @src32, align 64226 %ld1 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 1), align 4227 %cvt0 = sitofp i32 %ld0 to double228 %cvt1 = sitofp i32 %ld1 to double229 store double %cvt0, ptr @dst64, align 64230 store double %cvt1, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 1), align 8231 ret void232}233 234define void @sitofp_4i32_4f64() #0 {235; SSE-LABEL: @sitofp_4i32_4f64(236; SSE-NEXT: [[TMP1:%.*]] = load <2 x i32>, ptr @src32, align 64237; SSE-NEXT: [[TMP2:%.*]] = sitofp <2 x i32> [[TMP1]] to <2 x double>238; SSE-NEXT: store <2 x double> [[TMP2]], ptr @dst64, align 64239; SSE-NEXT: [[TMP3:%.*]] = load <2 x i32>, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 2), align 8240; SSE-NEXT: [[TMP4:%.*]] = sitofp <2 x i32> [[TMP3]] to <2 x double>241; SSE-NEXT: store <2 x double> [[TMP4]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 2), align 16242; SSE-NEXT: ret void243;244; AVX-LABEL: @sitofp_4i32_4f64(245; AVX-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr @src32, align 64246; AVX-NEXT: [[TMP2:%.*]] = sitofp <4 x i32> [[TMP1]] to <4 x double>247; AVX-NEXT: store <4 x double> [[TMP2]], ptr @dst64, align 64248; AVX-NEXT: ret void249;250 %ld0 = load i32, ptr @src32, align 64251 %ld1 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 1), align 4252 %ld2 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 2), align 8253 %ld3 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 3), align 4254 %cvt0 = sitofp i32 %ld0 to double255 %cvt1 = sitofp i32 %ld1 to double256 %cvt2 = sitofp i32 %ld2 to double257 %cvt3 = sitofp i32 %ld3 to double258 store double %cvt0, ptr @dst64, align 64259 store double %cvt1, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 1), align 8260 store double %cvt2, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 2), align 16261 store double %cvt3, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 3), align 8262 ret void263}264 265define void @sitofp_8i32_8f64() #0 {266; SSE-LABEL: @sitofp_8i32_8f64(267; SSE-NEXT: [[TMP1:%.*]] = load <2 x i32>, ptr @src32, align 64268; SSE-NEXT: [[TMP2:%.*]] = sitofp <2 x i32> [[TMP1]] to <2 x double>269; SSE-NEXT: store <2 x double> [[TMP2]], ptr @dst64, align 64270; SSE-NEXT: [[TMP3:%.*]] = load <2 x i32>, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 2), align 8271; SSE-NEXT: [[TMP4:%.*]] = sitofp <2 x i32> [[TMP3]] to <2 x double>272; SSE-NEXT: store <2 x double> [[TMP4]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 2), align 16273; SSE-NEXT: [[TMP5:%.*]] = load <2 x i32>, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 4), align 16274; SSE-NEXT: [[TMP6:%.*]] = sitofp <2 x i32> [[TMP5]] to <2 x double>275; SSE-NEXT: store <2 x double> [[TMP6]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 4), align 32276; SSE-NEXT: [[TMP7:%.*]] = load <2 x i32>, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 6), align 8277; SSE-NEXT: [[TMP8:%.*]] = sitofp <2 x i32> [[TMP7]] to <2 x double>278; SSE-NEXT: store <2 x double> [[TMP8]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 6), align 16279; SSE-NEXT: ret void280;281; AVX256-LABEL: @sitofp_8i32_8f64(282; AVX256-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr @src32, align 64283; AVX256-NEXT: [[TMP2:%.*]] = sitofp <4 x i32> [[TMP1]] to <4 x double>284; AVX256-NEXT: store <4 x double> [[TMP2]], ptr @dst64, align 64285; AVX256-NEXT: [[TMP3:%.*]] = load <4 x i32>, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 4), align 16286; AVX256-NEXT: [[TMP4:%.*]] = sitofp <4 x i32> [[TMP3]] to <4 x double>287; AVX256-NEXT: store <4 x double> [[TMP4]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 4), align 32288; AVX256-NEXT: ret void289;290; AVX512-LABEL: @sitofp_8i32_8f64(291; AVX512-NEXT: [[TMP1:%.*]] = load <8 x i32>, ptr @src32, align 64292; AVX512-NEXT: [[TMP2:%.*]] = sitofp <8 x i32> [[TMP1]] to <8 x double>293; AVX512-NEXT: store <8 x double> [[TMP2]], ptr @dst64, align 64294; AVX512-NEXT: ret void295;296 %ld0 = load i32, ptr @src32, align 64297 %ld1 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 1), align 4298 %ld2 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 2), align 8299 %ld3 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 3), align 4300 %ld4 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 4), align 16301 %ld5 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 5), align 4302 %ld6 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 6), align 8303 %ld7 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 7), align 4304 %cvt0 = sitofp i32 %ld0 to double305 %cvt1 = sitofp i32 %ld1 to double306 %cvt2 = sitofp i32 %ld2 to double307 %cvt3 = sitofp i32 %ld3 to double308 %cvt4 = sitofp i32 %ld4 to double309 %cvt5 = sitofp i32 %ld5 to double310 %cvt6 = sitofp i32 %ld6 to double311 %cvt7 = sitofp i32 %ld7 to double312 store double %cvt0, ptr @dst64, align 64313 store double %cvt1, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 1), align 8314 store double %cvt2, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 2), align 16315 store double %cvt3, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 3), align 8316 store double %cvt4, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 4), align 32317 store double %cvt5, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 5), align 8318 store double %cvt6, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 6), align 16319 store double %cvt7, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 7), align 8320 ret void321}322 323define void @sitofp_2i16_2f64() #0 {324; CHECK-LABEL: @sitofp_2i16_2f64(325; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i16>, ptr @src16, align 64326; CHECK-NEXT: [[TMP2:%.*]] = sitofp <2 x i16> [[TMP1]] to <2 x double>327; CHECK-NEXT: store <2 x double> [[TMP2]], ptr @dst64, align 64328; CHECK-NEXT: ret void329;330 %ld0 = load i16, ptr @src16, align 64331 %ld1 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 1), align 2332 %cvt0 = sitofp i16 %ld0 to double333 %cvt1 = sitofp i16 %ld1 to double334 store double %cvt0, ptr @dst64, align 64335 store double %cvt1, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 1), align 8336 ret void337}338 339define void @sitofp_4i16_4f64() #0 {340; SSE-LABEL: @sitofp_4i16_4f64(341; SSE-NEXT: [[TMP1:%.*]] = load <2 x i16>, ptr @src16, align 64342; SSE-NEXT: [[TMP2:%.*]] = sitofp <2 x i16> [[TMP1]] to <2 x double>343; SSE-NEXT: store <2 x double> [[TMP2]], ptr @dst64, align 64344; SSE-NEXT: [[TMP3:%.*]] = load <2 x i16>, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 2), align 4345; SSE-NEXT: [[TMP4:%.*]] = sitofp <2 x i16> [[TMP3]] to <2 x double>346; SSE-NEXT: store <2 x double> [[TMP4]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 2), align 16347; SSE-NEXT: ret void348;349; AVX-LABEL: @sitofp_4i16_4f64(350; AVX-NEXT: [[TMP1:%.*]] = load <4 x i16>, ptr @src16, align 64351; AVX-NEXT: [[TMP2:%.*]] = sitofp <4 x i16> [[TMP1]] to <4 x double>352; AVX-NEXT: store <4 x double> [[TMP2]], ptr @dst64, align 64353; AVX-NEXT: ret void354;355 %ld0 = load i16, ptr @src16, align 64356 %ld1 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 1), align 2357 %ld2 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 2), align 4358 %ld3 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 3), align 2359 %cvt0 = sitofp i16 %ld0 to double360 %cvt1 = sitofp i16 %ld1 to double361 %cvt2 = sitofp i16 %ld2 to double362 %cvt3 = sitofp i16 %ld3 to double363 store double %cvt0, ptr @dst64, align 64364 store double %cvt1, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 1), align 8365 store double %cvt2, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 2), align 16366 store double %cvt3, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 3), align 8367 ret void368}369 370define void @sitofp_8i16_8f64() #0 {371; SSE-LABEL: @sitofp_8i16_8f64(372; SSE-NEXT: [[TMP1:%.*]] = load <2 x i16>, ptr @src16, align 64373; SSE-NEXT: [[TMP2:%.*]] = sitofp <2 x i16> [[TMP1]] to <2 x double>374; SSE-NEXT: store <2 x double> [[TMP2]], ptr @dst64, align 64375; SSE-NEXT: [[TMP3:%.*]] = load <2 x i16>, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 2), align 4376; SSE-NEXT: [[TMP4:%.*]] = sitofp <2 x i16> [[TMP3]] to <2 x double>377; SSE-NEXT: store <2 x double> [[TMP4]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 2), align 16378; SSE-NEXT: [[TMP5:%.*]] = load <2 x i16>, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 4), align 8379; SSE-NEXT: [[TMP6:%.*]] = sitofp <2 x i16> [[TMP5]] to <2 x double>380; SSE-NEXT: store <2 x double> [[TMP6]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 4), align 32381; SSE-NEXT: [[TMP7:%.*]] = load <2 x i16>, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 6), align 4382; SSE-NEXT: [[TMP8:%.*]] = sitofp <2 x i16> [[TMP7]] to <2 x double>383; SSE-NEXT: store <2 x double> [[TMP8]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 6), align 16384; SSE-NEXT: ret void385;386; AVX256-LABEL: @sitofp_8i16_8f64(387; AVX256-NEXT: [[TMP1:%.*]] = load <4 x i16>, ptr @src16, align 64388; AVX256-NEXT: [[TMP2:%.*]] = sitofp <4 x i16> [[TMP1]] to <4 x double>389; AVX256-NEXT: store <4 x double> [[TMP2]], ptr @dst64, align 64390; AVX256-NEXT: [[TMP3:%.*]] = load <4 x i16>, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 4), align 8391; AVX256-NEXT: [[TMP4:%.*]] = sitofp <4 x i16> [[TMP3]] to <4 x double>392; AVX256-NEXT: store <4 x double> [[TMP4]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 4), align 32393; AVX256-NEXT: ret void394;395; AVX512-LABEL: @sitofp_8i16_8f64(396; AVX512-NEXT: [[TMP1:%.*]] = load <8 x i16>, ptr @src16, align 64397; AVX512-NEXT: [[TMP2:%.*]] = sitofp <8 x i16> [[TMP1]] to <8 x double>398; AVX512-NEXT: store <8 x double> [[TMP2]], ptr @dst64, align 64399; AVX512-NEXT: ret void400;401 %ld0 = load i16, ptr @src16, align 64402 %ld1 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 1), align 2403 %ld2 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 2), align 4404 %ld3 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 3), align 2405 %ld4 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 4), align 8406 %ld5 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 5), align 2407 %ld6 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 6), align 4408 %ld7 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 7), align 2409 %cvt0 = sitofp i16 %ld0 to double410 %cvt1 = sitofp i16 %ld1 to double411 %cvt2 = sitofp i16 %ld2 to double412 %cvt3 = sitofp i16 %ld3 to double413 %cvt4 = sitofp i16 %ld4 to double414 %cvt5 = sitofp i16 %ld5 to double415 %cvt6 = sitofp i16 %ld6 to double416 %cvt7 = sitofp i16 %ld7 to double417 store double %cvt0, ptr @dst64, align 64418 store double %cvt1, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 1), align 8419 store double %cvt2, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 2), align 16420 store double %cvt3, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 3), align 8421 store double %cvt4, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 4), align 32422 store double %cvt5, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 5), align 8423 store double %cvt6, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 6), align 16424 store double %cvt7, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 7), align 8425 ret void426}427 428define void @sitofp_2i8_2f64() #0 {429; CHECK-LABEL: @sitofp_2i8_2f64(430; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i8>, ptr @src8, align 64431; CHECK-NEXT: [[TMP2:%.*]] = sitofp <2 x i8> [[TMP1]] to <2 x double>432; CHECK-NEXT: store <2 x double> [[TMP2]], ptr @dst64, align 64433; CHECK-NEXT: ret void434;435 %ld0 = load i8, ptr @src8, align 64436 %ld1 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 1), align 1437 %cvt0 = sitofp i8 %ld0 to double438 %cvt1 = sitofp i8 %ld1 to double439 store double %cvt0, ptr @dst64, align 64440 store double %cvt1, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 1), align 8441 ret void442}443 444define void @sitofp_4i8_4f64() #0 {445; SSE-LABEL: @sitofp_4i8_4f64(446; SSE-NEXT: [[TMP1:%.*]] = load <2 x i8>, ptr @src8, align 64447; SSE-NEXT: [[TMP2:%.*]] = sitofp <2 x i8> [[TMP1]] to <2 x double>448; SSE-NEXT: store <2 x double> [[TMP2]], ptr @dst64, align 64449; SSE-NEXT: [[TMP3:%.*]] = load <2 x i8>, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 2), align 2450; SSE-NEXT: [[TMP4:%.*]] = sitofp <2 x i8> [[TMP3]] to <2 x double>451; SSE-NEXT: store <2 x double> [[TMP4]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 2), align 16452; SSE-NEXT: ret void453;454; AVX-LABEL: @sitofp_4i8_4f64(455; AVX-NEXT: [[TMP1:%.*]] = load <4 x i8>, ptr @src8, align 64456; AVX-NEXT: [[TMP2:%.*]] = sitofp <4 x i8> [[TMP1]] to <4 x double>457; AVX-NEXT: store <4 x double> [[TMP2]], ptr @dst64, align 64458; AVX-NEXT: ret void459;460 %ld0 = load i8, ptr @src8, align 64461 %ld1 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 1), align 1462 %ld2 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 2), align 2463 %ld3 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 3), align 1464 %cvt0 = sitofp i8 %ld0 to double465 %cvt1 = sitofp i8 %ld1 to double466 %cvt2 = sitofp i8 %ld2 to double467 %cvt3 = sitofp i8 %ld3 to double468 store double %cvt0, ptr @dst64, align 64469 store double %cvt1, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 1), align 8470 store double %cvt2, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 2), align 16471 store double %cvt3, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 3), align 8472 ret void473}474 475define void @sitofp_8i8_8f64() #0 {476; SSE-LABEL: @sitofp_8i8_8f64(477; SSE-NEXT: [[TMP1:%.*]] = load <2 x i8>, ptr @src8, align 64478; SSE-NEXT: [[TMP2:%.*]] = sitofp <2 x i8> [[TMP1]] to <2 x double>479; SSE-NEXT: store <2 x double> [[TMP2]], ptr @dst64, align 64480; SSE-NEXT: [[TMP3:%.*]] = load <2 x i8>, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 2), align 2481; SSE-NEXT: [[TMP4:%.*]] = sitofp <2 x i8> [[TMP3]] to <2 x double>482; SSE-NEXT: store <2 x double> [[TMP4]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 2), align 16483; SSE-NEXT: [[TMP5:%.*]] = load <2 x i8>, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 4), align 4484; SSE-NEXT: [[TMP6:%.*]] = sitofp <2 x i8> [[TMP5]] to <2 x double>485; SSE-NEXT: store <2 x double> [[TMP6]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 4), align 32486; SSE-NEXT: [[TMP7:%.*]] = load <2 x i8>, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 6), align 2487; SSE-NEXT: [[TMP8:%.*]] = sitofp <2 x i8> [[TMP7]] to <2 x double>488; SSE-NEXT: store <2 x double> [[TMP8]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 6), align 16489; SSE-NEXT: ret void490;491; AVX256-LABEL: @sitofp_8i8_8f64(492; AVX256-NEXT: [[TMP1:%.*]] = load <4 x i8>, ptr @src8, align 64493; AVX256-NEXT: [[TMP2:%.*]] = sitofp <4 x i8> [[TMP1]] to <4 x double>494; AVX256-NEXT: store <4 x double> [[TMP2]], ptr @dst64, align 64495; AVX256-NEXT: [[TMP3:%.*]] = load <4 x i8>, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 4), align 4496; AVX256-NEXT: [[TMP4:%.*]] = sitofp <4 x i8> [[TMP3]] to <4 x double>497; AVX256-NEXT: store <4 x double> [[TMP4]], ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 4), align 32498; AVX256-NEXT: ret void499;500; AVX512-LABEL: @sitofp_8i8_8f64(501; AVX512-NEXT: [[TMP1:%.*]] = load <8 x i8>, ptr @src8, align 64502; AVX512-NEXT: [[TMP2:%.*]] = sitofp <8 x i8> [[TMP1]] to <8 x double>503; AVX512-NEXT: store <8 x double> [[TMP2]], ptr @dst64, align 64504; AVX512-NEXT: ret void505;506 %ld0 = load i8, ptr @src8, align 64507 %ld1 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 1), align 1508 %ld2 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 2), align 2509 %ld3 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 3), align 1510 %ld4 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 4), align 4511 %ld5 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 5), align 1512 %ld6 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 6), align 2513 %ld7 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 7), align 1514 %cvt0 = sitofp i8 %ld0 to double515 %cvt1 = sitofp i8 %ld1 to double516 %cvt2 = sitofp i8 %ld2 to double517 %cvt3 = sitofp i8 %ld3 to double518 %cvt4 = sitofp i8 %ld4 to double519 %cvt5 = sitofp i8 %ld5 to double520 %cvt6 = sitofp i8 %ld6 to double521 %cvt7 = sitofp i8 %ld7 to double522 store double %cvt0, ptr @dst64, align 64523 store double %cvt1, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 1), align 8524 store double %cvt2, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 2), align 16525 store double %cvt3, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 3), align 8526 store double %cvt4, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 4), align 32527 store double %cvt5, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 5), align 8528 store double %cvt6, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 6), align 16529 store double %cvt7, ptr getelementptr inbounds ([8 x double], ptr @dst64, i32 0, i64 7), align 8530 ret void531}532 533;534; SITOFP to vXf32535;536 537define void @sitofp_2i64_2f32() #0 {538; SSE-LABEL: @sitofp_2i64_2f32(539; SSE-NEXT: [[LD0:%.*]] = load i64, ptr @src64, align 64540; SSE-NEXT: [[LD1:%.*]] = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 1), align 8541; SSE-NEXT: [[CVT0:%.*]] = sitofp i64 [[LD0]] to float542; SSE-NEXT: [[CVT1:%.*]] = sitofp i64 [[LD1]] to float543; SSE-NEXT: store float [[CVT0]], ptr @dst32, align 64544; SSE-NEXT: store float [[CVT1]], ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 1), align 4545; SSE-NEXT: ret void546;547; AVX256NODQ-LABEL: @sitofp_2i64_2f32(548; AVX256NODQ-NEXT: [[LD0:%.*]] = load i64, ptr @src64, align 64549; AVX256NODQ-NEXT: [[LD1:%.*]] = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 1), align 8550; AVX256NODQ-NEXT: [[CVT0:%.*]] = sitofp i64 [[LD0]] to float551; AVX256NODQ-NEXT: [[CVT1:%.*]] = sitofp i64 [[LD1]] to float552; AVX256NODQ-NEXT: store float [[CVT0]], ptr @dst32, align 64553; AVX256NODQ-NEXT: store float [[CVT1]], ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 1), align 4554; AVX256NODQ-NEXT: ret void555;556; AVX512-LABEL: @sitofp_2i64_2f32(557; AVX512-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr @src64, align 64558; AVX512-NEXT: [[TMP2:%.*]] = sitofp <2 x i64> [[TMP1]] to <2 x float>559; AVX512-NEXT: store <2 x float> [[TMP2]], ptr @dst32, align 64560; AVX512-NEXT: ret void561;562; AVX256DQ-LABEL: @sitofp_2i64_2f32(563; AVX256DQ-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr @src64, align 64564; AVX256DQ-NEXT: [[TMP2:%.*]] = sitofp <2 x i64> [[TMP1]] to <2 x float>565; AVX256DQ-NEXT: store <2 x float> [[TMP2]], ptr @dst32, align 64566; AVX256DQ-NEXT: ret void567;568 %ld0 = load i64, ptr @src64, align 64569 %ld1 = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 1), align 8570 %cvt0 = sitofp i64 %ld0 to float571 %cvt1 = sitofp i64 %ld1 to float572 store float %cvt0, ptr @dst32, align 64573 store float %cvt1, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 1), align 4574 ret void575}576 577define void @sitofp_4i64_4f32() #0 {578; CHECK-LABEL: @sitofp_4i64_4f32(579; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i64>, ptr @src64, align 64580; CHECK-NEXT: [[TMP2:%.*]] = sitofp <4 x i64> [[TMP1]] to <4 x float>581; CHECK-NEXT: store <4 x float> [[TMP2]], ptr @dst32, align 64582; CHECK-NEXT: ret void583;584 %ld0 = load i64, ptr @src64, align 64585 %ld1 = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 1), align 8586 %ld2 = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 2), align 16587 %ld3 = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 3), align 8588 %cvt0 = sitofp i64 %ld0 to float589 %cvt1 = sitofp i64 %ld1 to float590 %cvt2 = sitofp i64 %ld2 to float591 %cvt3 = sitofp i64 %ld3 to float592 store float %cvt0, ptr @dst32, align 64593 store float %cvt1, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 1), align 4594 store float %cvt2, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 2), align 8595 store float %cvt3, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 3), align 4596 ret void597}598 599define void @sitofp_8i64_8f32() #0 {600; SSE-LABEL: @sitofp_8i64_8f32(601; SSE-NEXT: [[TMP1:%.*]] = load <4 x i64>, ptr @src64, align 64602; SSE-NEXT: [[TMP2:%.*]] = sitofp <4 x i64> [[TMP1]] to <4 x float>603; SSE-NEXT: store <4 x float> [[TMP2]], ptr @dst32, align 64604; SSE-NEXT: [[TMP3:%.*]] = load <4 x i64>, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 4), align 32605; SSE-NEXT: [[TMP4:%.*]] = sitofp <4 x i64> [[TMP3]] to <4 x float>606; SSE-NEXT: store <4 x float> [[TMP4]], ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 4), align 16607; SSE-NEXT: ret void608;609; AVX-LABEL: @sitofp_8i64_8f32(610; AVX-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @src64, align 64611; AVX-NEXT: [[TMP2:%.*]] = sitofp <8 x i64> [[TMP1]] to <8 x float>612; AVX-NEXT: store <8 x float> [[TMP2]], ptr @dst32, align 64613; AVX-NEXT: ret void614;615 %ld0 = load i64, ptr @src64, align 64616 %ld1 = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 1), align 8617 %ld2 = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 2), align 16618 %ld3 = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 3), align 8619 %ld4 = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 4), align 32620 %ld5 = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 5), align 8621 %ld6 = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 6), align 16622 %ld7 = load i64, ptr getelementptr inbounds ([8 x i64], ptr @src64, i32 0, i64 7), align 8623 %cvt0 = sitofp i64 %ld0 to float624 %cvt1 = sitofp i64 %ld1 to float625 %cvt2 = sitofp i64 %ld2 to float626 %cvt3 = sitofp i64 %ld3 to float627 %cvt4 = sitofp i64 %ld4 to float628 %cvt5 = sitofp i64 %ld5 to float629 %cvt6 = sitofp i64 %ld6 to float630 %cvt7 = sitofp i64 %ld7 to float631 store float %cvt0, ptr @dst32, align 64632 store float %cvt1, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 1), align 4633 store float %cvt2, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 2), align 8634 store float %cvt3, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 3), align 4635 store float %cvt4, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 4), align 16636 store float %cvt5, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 5), align 4637 store float %cvt6, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 6), align 8638 store float %cvt7, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 7), align 4639 ret void640}641 642define void @sitofp_4i32_4f32() #0 {643; CHECK-LABEL: @sitofp_4i32_4f32(644; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr @src32, align 64645; CHECK-NEXT: [[TMP2:%.*]] = sitofp <4 x i32> [[TMP1]] to <4 x float>646; CHECK-NEXT: store <4 x float> [[TMP2]], ptr @dst32, align 64647; CHECK-NEXT: ret void648;649 %ld0 = load i32, ptr @src32, align 64650 %ld1 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 1), align 4651 %ld2 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 2), align 8652 %ld3 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 3), align 4653 %cvt0 = sitofp i32 %ld0 to float654 %cvt1 = sitofp i32 %ld1 to float655 %cvt2 = sitofp i32 %ld2 to float656 %cvt3 = sitofp i32 %ld3 to float657 store float %cvt0, ptr @dst32, align 64658 store float %cvt1, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 1), align 4659 store float %cvt2, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 2), align 8660 store float %cvt3, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 3), align 4661 ret void662}663 664define void @sitofp_8i32_8f32() #0 {665; SSE-LABEL: @sitofp_8i32_8f32(666; SSE-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr @src32, align 64667; SSE-NEXT: [[TMP2:%.*]] = sitofp <4 x i32> [[TMP1]] to <4 x float>668; SSE-NEXT: store <4 x float> [[TMP2]], ptr @dst32, align 64669; SSE-NEXT: [[TMP3:%.*]] = load <4 x i32>, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 4), align 16670; SSE-NEXT: [[TMP4:%.*]] = sitofp <4 x i32> [[TMP3]] to <4 x float>671; SSE-NEXT: store <4 x float> [[TMP4]], ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 4), align 16672; SSE-NEXT: ret void673;674; AVX-LABEL: @sitofp_8i32_8f32(675; AVX-NEXT: [[TMP1:%.*]] = load <8 x i32>, ptr @src32, align 64676; AVX-NEXT: [[TMP2:%.*]] = sitofp <8 x i32> [[TMP1]] to <8 x float>677; AVX-NEXT: store <8 x float> [[TMP2]], ptr @dst32, align 64678; AVX-NEXT: ret void679;680 %ld0 = load i32, ptr @src32, align 64681 %ld1 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 1), align 4682 %ld2 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 2), align 8683 %ld3 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 3), align 4684 %ld4 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 4), align 16685 %ld5 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 5), align 4686 %ld6 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 6), align 8687 %ld7 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 7), align 4688 %cvt0 = sitofp i32 %ld0 to float689 %cvt1 = sitofp i32 %ld1 to float690 %cvt2 = sitofp i32 %ld2 to float691 %cvt3 = sitofp i32 %ld3 to float692 %cvt4 = sitofp i32 %ld4 to float693 %cvt5 = sitofp i32 %ld5 to float694 %cvt6 = sitofp i32 %ld6 to float695 %cvt7 = sitofp i32 %ld7 to float696 store float %cvt0, ptr @dst32, align 64697 store float %cvt1, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 1), align 4698 store float %cvt2, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 2), align 8699 store float %cvt3, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 3), align 4700 store float %cvt4, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 4), align 16701 store float %cvt5, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 5), align 4702 store float %cvt6, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 6), align 8703 store float %cvt7, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 7), align 4704 ret void705}706 707define void @sitofp_16i32_16f32() #0 {708; SSE-LABEL: @sitofp_16i32_16f32(709; SSE-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr @src32, align 64710; SSE-NEXT: [[TMP2:%.*]] = sitofp <4 x i32> [[TMP1]] to <4 x float>711; SSE-NEXT: store <4 x float> [[TMP2]], ptr @dst32, align 64712; SSE-NEXT: [[TMP3:%.*]] = load <4 x i32>, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 4), align 16713; SSE-NEXT: [[TMP4:%.*]] = sitofp <4 x i32> [[TMP3]] to <4 x float>714; SSE-NEXT: store <4 x float> [[TMP4]], ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 4), align 16715; SSE-NEXT: [[TMP5:%.*]] = load <4 x i32>, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 8), align 32716; SSE-NEXT: [[TMP6:%.*]] = sitofp <4 x i32> [[TMP5]] to <4 x float>717; SSE-NEXT: store <4 x float> [[TMP6]], ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 8), align 32718; SSE-NEXT: [[TMP7:%.*]] = load <4 x i32>, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 12), align 16719; SSE-NEXT: [[TMP8:%.*]] = sitofp <4 x i32> [[TMP7]] to <4 x float>720; SSE-NEXT: store <4 x float> [[TMP8]], ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 12), align 16721; SSE-NEXT: ret void722;723; AVX256-LABEL: @sitofp_16i32_16f32(724; AVX256-NEXT: [[TMP1:%.*]] = load <8 x i32>, ptr @src32, align 64725; AVX256-NEXT: [[TMP2:%.*]] = sitofp <8 x i32> [[TMP1]] to <8 x float>726; AVX256-NEXT: store <8 x float> [[TMP2]], ptr @dst32, align 64727; AVX256-NEXT: [[TMP3:%.*]] = load <8 x i32>, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 8), align 32728; AVX256-NEXT: [[TMP4:%.*]] = sitofp <8 x i32> [[TMP3]] to <8 x float>729; AVX256-NEXT: store <8 x float> [[TMP4]], ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 8), align 32730; AVX256-NEXT: ret void731;732; AVX512-LABEL: @sitofp_16i32_16f32(733; AVX512-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @src32, align 64734; AVX512-NEXT: [[TMP2:%.*]] = sitofp <16 x i32> [[TMP1]] to <16 x float>735; AVX512-NEXT: store <16 x float> [[TMP2]], ptr @dst32, align 64736; AVX512-NEXT: ret void737;738 %ld0 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 0 ), align 64739 %ld1 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 1 ), align 4740 %ld2 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 2 ), align 8741 %ld3 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 3 ), align 4742 %ld4 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 4 ), align 16743 %ld5 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 5 ), align 4744 %ld6 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 6 ), align 8745 %ld7 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 7 ), align 4746 %ld8 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 8 ), align 32747 %ld9 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 9 ), align 4748 %ld10 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 10), align 8749 %ld11 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 11), align 4750 %ld12 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 12), align 16751 %ld13 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 13), align 4752 %ld14 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 14), align 8753 %ld15 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @src32, i32 0, i64 15), align 4754 %cvt0 = sitofp i32 %ld0 to float755 %cvt1 = sitofp i32 %ld1 to float756 %cvt2 = sitofp i32 %ld2 to float757 %cvt3 = sitofp i32 %ld3 to float758 %cvt4 = sitofp i32 %ld4 to float759 %cvt5 = sitofp i32 %ld5 to float760 %cvt6 = sitofp i32 %ld6 to float761 %cvt7 = sitofp i32 %ld7 to float762 %cvt8 = sitofp i32 %ld8 to float763 %cvt9 = sitofp i32 %ld9 to float764 %cvt10 = sitofp i32 %ld10 to float765 %cvt11 = sitofp i32 %ld11 to float766 %cvt12 = sitofp i32 %ld12 to float767 %cvt13 = sitofp i32 %ld13 to float768 %cvt14 = sitofp i32 %ld14 to float769 %cvt15 = sitofp i32 %ld15 to float770 store float %cvt0 , ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 0 ), align 64771 store float %cvt1 , ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 1 ), align 4772 store float %cvt2 , ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 2 ), align 8773 store float %cvt3 , ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 3 ), align 4774 store float %cvt4 , ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 4 ), align 16775 store float %cvt5 , ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 5 ), align 4776 store float %cvt6 , ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 6 ), align 8777 store float %cvt7 , ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 7 ), align 4778 store float %cvt8 , ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 8 ), align 32779 store float %cvt9 , ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 9 ), align 4780 store float %cvt10, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 10), align 8781 store float %cvt11, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 11), align 4782 store float %cvt12, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 12), align 16783 store float %cvt13, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 13), align 4784 store float %cvt14, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 14), align 8785 store float %cvt15, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 15), align 4786 ret void787}788 789define void @sitofp_4i16_4f32() #0 {790; CHECK-LABEL: @sitofp_4i16_4f32(791; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i16>, ptr @src16, align 64792; CHECK-NEXT: [[TMP2:%.*]] = sitofp <4 x i16> [[TMP1]] to <4 x float>793; CHECK-NEXT: store <4 x float> [[TMP2]], ptr @dst32, align 64794; CHECK-NEXT: ret void795;796 %ld0 = load i16, ptr @src16, align 64797 %ld1 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 1), align 2798 %ld2 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 2), align 4799 %ld3 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 3), align 2800 %cvt0 = sitofp i16 %ld0 to float801 %cvt1 = sitofp i16 %ld1 to float802 %cvt2 = sitofp i16 %ld2 to float803 %cvt3 = sitofp i16 %ld3 to float804 store float %cvt0, ptr @dst32, align 64805 store float %cvt1, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 1), align 4806 store float %cvt2, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 2), align 8807 store float %cvt3, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 3), align 4808 ret void809}810 811define void @sitofp_8i16_8f32() #0 {812; SSE-LABEL: @sitofp_8i16_8f32(813; SSE-NEXT: [[TMP1:%.*]] = load <4 x i16>, ptr @src16, align 64814; SSE-NEXT: [[TMP2:%.*]] = sitofp <4 x i16> [[TMP1]] to <4 x float>815; SSE-NEXT: store <4 x float> [[TMP2]], ptr @dst32, align 64816; SSE-NEXT: [[TMP3:%.*]] = load <4 x i16>, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 4), align 8817; SSE-NEXT: [[TMP4:%.*]] = sitofp <4 x i16> [[TMP3]] to <4 x float>818; SSE-NEXT: store <4 x float> [[TMP4]], ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 4), align 16819; SSE-NEXT: ret void820;821; AVX-LABEL: @sitofp_8i16_8f32(822; AVX-NEXT: [[TMP1:%.*]] = load <8 x i16>, ptr @src16, align 64823; AVX-NEXT: [[TMP2:%.*]] = sitofp <8 x i16> [[TMP1]] to <8 x float>824; AVX-NEXT: store <8 x float> [[TMP2]], ptr @dst32, align 64825; AVX-NEXT: ret void826;827 %ld0 = load i16, ptr @src16, align 64828 %ld1 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 1), align 2829 %ld2 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 2), align 4830 %ld3 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 3), align 2831 %ld4 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 4), align 8832 %ld5 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 5), align 2833 %ld6 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 6), align 4834 %ld7 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 7), align 2835 %cvt0 = sitofp i16 %ld0 to float836 %cvt1 = sitofp i16 %ld1 to float837 %cvt2 = sitofp i16 %ld2 to float838 %cvt3 = sitofp i16 %ld3 to float839 %cvt4 = sitofp i16 %ld4 to float840 %cvt5 = sitofp i16 %ld5 to float841 %cvt6 = sitofp i16 %ld6 to float842 %cvt7 = sitofp i16 %ld7 to float843 store float %cvt0, ptr @dst32, align 64844 store float %cvt1, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 1), align 4845 store float %cvt2, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 2), align 8846 store float %cvt3, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 3), align 4847 store float %cvt4, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 4), align 16848 store float %cvt5, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 5), align 4849 store float %cvt6, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 6), align 8850 store float %cvt7, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 7), align 4851 ret void852}853 854define void @sitofp_16i16_16f32() #0 {855; SSE-LABEL: @sitofp_16i16_16f32(856; SSE-NEXT: [[TMP1:%.*]] = load <4 x i16>, ptr @src16, align 64857; SSE-NEXT: [[TMP2:%.*]] = sitofp <4 x i16> [[TMP1]] to <4 x float>858; SSE-NEXT: store <4 x float> [[TMP2]], ptr @dst32, align 64859; SSE-NEXT: [[TMP3:%.*]] = load <4 x i16>, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 4), align 8860; SSE-NEXT: [[TMP4:%.*]] = sitofp <4 x i16> [[TMP3]] to <4 x float>861; SSE-NEXT: store <4 x float> [[TMP4]], ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 4), align 16862; SSE-NEXT: [[TMP5:%.*]] = load <4 x i16>, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 8), align 16863; SSE-NEXT: [[TMP6:%.*]] = sitofp <4 x i16> [[TMP5]] to <4 x float>864; SSE-NEXT: store <4 x float> [[TMP6]], ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 8), align 32865; SSE-NEXT: [[TMP7:%.*]] = load <4 x i16>, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 12), align 8866; SSE-NEXT: [[TMP8:%.*]] = sitofp <4 x i16> [[TMP7]] to <4 x float>867; SSE-NEXT: store <4 x float> [[TMP8]], ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 12), align 16868; SSE-NEXT: ret void869;870; AVX256-LABEL: @sitofp_16i16_16f32(871; AVX256-NEXT: [[TMP1:%.*]] = load <8 x i16>, ptr @src16, align 64872; AVX256-NEXT: [[TMP2:%.*]] = sitofp <8 x i16> [[TMP1]] to <8 x float>873; AVX256-NEXT: store <8 x float> [[TMP2]], ptr @dst32, align 64874; AVX256-NEXT: [[TMP3:%.*]] = load <8 x i16>, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 8), align 16875; AVX256-NEXT: [[TMP4:%.*]] = sitofp <8 x i16> [[TMP3]] to <8 x float>876; AVX256-NEXT: store <8 x float> [[TMP4]], ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 8), align 32877; AVX256-NEXT: ret void878;879; AVX512-LABEL: @sitofp_16i16_16f32(880; AVX512-NEXT: [[TMP1:%.*]] = load <16 x i16>, ptr @src16, align 64881; AVX512-NEXT: [[TMP2:%.*]] = sitofp <16 x i16> [[TMP1]] to <16 x float>882; AVX512-NEXT: store <16 x float> [[TMP2]], ptr @dst32, align 64883; AVX512-NEXT: ret void884;885 %ld0 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 0 ), align 64886 %ld1 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 1 ), align 2887 %ld2 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 2 ), align 4888 %ld3 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 3 ), align 2889 %ld4 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 4 ), align 8890 %ld5 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 5 ), align 2891 %ld6 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 6 ), align 4892 %ld7 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 7 ), align 2893 %ld8 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 8 ), align 16894 %ld9 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 9 ), align 2895 %ld10 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 10), align 4896 %ld11 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 11), align 2897 %ld12 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 12), align 8898 %ld13 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 13), align 2899 %ld14 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 14), align 4900 %ld15 = load i16, ptr getelementptr inbounds ([32 x i16], ptr @src16, i32 0, i64 15), align 2901 %cvt0 = sitofp i16 %ld0 to float902 %cvt1 = sitofp i16 %ld1 to float903 %cvt2 = sitofp i16 %ld2 to float904 %cvt3 = sitofp i16 %ld3 to float905 %cvt4 = sitofp i16 %ld4 to float906 %cvt5 = sitofp i16 %ld5 to float907 %cvt6 = sitofp i16 %ld6 to float908 %cvt7 = sitofp i16 %ld7 to float909 %cvt8 = sitofp i16 %ld8 to float910 %cvt9 = sitofp i16 %ld9 to float911 %cvt10 = sitofp i16 %ld10 to float912 %cvt11 = sitofp i16 %ld11 to float913 %cvt12 = sitofp i16 %ld12 to float914 %cvt13 = sitofp i16 %ld13 to float915 %cvt14 = sitofp i16 %ld14 to float916 %cvt15 = sitofp i16 %ld15 to float917 store float %cvt0 , ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 0 ), align 64918 store float %cvt1 , ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 1 ), align 4919 store float %cvt2 , ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 2 ), align 8920 store float %cvt3 , ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 3 ), align 4921 store float %cvt4 , ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 4 ), align 16922 store float %cvt5 , ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 5 ), align 4923 store float %cvt6 , ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 6 ), align 8924 store float %cvt7 , ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 7 ), align 4925 store float %cvt8 , ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 8 ), align 32926 store float %cvt9 , ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 9 ), align 4927 store float %cvt10, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 10), align 8928 store float %cvt11, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 11), align 4929 store float %cvt12, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 12), align 16930 store float %cvt13, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 13), align 4931 store float %cvt14, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 14), align 8932 store float %cvt15, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 15), align 4933 ret void934}935 936define void @sitofp_4i8_4f32() #0 {937; CHECK-LABEL: @sitofp_4i8_4f32(938; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i8>, ptr @src8, align 64939; CHECK-NEXT: [[TMP2:%.*]] = sitofp <4 x i8> [[TMP1]] to <4 x float>940; CHECK-NEXT: store <4 x float> [[TMP2]], ptr @dst32, align 64941; CHECK-NEXT: ret void942;943 %ld0 = load i8, ptr @src8, align 64944 %ld1 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 1), align 1945 %ld2 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 2), align 2946 %ld3 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 3), align 1947 %cvt0 = sitofp i8 %ld0 to float948 %cvt1 = sitofp i8 %ld1 to float949 %cvt2 = sitofp i8 %ld2 to float950 %cvt3 = sitofp i8 %ld3 to float951 store float %cvt0, ptr @dst32, align 64952 store float %cvt1, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 1), align 4953 store float %cvt2, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 2), align 8954 store float %cvt3, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 3), align 4955 ret void956}957 958define void @sitofp_8i8_8f32() #0 {959; SSE-LABEL: @sitofp_8i8_8f32(960; SSE-NEXT: [[TMP1:%.*]] = load <4 x i8>, ptr @src8, align 64961; SSE-NEXT: [[TMP2:%.*]] = sitofp <4 x i8> [[TMP1]] to <4 x float>962; SSE-NEXT: store <4 x float> [[TMP2]], ptr @dst32, align 64963; SSE-NEXT: [[TMP3:%.*]] = load <4 x i8>, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 4), align 4964; SSE-NEXT: [[TMP4:%.*]] = sitofp <4 x i8> [[TMP3]] to <4 x float>965; SSE-NEXT: store <4 x float> [[TMP4]], ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 4), align 16966; SSE-NEXT: ret void967;968; AVX-LABEL: @sitofp_8i8_8f32(969; AVX-NEXT: [[TMP1:%.*]] = load <8 x i8>, ptr @src8, align 64970; AVX-NEXT: [[TMP2:%.*]] = sitofp <8 x i8> [[TMP1]] to <8 x float>971; AVX-NEXT: store <8 x float> [[TMP2]], ptr @dst32, align 64972; AVX-NEXT: ret void973;974 %ld0 = load i8, ptr @src8, align 64975 %ld1 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 1), align 1976 %ld2 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 2), align 2977 %ld3 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 3), align 1978 %ld4 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 4), align 4979 %ld5 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 5), align 1980 %ld6 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 6), align 2981 %ld7 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 7), align 1982 %cvt0 = sitofp i8 %ld0 to float983 %cvt1 = sitofp i8 %ld1 to float984 %cvt2 = sitofp i8 %ld2 to float985 %cvt3 = sitofp i8 %ld3 to float986 %cvt4 = sitofp i8 %ld4 to float987 %cvt5 = sitofp i8 %ld5 to float988 %cvt6 = sitofp i8 %ld6 to float989 %cvt7 = sitofp i8 %ld7 to float990 store float %cvt0, ptr @dst32, align 64991 store float %cvt1, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 1), align 4992 store float %cvt2, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 2), align 8993 store float %cvt3, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 3), align 4994 store float %cvt4, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 4), align 16995 store float %cvt5, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 5), align 4996 store float %cvt6, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 6), align 8997 store float %cvt7, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 7), align 4998 ret void999}1000 1001define void @sitofp_16i8_16f32() #0 {1002; SSE-LABEL: @sitofp_16i8_16f32(1003; SSE-NEXT: [[TMP1:%.*]] = load <4 x i8>, ptr @src8, align 641004; SSE-NEXT: [[TMP2:%.*]] = sitofp <4 x i8> [[TMP1]] to <4 x float>1005; SSE-NEXT: store <4 x float> [[TMP2]], ptr @dst32, align 641006; SSE-NEXT: [[TMP3:%.*]] = load <4 x i8>, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 4), align 41007; SSE-NEXT: [[TMP4:%.*]] = sitofp <4 x i8> [[TMP3]] to <4 x float>1008; SSE-NEXT: store <4 x float> [[TMP4]], ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 4), align 161009; SSE-NEXT: [[TMP5:%.*]] = load <4 x i8>, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 8), align 81010; SSE-NEXT: [[TMP6:%.*]] = sitofp <4 x i8> [[TMP5]] to <4 x float>1011; SSE-NEXT: store <4 x float> [[TMP6]], ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 8), align 321012; SSE-NEXT: [[TMP7:%.*]] = load <4 x i8>, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 12), align 41013; SSE-NEXT: [[TMP8:%.*]] = sitofp <4 x i8> [[TMP7]] to <4 x float>1014; SSE-NEXT: store <4 x float> [[TMP8]], ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 12), align 161015; SSE-NEXT: ret void1016;1017; AVX256-LABEL: @sitofp_16i8_16f32(1018; AVX256-NEXT: [[TMP1:%.*]] = load <8 x i8>, ptr @src8, align 641019; AVX256-NEXT: [[TMP2:%.*]] = sitofp <8 x i8> [[TMP1]] to <8 x float>1020; AVX256-NEXT: store <8 x float> [[TMP2]], ptr @dst32, align 641021; AVX256-NEXT: [[TMP3:%.*]] = load <8 x i8>, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 8), align 81022; AVX256-NEXT: [[TMP4:%.*]] = sitofp <8 x i8> [[TMP3]] to <8 x float>1023; AVX256-NEXT: store <8 x float> [[TMP4]], ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 8), align 321024; AVX256-NEXT: ret void1025;1026; AVX512-LABEL: @sitofp_16i8_16f32(1027; AVX512-NEXT: [[TMP1:%.*]] = load <16 x i8>, ptr @src8, align 641028; AVX512-NEXT: [[TMP2:%.*]] = sitofp <16 x i8> [[TMP1]] to <16 x float>1029; AVX512-NEXT: store <16 x float> [[TMP2]], ptr @dst32, align 641030; AVX512-NEXT: ret void1031;1032 %ld0 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 0 ), align 641033 %ld1 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 1 ), align 11034 %ld2 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 2 ), align 21035 %ld3 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 3 ), align 11036 %ld4 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 4 ), align 41037 %ld5 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 5 ), align 11038 %ld6 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 6 ), align 21039 %ld7 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 7 ), align 11040 %ld8 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 8 ), align 81041 %ld9 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 9 ), align 11042 %ld10 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 10), align 21043 %ld11 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 11), align 11044 %ld12 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 12), align 41045 %ld13 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 13), align 11046 %ld14 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 14), align 21047 %ld15 = load i8, ptr getelementptr inbounds ([64 x i8], ptr @src8, i32 0, i64 15), align 11048 %cvt0 = sitofp i8 %ld0 to float1049 %cvt1 = sitofp i8 %ld1 to float1050 %cvt2 = sitofp i8 %ld2 to float1051 %cvt3 = sitofp i8 %ld3 to float1052 %cvt4 = sitofp i8 %ld4 to float1053 %cvt5 = sitofp i8 %ld5 to float1054 %cvt6 = sitofp i8 %ld6 to float1055 %cvt7 = sitofp i8 %ld7 to float1056 %cvt8 = sitofp i8 %ld8 to float1057 %cvt9 = sitofp i8 %ld9 to float1058 %cvt10 = sitofp i8 %ld10 to float1059 %cvt11 = sitofp i8 %ld11 to float1060 %cvt12 = sitofp i8 %ld12 to float1061 %cvt13 = sitofp i8 %ld13 to float1062 %cvt14 = sitofp i8 %ld14 to float1063 %cvt15 = sitofp i8 %ld15 to float1064 store float %cvt0 , ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 0 ), align 641065 store float %cvt1 , ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 1 ), align 41066 store float %cvt2 , ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 2 ), align 81067 store float %cvt3 , ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 3 ), align 41068 store float %cvt4 , ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 4 ), align 161069 store float %cvt5 , ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 5 ), align 41070 store float %cvt6 , ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 6 ), align 81071 store float %cvt7 , ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 7 ), align 41072 store float %cvt8 , ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 8 ), align 321073 store float %cvt9 , ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 9 ), align 41074 store float %cvt10, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 10), align 81075 store float %cvt11, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 11), align 41076 store float %cvt12, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 12), align 161077 store float %cvt13, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 13), align 41078 store float %cvt14, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 14), align 81079 store float %cvt15, ptr getelementptr inbounds ([16 x float], ptr @dst32, i32 0, i64 15), align 41080 ret void1081}1082 1083;1084; SITOFP BUILDVECTOR1085;1086 1087define <4 x double> @sitofp_4xi32_4f64(i32 %a0, i32 %a1, i32 %a2, i32 %a3) #0 {1088; SSE-LABEL: @sitofp_4xi32_4f64(1089; SSE-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> poison, i32 [[A0:%.*]], i32 01090; SSE-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[A1:%.*]], i32 11091; SSE-NEXT: [[TMP3:%.*]] = sitofp <2 x i32> [[TMP2]] to <2 x double>1092; SSE-NEXT: [[TMP4:%.*]] = insertelement <2 x i32> poison, i32 [[A2:%.*]], i32 01093; SSE-NEXT: [[TMP5:%.*]] = insertelement <2 x i32> [[TMP4]], i32 [[A3:%.*]], i32 11094; SSE-NEXT: [[TMP6:%.*]] = sitofp <2 x i32> [[TMP5]] to <2 x double>1095; SSE-NEXT: [[TMP7:%.*]] = shufflevector <2 x double> [[TMP3]], <2 x double> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>1096; SSE-NEXT: [[RES11:%.*]] = shufflevector <4 x double> zeroinitializer, <4 x double> [[TMP7]], <4 x i32> <i32 4, i32 5, i32 2, i32 3>1097; SSE-NEXT: [[TMP8:%.*]] = shufflevector <2 x double> [[TMP6]], <2 x double> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>1098; SSE-NEXT: [[RES31:%.*]] = shufflevector <4 x double> [[RES11]], <4 x double> [[TMP8]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>1099; SSE-NEXT: ret <4 x double> [[RES31]]1100;1101; AVX-LABEL: @sitofp_4xi32_4f64(1102; AVX-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> poison, i32 [[A0:%.*]], i32 01103; AVX-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[A1:%.*]], i32 11104; AVX-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[A2:%.*]], i32 21105; AVX-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> [[TMP3]], i32 [[A3:%.*]], i32 31106; AVX-NEXT: [[TMP5:%.*]] = sitofp <4 x i32> [[TMP4]] to <4 x double>1107; AVX-NEXT: ret <4 x double> [[TMP5]]1108;1109 %cvt0 = sitofp i32 %a0 to double1110 %cvt1 = sitofp i32 %a1 to double1111 %cvt2 = sitofp i32 %a2 to double1112 %cvt3 = sitofp i32 %a3 to double1113 %res0 = insertelement <4 x double> zeroinitializer, double %cvt0, i32 01114 %res1 = insertelement <4 x double> %res0, double %cvt1, i32 11115 %res2 = insertelement <4 x double> %res1, double %cvt2, i32 21116 %res3 = insertelement <4 x double> %res2, double %cvt3, i32 31117 ret <4 x double> %res31118}1119 1120define <4 x double> @sitofp_with_const_4xi32_4f64(i32 %a2, i32 %a3) #0 {1121; CHECK-LABEL: @sitofp_with_const_4xi32_4f64(1122; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> poison, i32 [[A2:%.*]], i32 01123; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[A3:%.*]], i32 11124; CHECK-NEXT: [[TMP3:%.*]] = sitofp <2 x i32> [[TMP2]] to <2 x double>1125; CHECK-NEXT: [[RES0:%.*]] = insertelement <4 x double> zeroinitializer, double 1.000000e+00, i32 31126; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <2 x double> [[TMP3]], <2 x double> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>1127; CHECK-NEXT: [[RES31:%.*]] = shufflevector <4 x double> [[RES0]], <4 x double> [[TMP4]], <4 x i32> <i32 4, i32 5, i32 2, i32 3>1128; CHECK-NEXT: ret <4 x double> [[RES31]]1129;1130 %cvt2 = sitofp i32 %a2 to double1131 %cvt3 = sitofp i32 %a3 to double1132 %res0 = insertelement <4 x double> zeroinitializer, double 1.0, i32 31133 %res2 = insertelement <4 x double> %res0, double %cvt2, i32 01134 %res3 = insertelement <4 x double> %res2, double %cvt3, i32 11135 ret <4 x double> %res31136}1137 1138define <4 x double> @sitofp_with_zeroinitializer_4xi32_4f64(i32 %a2, i32 %a3) #0 {1139; CHECK-LABEL: @sitofp_with_zeroinitializer_4xi32_4f64(1140; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> poison, i32 [[A2:%.*]], i32 01141; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[A3:%.*]], i32 11142; CHECK-NEXT: [[TMP3:%.*]] = sitofp <2 x i32> [[TMP2]] to <2 x double>1143; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <2 x double> [[TMP3]], <2 x double> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>1144; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x double> zeroinitializer, <4 x double> [[TMP5]], <4 x i32> <i32 4, i32 5, i32 2, i32 3>1145; CHECK-NEXT: ret <4 x double> [[TMP4]]1146;1147 %cvt2 = sitofp i32 %a2 to double1148 %cvt3 = sitofp i32 %a3 to double1149 %res2 = insertelement <4 x double> zeroinitializer, double %cvt2, i32 01150 %res3 = insertelement <4 x double> %res2, double %cvt3, i32 11151 ret <4 x double> %res31152}1153 1154define <4 x float> @sitofp_4xi32_4f32(i32 %a0, i32 %a1, i32 %a2, i32 %a3) #0 {1155; CHECK-LABEL: @sitofp_4xi32_4f32(1156; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> poison, i32 [[A0:%.*]], i32 01157; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[A1:%.*]], i32 11158; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[A2:%.*]], i32 21159; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> [[TMP3]], i32 [[A3:%.*]], i32 31160; CHECK-NEXT: [[TMP5:%.*]] = sitofp <4 x i32> [[TMP4]] to <4 x float>1161; CHECK-NEXT: ret <4 x float> [[TMP5]]1162;1163 %cvt0 = sitofp i32 %a0 to float1164 %cvt1 = sitofp i32 %a1 to float1165 %cvt2 = sitofp i32 %a2 to float1166 %cvt3 = sitofp i32 %a3 to float1167 %res0 = insertelement <4 x float> zeroinitializer, float %cvt0, i32 01168 %res1 = insertelement <4 x float> %res0, float %cvt1, i32 11169 %res2 = insertelement <4 x float> %res1, float %cvt2, i32 21170 %res3 = insertelement <4 x float> %res2, float %cvt3, i32 31171 ret <4 x float> %res31172}1173 1174attributes #0 = { nounwind }1175