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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -S -mtriple=x86_64-unknown -passes=slp-vectorizer -mattr=+avx -pass-remarks-output=%t | FileCheck %s3; RUN: FileCheck --input-file=%t --check-prefix=YAML %s4 5; YAML-LABEL: --- !Passed6; YAML-NEXT: Pass: slp-vectorizer7; YAML-NEXT: Name: StoresVectorized8; YAML-NEXT: Function: stores9; YAML-NEXT: Args:10; YAML-NEXT: - String: 'Stores SLP vectorized with cost '11; YAML-NEXT: - Cost: '-7'12; YAML-NEXT: - String: ' and with tree size '13; YAML-NEXT: - TreeSize: '6'14define void @stores(ptr noalias %in, ptr noalias %inn, ptr noalias %out) {15; CHECK-LABEL: @stores(16; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i8>, ptr [[IN:%.*]], align 117; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i8>, ptr [[INN:%.*]], align 118; CHECK-NEXT: [[TMP3:%.*]] = zext <4 x i8> [[TMP1]] to <4 x i16>19; CHECK-NEXT: [[TMP4:%.*]] = zext <4 x i8> [[TMP2]] to <4 x i16>20; CHECK-NEXT: [[TMP5:%.*]] = add <4 x i16> [[TMP3]], [[TMP4]]21; CHECK-NEXT: [[TMP6:%.*]] = zext <4 x i16> [[TMP5]] to <4 x i64>22; CHECK-NEXT: store <4 x i64> [[TMP6]], ptr [[OUT:%.*]], align 423; CHECK-NEXT: ret void24;25 %load.1 = load i8, ptr %in, align 126 %gep.1 = getelementptr inbounds i8, ptr %in, i64 127 %load.2 = load i8, ptr %gep.1, align 128 %gep.2 = getelementptr inbounds i8, ptr %in, i64 229 %load.3 = load i8, ptr %gep.2, align 130 %gep.3 = getelementptr inbounds i8, ptr %in, i64 331 %load.4 = load i8, ptr %gep.3, align 132 %load.5 = load i8, ptr %inn, align 133 %gep.4 = getelementptr inbounds i8, ptr %inn, i64 134 %load.6 = load i8, ptr %gep.4, align 135 %gep.5 = getelementptr inbounds i8, ptr %inn, i64 236 %load.7 = load i8, ptr %gep.5, align 137 %gep.6 = getelementptr inbounds i8, ptr %inn, i64 338 %load.8 = load i8, ptr %gep.6, align 139 %z1 = zext i8 %load.1 to i6440 %z2 = zext i8 %load.2 to i6441 %z3 = zext i8 %load.3 to i6442 %z4 = zext i8 %load.4 to i6443 %z5 = zext i8 %load.5 to i6444 %z6 = zext i8 %load.6 to i6445 %z7 = zext i8 %load.7 to i6446 %z8 = zext i8 %load.8 to i6447 %add1 = add i64 %z1, %z548 %add2 = add i64 %z2, %z649 %add3 = add i64 %z3, %z750 %add4 = add i64 %z4, %z851 %gep.8 = getelementptr inbounds i64, ptr %out, i64 152 %gep.9 = getelementptr inbounds i64, ptr %out, i64 253 %gep.10 = getelementptr inbounds i64, ptr %out, i64 354 store i64 %add1, ptr %out, align 455 store i64 %add2, ptr %gep.8, align 456 store i64 %add3, ptr %gep.9, align 457 store i64 %add4, ptr %gep.10, align 458 ret void59}60 61; YAML-LABEL: --- !Passed62; YAML-NEXT: Pass: slp-vectorizer63; YAML-NEXT: Name: VectorizedList64; YAML-NEXT: Function: insertelems65; YAML-NEXT: Args:66; YAML-NEXT: - String: 'SLP vectorized with cost '67; YAML-NEXT: - Cost: '-9'68; YAML-NEXT: - String: ' and with tree size '69; YAML-NEXT: - TreeSize: '6'70define <4 x i64> @insertelems(ptr noalias %in, ptr noalias %inn) {71; CHECK-LABEL: @insertelems(72; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i8>, ptr [[IN:%.*]], align 173; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i8>, ptr [[INN:%.*]], align 174; CHECK-NEXT: [[TMP3:%.*]] = zext <4 x i8> [[TMP1]] to <4 x i16>75; CHECK-NEXT: [[TMP4:%.*]] = zext <4 x i8> [[TMP2]] to <4 x i16>76; CHECK-NEXT: [[TMP5:%.*]] = add <4 x i16> [[TMP3]], [[TMP4]]77; CHECK-NEXT: [[TMP6:%.*]] = zext <4 x i16> [[TMP5]] to <4 x i64>78; CHECK-NEXT: ret <4 x i64> [[TMP6]]79;80 %load.1 = load i8, ptr %in, align 181 %gep.1 = getelementptr inbounds i8, ptr %in, i64 182 %load.2 = load i8, ptr %gep.1, align 183 %gep.2 = getelementptr inbounds i8, ptr %in, i64 284 %load.3 = load i8, ptr %gep.2, align 185 %gep.3 = getelementptr inbounds i8, ptr %in, i64 386 %load.4 = load i8, ptr %gep.3, align 187 %load.5 = load i8, ptr %inn, align 188 %gep.4 = getelementptr inbounds i8, ptr %inn, i64 189 %load.6 = load i8, ptr %gep.4, align 190 %gep.5 = getelementptr inbounds i8, ptr %inn, i64 291 %load.7 = load i8, ptr %gep.5, align 192 %gep.6 = getelementptr inbounds i8, ptr %inn, i64 393 %load.8 = load i8, ptr %gep.6, align 194 %z1 = zext i8 %load.1 to i6495 %z2 = zext i8 %load.2 to i6496 %z3 = zext i8 %load.3 to i6497 %z4 = zext i8 %load.4 to i6498 %z5 = zext i8 %load.5 to i6499 %z6 = zext i8 %load.6 to i64100 %z7 = zext i8 %load.7 to i64101 %z8 = zext i8 %load.8 to i64102 %add1 = add i64 %z1, %z5103 %add2 = add i64 %z2, %z6104 %add3 = add i64 %z3, %z7105 %add4 = add i64 %z4, %z8106 %ins1 = insertelement <4 x i64> poison, i64 %add1, i32 0107 %ins2 = insertelement <4 x i64> %ins1, i64 %add2, i32 1108 %ins3 = insertelement <4 x i64> %ins2, i64 %add3, i32 2109 %ins4 = insertelement <4 x i64> %ins3, i64 %add4, i32 3110 ret <4 x i64> %ins4111}112