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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s3 4define i1 @test(i64 %v1, ptr %v2, i32 %v3, i1 %v4) {5; CHECK-LABEL: define i1 @test(6; CHECK-SAME: i64 [[V1:%.*]], ptr [[V2:%.*]], i32 [[V3:%.*]], i1 [[V4:%.*]]) {7; CHECK-NEXT: [[NEWFUNCROOT:.*:]]8; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> poison, i64 [[V1]], i32 09; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x i64> [[TMP0]], <2 x i64> poison, <2 x i32> zeroinitializer10; CHECK-NEXT: [[TMP2:%.*]] = lshr <2 x i64> [[TMP1]], <i64 32, i64 40>11; CHECK-NEXT: [[TMP3:%.*]] = trunc <2 x i64> [[TMP2]] to <2 x i8>12; CHECK-NEXT: [[TMP4:%.*]] = and <2 x i8> [[TMP3]], <i8 1, i8 -1>13; CHECK-NEXT: [[TMP5:%.*]] = zext <2 x i8> [[TMP4]] to <2 x i32>14; CHECK-NEXT: [[TMP9:%.*]] = zext <2 x i8> [[TMP4]] to <2 x i32>15; CHECK-NEXT: [[TMP6:%.*]] = icmp eq <2 x i32> [[TMP9]], zeroinitializer16; CHECK-NEXT: [[TMP8:%.*]] = insertelement <4 x i32> poison, i32 [[V3]], i32 017; CHECK-NEXT: [[TMP30:%.*]] = shufflevector <4 x i32> [[TMP8]], <4 x i32> poison, <4 x i32> <i32 poison, i32 poison, i32 0, i32 0>18; CHECK-NEXT: [[TMP31:%.*]] = shufflevector <2 x i32> [[TMP5]], <2 x i32> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>19; CHECK-NEXT: [[TMP10:%.*]] = shufflevector <4 x i32> [[TMP30]], <4 x i32> [[TMP31]], <4 x i32> <i32 4, i32 5, i32 2, i32 3>20; CHECK-NEXT: [[TMP11:%.*]] = uitofp <4 x i32> [[TMP10]] to <4 x float>21; CHECK-NEXT: [[TMP12:%.*]] = fdiv <4 x float> zeroinitializer, [[TMP11]]22; CHECK-NEXT: [[TMP13:%.*]] = insertelement <4 x i1> poison, i1 [[V4]], i32 023; CHECK-NEXT: [[TMP14:%.*]] = shufflevector <4 x i1> [[TMP13]], <4 x i1> poison, <4 x i32> <i32 poison, i32 poison, i32 0, i32 0>24; CHECK-NEXT: [[TMP32:%.*]] = shufflevector <2 x i1> [[TMP6]], <2 x i1> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>25; CHECK-NEXT: [[TMP15:%.*]] = shufflevector <4 x i1> [[TMP14]], <4 x i1> [[TMP32]], <4 x i32> <i32 4, i32 5, i32 2, i32 3>26; CHECK-NEXT: [[TMP16:%.*]] = select <4 x i1> [[TMP15]], <4 x float> zeroinitializer, <4 x float> [[TMP12]]27; CHECK-NEXT: [[TMP17:%.*]] = extractelement <4 x float> [[TMP16]], i32 328; CHECK-NEXT: [[CONV_I_I1743_3:%.*]] = fptoui float [[TMP17]] to i3229; CHECK-NEXT: [[TMP18:%.*]] = icmp ne i32 [[CONV_I_I1743_3]], 030; CHECK-NEXT: [[TMP19:%.*]] = bitcast <4 x float> [[TMP16]] to <4 x i32>31; CHECK-NEXT: [[TMP20:%.*]] = icmp ult <4 x i32> [[TMP19]], splat (i32 1333788672)32; CHECK-NEXT: [[TMP21:%.*]] = extractelement <4 x i1> [[TMP20]], i32 333; CHECK-NEXT: [[NARROW:%.*]] = select i1 [[TMP21]], i1 [[TMP18]], i1 false34; CHECK-NEXT: [[TMP22:%.*]] = extractelement <4 x float> [[TMP16]], i32 235; CHECK-NEXT: [[CONV_I_I1743_2:%.*]] = fptoui float [[TMP22]] to i3236; CHECK-NEXT: [[TMP23:%.*]] = extractelement <4 x i1> [[TMP20]], i32 237; CHECK-NEXT: [[NARROW1:%.*]] = select i1 [[TMP23]], i32 [[CONV_I_I1743_2]], i32 038; CHECK-NEXT: [[TMP24:%.*]] = zext i1 [[NARROW]] to i3239; CHECK-NEXT: [[TMP25:%.*]] = or i32 [[NARROW1]], [[TMP24]]40; CHECK-NEXT: [[TMP26:%.*]] = extractelement <4 x float> [[TMP16]], i32 141; CHECK-NEXT: [[CONV_I_I1743_1:%.*]] = fptoui float [[TMP26]] to i3242; CHECK-NEXT: [[TMP27:%.*]] = extractelement <4 x i1> [[TMP20]], i32 143; CHECK-NEXT: [[NARROW2:%.*]] = select i1 [[TMP27]], i32 [[CONV_I_I1743_1]], i32 044; CHECK-NEXT: [[RV3:%.*]] = or i32 [[TMP25]], [[NARROW2]]45; CHECK-NEXT: [[TMP28:%.*]] = extractelement <4 x float> [[TMP16]], i32 046; CHECK-NEXT: [[CONV_I_I1743:%.*]] = fptoui float [[TMP28]] to i3247; CHECK-NEXT: [[TMP29:%.*]] = extractelement <4 x i1> [[TMP20]], i32 048; CHECK-NEXT: [[NARROW4:%.*]] = select i1 [[TMP29]], i32 [[CONV_I_I1743]], i32 049; CHECK-NEXT: [[RT5:%.*]] = or i32 [[RV3]], [[NARROW4]]50; CHECK-NEXT: [[RT:%.*]] = zext i32 [[RT5]] to i6451; CHECK-NEXT: store i64 [[RT]], ptr [[V2]], align 152; CHECK-NEXT: ret i1 false53;54newFuncRoot:55 %conv.i147.i1756.3 = uitofp i32 %v3 to float56 %div.i.i.i1749.3 = fdiv float 0.000000e+00, %conv.i147.i1756.357 %cond.i.i.i1751.3 = select i1 %v4, float 0.000000e+00, float %div.i.i.i1749.358 %conv.i147.i1756.2 = uitofp i32 %v3 to float59 %div.i.i.i1749.2 = fdiv float 0.000000e+00, %conv.i147.i1756.260 %cond.i.i.i1751.2 = select i1 %v4, float 0.000000e+00, float %div.i.i.i1749.261 %0 = lshr i64 %v1, 4062 %1 = trunc i64 %0 to i3263 %tt2 = and i32 %1, 25564 %cmp1.i.i.i1746.1 = icmp eq i32 %tt2, 065 %conv.i147.i1756.1 = uitofp i32 %tt2 to float66 %div.i.i.i1749.1 = fdiv float 0.000000e+00, %conv.i147.i1756.167 %cond.i.i.i1751.1 = select i1 %cmp1.i.i.i1746.1, float 0.000000e+00, float %div.i.i.i1749.168 %tt3 = lshr i64 %v1, 3269 %2 = trunc i64 %tt3 to i3270 %tt1 = and i32 %2, 171 %cmp1.i.i.i1746 = icmp eq i32 %tt1, 072 %conv.i147.i1756 = uitofp i32 %tt1 to float73 %div.i.i.i1749 = fdiv float 0.000000e+00, %conv.i147.i175674 %cond.i.i.i1751 = select i1 %cmp1.i.i.i1746, float 0.000000e+00, float %div.i.i.i174975 %3 = bitcast float %cond.i.i.i1751.3 to i3276 %cmp.i99.i1736.3 = icmp ult i32 %3, 133378867277 %conv.i.i1743.3 = fptoui float %cond.i.i.i1751.3 to i3278 %4 = icmp ne i32 %conv.i.i1743.3, 079 %narrow = select i1 %cmp.i99.i1736.3, i1 %4, i1 false80 %5 = bitcast float %cond.i.i.i1751.2 to i3281 %cmp.i99.i1736.2 = icmp ult i32 %5, 133378867282 %conv.i.i1743.2 = fptoui float %cond.i.i.i1751.2 to i3283 %narrow1 = select i1 %cmp.i99.i1736.2, i32 %conv.i.i1743.2, i32 084 %6 = zext i1 %narrow to i3285 %7 = or i32 %narrow1, %686 %8 = bitcast float %cond.i.i.i1751.1 to i3287 %cmp.i99.i1736.1 = icmp ult i32 %8, 133378867288 %conv.i.i1743.1 = fptoui float %cond.i.i.i1751.1 to i3289 %narrow2 = select i1 %cmp.i99.i1736.1, i32 %conv.i.i1743.1, i32 090 %rv3 = or i32 %7, %narrow291 %9 = bitcast float %cond.i.i.i1751 to i3292 %cmp.i99.i1736 = icmp ult i32 %9, 133378867293 %conv.i.i1743 = fptoui float %cond.i.i.i1751 to i3294 %narrow4 = select i1 %cmp.i99.i1736, i32 %conv.i.i1743, i32 095 %rt5 = or i32 %rv3, %narrow496 %rt = zext i32 %rt5 to i6497 store i64 %rt, ptr %v2, align 198 ret i1 false99}100