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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes=slp-vectorizer -slp-vectorize-non-power-of-2 -mtriple=x86_64-apple-macosx -S %s | FileCheck --check-prefixes=CHECK,NON-POW2 %s3; RUN: opt -passes=slp-vectorizer -slp-vectorize-non-power-of-2=false -mtriple=x86_64-apple-macosx -S %s | FileCheck --check-prefixes=CHECK,POW2-ONLY %s4 5define void @v3_load_i32_mul_by_constant_store(ptr %src, ptr %dst) {6; CHECK-LABEL: @v3_load_i32_mul_by_constant_store(7; CHECK-NEXT: entry:8; CHECK-NEXT: [[GEP_SRC_0:%.*]] = getelementptr inbounds i32, ptr [[SRC:%.*]], i32 09; CHECK-NEXT: [[L_SRC_0:%.*]] = load i32, ptr [[GEP_SRC_0]], align 410; CHECK-NEXT: [[MUL_0:%.*]] = mul nsw i32 [[L_SRC_0]], 1011; CHECK-NEXT: [[GEP_SRC_1:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i32 112; CHECK-NEXT: [[L_SRC_1:%.*]] = load i32, ptr [[GEP_SRC_1]], align 413; CHECK-NEXT: [[MUL_1:%.*]] = mul nsw i32 [[L_SRC_1]], 1014; CHECK-NEXT: [[GEP_SRC_2:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i32 215; CHECK-NEXT: [[L_SRC_2:%.*]] = load i32, ptr [[GEP_SRC_2]], align 416; CHECK-NEXT: [[MUL_2:%.*]] = mul nsw i32 [[L_SRC_2]], 1017; CHECK-NEXT: store i32 [[MUL_0]], ptr [[DST:%.*]], align 418; CHECK-NEXT: [[DST_1:%.*]] = getelementptr i32, ptr [[DST]], i32 119; CHECK-NEXT: store i32 [[MUL_1]], ptr [[DST_1]], align 420; CHECK-NEXT: [[DST_2:%.*]] = getelementptr i32, ptr [[DST]], i32 221; CHECK-NEXT: store i32 [[MUL_2]], ptr [[DST_2]], align 422; CHECK-NEXT: ret void23;24entry:25 %gep.src.0 = getelementptr inbounds i32, ptr %src, i32 026 %l.src.0 = load i32, ptr %gep.src.0, align 427 %mul.0 = mul nsw i32 %l.src.0, 1028 29 %gep.src.1 = getelementptr inbounds i32, ptr %src, i32 130 %l.src.1 = load i32, ptr %gep.src.1, align 431 %mul.1 = mul nsw i32 %l.src.1, 1032 33 %gep.src.2 = getelementptr inbounds i32, ptr %src, i32 234 %l.src.2 = load i32, ptr %gep.src.2, align 435 %mul.2 = mul nsw i32 %l.src.2, 1036 37 store i32 %mul.0, ptr %dst38 39 %dst.1 = getelementptr i32, ptr %dst, i32 140 store i32 %mul.1, ptr %dst.141 42 %dst.2 = getelementptr i32, ptr %dst, i32 243 store i32 %mul.2, ptr %dst.244 45 ret void46}47 48define void @v3_load_i32_mul_store(ptr %src.1, ptr %src.2, ptr %dst) {49; CHECK-LABEL: @v3_load_i32_mul_store(50; CHECK-NEXT: entry:51; CHECK-NEXT: [[GEP_SRC_1_0:%.*]] = getelementptr inbounds i32, ptr [[SRC_1:%.*]], i32 052; CHECK-NEXT: [[L_SRC_1_0:%.*]] = load i32, ptr [[GEP_SRC_1_0]], align 453; CHECK-NEXT: [[GEP_SRC_2_0:%.*]] = getelementptr inbounds i32, ptr [[SRC_2:%.*]], i32 054; CHECK-NEXT: [[L_SRC_2_0:%.*]] = load i32, ptr [[GEP_SRC_2_0]], align 455; CHECK-NEXT: [[MUL_0:%.*]] = mul nsw i32 [[L_SRC_1_0]], [[L_SRC_2_0]]56; CHECK-NEXT: [[GEP_SRC_1_1:%.*]] = getelementptr inbounds i32, ptr [[SRC_1]], i32 157; CHECK-NEXT: [[L_SRC_1_1:%.*]] = load i32, ptr [[GEP_SRC_1_1]], align 458; CHECK-NEXT: [[GEP_SRC_2_1:%.*]] = getelementptr inbounds i32, ptr [[SRC_2]], i32 159; CHECK-NEXT: [[L_SRC_2_1:%.*]] = load i32, ptr [[GEP_SRC_2_1]], align 460; CHECK-NEXT: [[MUL_1:%.*]] = mul nsw i32 [[L_SRC_1_1]], [[L_SRC_2_1]]61; CHECK-NEXT: [[GEP_SRC_1_2:%.*]] = getelementptr inbounds i32, ptr [[SRC_1]], i32 262; CHECK-NEXT: [[L_SRC_1_2:%.*]] = load i32, ptr [[GEP_SRC_1_2]], align 463; CHECK-NEXT: [[GEP_SRC_2_2:%.*]] = getelementptr inbounds i32, ptr [[SRC_2]], i32 264; CHECK-NEXT: [[L_SRC_2_2:%.*]] = load i32, ptr [[GEP_SRC_2_2]], align 465; CHECK-NEXT: [[MUL_2:%.*]] = mul nsw i32 [[L_SRC_1_2]], [[L_SRC_2_2]]66; CHECK-NEXT: store i32 [[MUL_0]], ptr [[DST:%.*]], align 467; CHECK-NEXT: [[DST_1:%.*]] = getelementptr i32, ptr [[DST]], i32 168; CHECK-NEXT: store i32 [[MUL_1]], ptr [[DST_1]], align 469; CHECK-NEXT: [[DST_2:%.*]] = getelementptr i32, ptr [[DST]], i32 270; CHECK-NEXT: store i32 [[MUL_2]], ptr [[DST_2]], align 471; CHECK-NEXT: ret void72;73entry:74 %gep.src.1.0 = getelementptr inbounds i32, ptr %src.1, i32 075 %l.src.1.0 = load i32, ptr %gep.src.1.0, align 476 %gep.src.2.0 = getelementptr inbounds i32, ptr %src.2, i32 077 %l.src.2.0 = load i32, ptr %gep.src.2.0, align 478 %mul.0 = mul nsw i32 %l.src.1.0, %l.src.2.079 80 %gep.src.1.1 = getelementptr inbounds i32, ptr %src.1, i32 181 %l.src.1.1 = load i32, ptr %gep.src.1.1, align 482 %gep.src.2.1 = getelementptr inbounds i32, ptr %src.2, i32 183 %l.src.2.1 = load i32, ptr %gep.src.2.1, align 484 %mul.1 = mul nsw i32 %l.src.1.1, %l.src.2.185 86 %gep.src.1.2 = getelementptr inbounds i32, ptr %src.1, i32 287 %l.src.1.2 = load i32, ptr %gep.src.1.2, align 488 %gep.src.2.2 = getelementptr inbounds i32, ptr %src.2, i32 289 %l.src.2.2 = load i32, ptr %gep.src.2.2, align 490 %mul.2 = mul nsw i32 %l.src.1.2, %l.src.2.291 92 store i32 %mul.0, ptr %dst93 94 %dst.1 = getelementptr i32, ptr %dst, i32 195 store i32 %mul.1, ptr %dst.196 97 %dst.2 = getelementptr i32, ptr %dst, i32 298 store i32 %mul.2, ptr %dst.299 100 ret void101}102 103define void @v3_load_i32_mul_add_const_store(ptr %src.1, ptr %src.2, ptr %dst) {104; CHECK-LABEL: @v3_load_i32_mul_add_const_store(105; CHECK-NEXT: entry:106; CHECK-NEXT: [[GEP_SRC_1_0:%.*]] = getelementptr inbounds i32, ptr [[SRC_1:%.*]], i32 0107; CHECK-NEXT: [[L_SRC_1_0:%.*]] = load i32, ptr [[GEP_SRC_1_0]], align 4108; CHECK-NEXT: [[GEP_SRC_2_0:%.*]] = getelementptr inbounds i32, ptr [[SRC_2:%.*]], i32 0109; CHECK-NEXT: [[L_SRC_2_0:%.*]] = load i32, ptr [[GEP_SRC_2_0]], align 4110; CHECK-NEXT: [[MUL_0:%.*]] = mul nsw i32 [[L_SRC_1_0]], [[L_SRC_2_0]]111; CHECK-NEXT: [[ADD_0:%.*]] = add i32 [[MUL_0]], 9112; CHECK-NEXT: [[GEP_SRC_1_1:%.*]] = getelementptr inbounds i32, ptr [[SRC_1]], i32 1113; CHECK-NEXT: [[L_SRC_1_1:%.*]] = load i32, ptr [[GEP_SRC_1_1]], align 4114; CHECK-NEXT: [[GEP_SRC_2_1:%.*]] = getelementptr inbounds i32, ptr [[SRC_2]], i32 1115; CHECK-NEXT: [[L_SRC_2_1:%.*]] = load i32, ptr [[GEP_SRC_2_1]], align 4116; CHECK-NEXT: [[MUL_1:%.*]] = mul nsw i32 [[L_SRC_1_1]], [[L_SRC_2_1]]117; CHECK-NEXT: [[ADD_1:%.*]] = add i32 [[MUL_1]], 9118; CHECK-NEXT: [[GEP_SRC_1_2:%.*]] = getelementptr inbounds i32, ptr [[SRC_1]], i32 2119; CHECK-NEXT: [[L_SRC_1_2:%.*]] = load i32, ptr [[GEP_SRC_1_2]], align 4120; CHECK-NEXT: [[GEP_SRC_2_2:%.*]] = getelementptr inbounds i32, ptr [[SRC_2]], i32 2121; CHECK-NEXT: [[L_SRC_2_2:%.*]] = load i32, ptr [[GEP_SRC_2_2]], align 4122; CHECK-NEXT: [[MUL_2:%.*]] = mul nsw i32 [[L_SRC_1_2]], [[L_SRC_2_2]]123; CHECK-NEXT: [[ADD_2:%.*]] = add i32 [[MUL_2]], 9124; CHECK-NEXT: store i32 [[ADD_0]], ptr [[DST:%.*]], align 4125; CHECK-NEXT: [[DST_1:%.*]] = getelementptr i32, ptr [[DST]], i32 1126; CHECK-NEXT: store i32 [[ADD_1]], ptr [[DST_1]], align 4127; CHECK-NEXT: [[DST_2:%.*]] = getelementptr i32, ptr [[DST]], i32 2128; CHECK-NEXT: store i32 [[ADD_2]], ptr [[DST_2]], align 4129; CHECK-NEXT: ret void130;131entry:132 %gep.src.1.0 = getelementptr inbounds i32, ptr %src.1, i32 0133 %l.src.1.0 = load i32, ptr %gep.src.1.0, align 4134 %gep.src.2.0 = getelementptr inbounds i32, ptr %src.2, i32 0135 %l.src.2.0 = load i32, ptr %gep.src.2.0, align 4136 %mul.0 = mul nsw i32 %l.src.1.0, %l.src.2.0137 %add.0 = add i32 %mul.0, 9138 139 %gep.src.1.1 = getelementptr inbounds i32, ptr %src.1, i32 1140 %l.src.1.1 = load i32, ptr %gep.src.1.1, align 4141 %gep.src.2.1 = getelementptr inbounds i32, ptr %src.2, i32 1142 %l.src.2.1 = load i32, ptr %gep.src.2.1, align 4143 %mul.1 = mul nsw i32 %l.src.1.1, %l.src.2.1144 %add.1 = add i32 %mul.1, 9145 146 %gep.src.1.2 = getelementptr inbounds i32, ptr %src.1, i32 2147 %l.src.1.2 = load i32, ptr %gep.src.1.2, align 4148 %gep.src.2.2 = getelementptr inbounds i32, ptr %src.2, i32 2149 %l.src.2.2 = load i32, ptr %gep.src.2.2, align 4150 %mul.2 = mul nsw i32 %l.src.1.2, %l.src.2.2151 %add.2 = add i32 %mul.2, 9152 153 store i32 %add.0, ptr %dst154 155 %dst.1 = getelementptr i32, ptr %dst, i32 1156 store i32 %add.1, ptr %dst.1157 158 %dst.2 = getelementptr i32, ptr %dst, i32 2159 store i32 %add.2, ptr %dst.2160 161 ret void162}163 164define void @v3_load_f32_fadd_fadd_by_constant_store(ptr %src, ptr %dst) {165; NON-POW2-LABEL: @v3_load_f32_fadd_fadd_by_constant_store(166; NON-POW2-NEXT: entry:167; NON-POW2-NEXT: [[GEP_SRC_0:%.*]] = getelementptr inbounds float, ptr [[SRC:%.*]], i32 0168; NON-POW2-NEXT: [[TMP0:%.*]] = load <3 x float>, ptr [[GEP_SRC_0]], align 4169; NON-POW2-NEXT: [[TMP1:%.*]] = fadd <3 x float> [[TMP0]], splat (float 1.000000e+01)170; NON-POW2-NEXT: store <3 x float> [[TMP1]], ptr [[DST:%.*]], align 4171; NON-POW2-NEXT: ret void172;173; POW2-ONLY-LABEL: @v3_load_f32_fadd_fadd_by_constant_store(174; POW2-ONLY-NEXT: entry:175; POW2-ONLY-NEXT: [[GEP_SRC_0:%.*]] = getelementptr inbounds float, ptr [[SRC:%.*]], i32 0176; POW2-ONLY-NEXT: [[GEP_SRC_2:%.*]] = getelementptr inbounds float, ptr [[SRC]], i32 2177; POW2-ONLY-NEXT: [[L_SRC_2:%.*]] = load float, ptr [[GEP_SRC_2]], align 4178; POW2-ONLY-NEXT: [[FADD_2:%.*]] = fadd float [[L_SRC_2]], 1.000000e+01179; POW2-ONLY-NEXT: [[TMP0:%.*]] = load <2 x float>, ptr [[GEP_SRC_0]], align 4180; POW2-ONLY-NEXT: [[TMP1:%.*]] = fadd <2 x float> [[TMP0]], splat (float 1.000000e+01)181; POW2-ONLY-NEXT: store <2 x float> [[TMP1]], ptr [[DST:%.*]], align 4182; POW2-ONLY-NEXT: [[DST_2:%.*]] = getelementptr float, ptr [[DST]], i32 2183; POW2-ONLY-NEXT: store float [[FADD_2]], ptr [[DST_2]], align 4184; POW2-ONLY-NEXT: ret void185;186entry:187 %gep.src.0 = getelementptr inbounds float, ptr %src, i32 0188 %l.src.0 = load float , ptr %gep.src.0, align 4189 %fadd.0 = fadd float %l.src.0, 10.0190 191 %gep.src.1 = getelementptr inbounds float , ptr %src, i32 1192 %l.src.1 = load float, ptr %gep.src.1, align 4193 %fadd.1 = fadd float %l.src.1, 10.0194 195 %gep.src.2 = getelementptr inbounds float, ptr %src, i32 2196 %l.src.2 = load float, ptr %gep.src.2, align 4197 %fadd.2 = fadd float %l.src.2, 10.0198 199 store float %fadd.0, ptr %dst200 201 %dst.1 = getelementptr float, ptr %dst, i32 1202 store float %fadd.1, ptr %dst.1203 204 %dst.2 = getelementptr float, ptr %dst, i32 2205 store float %fadd.2, ptr %dst.2206 207 ret void208}209 210define void @phi_store3(ptr %dst) {211; CHECK-LABEL: @phi_store3(212; CHECK-NEXT: entry:213; CHECK-NEXT: br label [[EXIT:%.*]]214; CHECK: invoke.cont8.loopexit:215; CHECK-NEXT: br label [[EXIT]]216; CHECK: exit:217; CHECK-NEXT: [[P_2:%.*]] = phi i32 [ 3, [[ENTRY:%.*]] ], [ 0, [[INVOKE_CONT8_LOOPEXIT:%.*]] ]218; CHECK-NEXT: [[TMP0:%.*]] = phi <2 x i32> [ <i32 1, i32 2>, [[ENTRY]] ], [ poison, [[INVOKE_CONT8_LOOPEXIT]] ]219; CHECK-NEXT: [[DST_2:%.*]] = getelementptr i32, ptr [[DST:%.*]], i32 2220; CHECK-NEXT: store <2 x i32> [[TMP0]], ptr [[DST]], align 4221; CHECK-NEXT: store i32 [[P_2]], ptr [[DST_2]], align 4222; CHECK-NEXT: ret void223;224entry:225 br label %exit226 227invoke.cont8.loopexit: ; No predecessors!228 br label %exit229 230exit:231 %p.0 = phi i32 [ 1, %entry ], [ 0, %invoke.cont8.loopexit ]232 %p.1 = phi i32 [ 2, %entry ], [ 0, %invoke.cont8.loopexit ]233 %p.2 = phi i32 [ 3, %entry ], [ 0, %invoke.cont8.loopexit ]234 235 %dst.1 = getelementptr i32, ptr %dst, i32 1236 %dst.2 = getelementptr i32, ptr %dst, i32 2237 238 store i32 %p.0, ptr %dst, align 4239 store i32 %p.1, ptr %dst.1, align 4240 store i32 %p.2, ptr %dst.2, align 4241 ret void242}243 244define void @store_try_reorder(ptr %dst) {245; NON-POW2-LABEL: @store_try_reorder(246; NON-POW2-NEXT: entry:247; NON-POW2-NEXT: store <3 x i32> zeroinitializer, ptr [[DST:%.*]], align 4248; NON-POW2-NEXT: ret void249;250; POW2-ONLY-LABEL: @store_try_reorder(251; POW2-ONLY-NEXT: entry:252; POW2-ONLY-NEXT: store <2 x i32> zeroinitializer, ptr [[DST:%.*]], align 4253; POW2-ONLY-NEXT: [[ADD216:%.*]] = sub i32 0, 0254; POW2-ONLY-NEXT: [[ARRAYIDX_I1891:%.*]] = getelementptr i32, ptr [[DST]], i64 2255; POW2-ONLY-NEXT: store i32 [[ADD216]], ptr [[ARRAYIDX_I1891]], align 4256; POW2-ONLY-NEXT: ret void257;258entry:259 %add = add i32 0, 0260 store i32 %add, ptr %dst, align 4261 %add207 = sub i32 0, 0262 %arrayidx.i1887 = getelementptr i32, ptr %dst, i64 1263 store i32 %add207, ptr %arrayidx.i1887, align 4264 %add216 = sub i32 0, 0265 %arrayidx.i1891 = getelementptr i32, ptr %dst, i64 2266 store i32 %add216, ptr %arrayidx.i1891, align 4267 ret void268}269 270define void @vec3_fpext_cost(ptr %Colour, float %0) {271; CHECK-LABEL: @vec3_fpext_cost(272; CHECK-NEXT: entry:273; CHECK-NEXT: [[ARRAYIDX80:%.*]] = getelementptr float, ptr [[COLOUR:%.*]], i64 2274; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> poison, float [[TMP0:%.*]], i32 0275; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> poison, <2 x i32> zeroinitializer276; CHECK-NEXT: [[TMP3:%.*]] = fpext <2 x float> [[TMP2]] to <2 x double>277; CHECK-NEXT: [[TMP4:%.*]] = call <2 x double> @llvm.fmuladd.v2f64(<2 x double> [[TMP3]], <2 x double> zeroinitializer, <2 x double> zeroinitializer)278; CHECK-NEXT: [[TMP5:%.*]] = fptrunc <2 x double> [[TMP4]] to <2 x float>279; CHECK-NEXT: store <2 x float> [[TMP5]], ptr [[COLOUR]], align 4280; CHECK-NEXT: [[CONV78:%.*]] = fpext float [[TMP0]] to double281; CHECK-NEXT: [[TMP6:%.*]] = call double @llvm.fmuladd.f64(double [[CONV78]], double 0.000000e+00, double 0.000000e+00)282; CHECK-NEXT: [[CONV82:%.*]] = fptrunc double [[TMP6]] to float283; CHECK-NEXT: store float [[CONV82]], ptr [[ARRAYIDX80]], align 4284; CHECK-NEXT: ret void285;286entry:287 %arrayidx72 = getelementptr float, ptr %Colour, i64 1288 %arrayidx80 = getelementptr float, ptr %Colour, i64 2289 %conv62 = fpext float %0 to double290 %1 = call double @llvm.fmuladd.f64(double %conv62, double 0.000000e+00, double 0.000000e+00)291 %conv66 = fptrunc double %1 to float292 store float %conv66, ptr %Colour, align 4293 %conv70 = fpext float %0 to double294 %2 = call double @llvm.fmuladd.f64(double %conv70, double 0.000000e+00, double 0.000000e+00)295 %conv74 = fptrunc double %2 to float296 store float %conv74, ptr %arrayidx72, align 4297 %conv78 = fpext float %0 to double298 %3 = call double @llvm.fmuladd.f64(double %conv78, double 0.000000e+00, double 0.000000e+00)299 %conv82 = fptrunc double %3 to float300 store float %conv82, ptr %arrayidx80, align 4301 ret void302}303 304define void @fpext_gather(ptr %dst, double %conv) {305; CHECK-LABEL: @fpext_gather(306; CHECK-NEXT: entry:307; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> poison, double [[CONV:%.*]], i32 0308; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x double> [[TMP0]], <2 x double> poison, <2 x i32> zeroinitializer309; CHECK-NEXT: [[TMP2:%.*]] = fptrunc <2 x double> [[TMP1]] to <2 x float>310; CHECK-NEXT: [[LENGTHS:%.*]] = getelementptr float, ptr [[DST:%.*]], i64 0311; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x float> [[TMP2]], i32 0312; CHECK-NEXT: store float [[TMP3]], ptr [[LENGTHS]], align 4313; CHECK-NEXT: [[ARRAYIDX32:%.*]] = getelementptr float, ptr [[DST]], i64 1314; CHECK-NEXT: store <2 x float> [[TMP2]], ptr [[ARRAYIDX32]], align 4315; CHECK-NEXT: ret void316;317entry:318 %conv25 = fptrunc double %conv to float319 %Lengths = getelementptr float, ptr %dst, i64 0320 store float %conv25, ptr %Lengths, align 4321 %arrayidx32 = getelementptr float, ptr %dst, i64 1322 store float %conv25, ptr %arrayidx32, align 4323 %conv34 = fptrunc double %conv to float324 %arrayidx37 = getelementptr float, ptr %dst, i64 2325 store float %conv34, ptr %arrayidx37, align 4326 ret void327}328 329declare float @llvm.fmuladd.f32(float, float, float)330 331declare double @llvm.fmuladd.f64(double, double, double)332