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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 42; RUN: opt -passes=slp-vectorizer -slp-vectorize-non-power-of-2 -mtriple=x86_64-apple-macosx -S %s | FileCheck --check-prefixes=CHECK,NON-POW2 %s3; RUN: opt -passes=slp-vectorizer -slp-vectorize-non-power-of-2=false -mtriple=x86_64-apple-macosx -S %s | FileCheck --check-prefixes=CHECK,POW2-ONLY %s4 5%struct.zot = type { i32, i32, i32 }6 7define i1 @reorder_results(ptr %arg, i1 %arg1, ptr %arg2, i64 %arg3, ptr %arg4) {8; CHECK-LABEL: define i1 @reorder_results(9; CHECK-SAME: ptr [[ARG:%.*]], i1 [[ARG1:%.*]], ptr [[ARG2:%.*]], i64 [[ARG3:%.*]], ptr [[ARG4:%.*]]) {10; CHECK-NEXT: bb:11; CHECK-NEXT: [[LOAD:%.*]] = load ptr, ptr [[ARG4]], align 812; CHECK-NEXT: [[LOAD4:%.*]] = load i32, ptr [[LOAD]], align 413; CHECK-NEXT: [[GETELEMENTPTR:%.*]] = getelementptr i8, ptr [[LOAD]], i64 414; CHECK-NEXT: [[LOAD5:%.*]] = load i32, ptr [[GETELEMENTPTR]], align 415; CHECK-NEXT: [[GETELEMENTPTR6:%.*]] = getelementptr i8, ptr [[LOAD]], i64 816; CHECK-NEXT: [[LOAD7:%.*]] = load i32, ptr [[GETELEMENTPTR6]], align 417; CHECK-NEXT: br i1 [[ARG1]], label [[BB12:%.*]], label [[BB9:%.*]]18; CHECK: bb8:19; CHECK-NEXT: ret i1 false20; CHECK: bb9:21; CHECK-NEXT: [[FREEZE:%.*]] = freeze ptr [[ARG]]22; CHECK-NEXT: store i32 [[LOAD4]], ptr [[FREEZE]], align 423; CHECK-NEXT: [[GETELEMENTPTR10:%.*]] = getelementptr i8, ptr [[FREEZE]], i64 424; CHECK-NEXT: store i32 [[LOAD7]], ptr [[GETELEMENTPTR10]], align 425; CHECK-NEXT: [[GETELEMENTPTR11:%.*]] = getelementptr i8, ptr [[FREEZE]], i64 826; CHECK-NEXT: store i32 [[LOAD5]], ptr [[GETELEMENTPTR11]], align 427; CHECK-NEXT: br label [[BB8:%.*]]28; CHECK: bb12:29; CHECK-NEXT: [[GETELEMENTPTR13:%.*]] = getelementptr [[STRUCT_ZOT:%.*]], ptr [[ARG2]], i64 [[ARG3]]30; CHECK-NEXT: store i32 [[LOAD4]], ptr [[GETELEMENTPTR13]], align 431; CHECK-NEXT: [[GETELEMENTPTR14:%.*]] = getelementptr i8, ptr [[GETELEMENTPTR13]], i64 432; CHECK-NEXT: store i32 [[LOAD7]], ptr [[GETELEMENTPTR14]], align 433; CHECK-NEXT: [[GETELEMENTPTR15:%.*]] = getelementptr i8, ptr [[GETELEMENTPTR13]], i64 834; CHECK-NEXT: store i32 [[LOAD5]], ptr [[GETELEMENTPTR15]], align 435; CHECK-NEXT: br label [[BB8]]36;37bb:38 %load = load ptr, ptr %arg4, align 839 %load4 = load i32, ptr %load, align 440 %getelementptr = getelementptr i8, ptr %load, i64 441 %load5 = load i32, ptr %getelementptr, align 442 %getelementptr6 = getelementptr i8, ptr %load, i64 843 %load7 = load i32, ptr %getelementptr6, align 444 br i1 %arg1, label %bb12, label %bb945 46bb8: ; preds = %bb12, %bb947 ret i1 false48 49bb9: ; preds = %bb50 %freeze = freeze ptr %arg51 store i32 %load4, ptr %freeze, align 452 %getelementptr10 = getelementptr i8, ptr %freeze, i64 453 store i32 %load7, ptr %getelementptr10, align 454 %getelementptr11 = getelementptr i8, ptr %freeze, i64 855 store i32 %load5, ptr %getelementptr11, align 456 br label %bb857 58bb12: ; preds = %bb59 %getelementptr13 = getelementptr %struct.zot, ptr %arg2, i64 %arg360 store i32 %load4, ptr %getelementptr13, align 461 %getelementptr14 = getelementptr i8, ptr %getelementptr13, i64 462 store i32 %load7, ptr %getelementptr14, align 463 %getelementptr15 = getelementptr i8, ptr %getelementptr13, i64 864 store i32 %load5, ptr %getelementptr15, align 465 br label %bb866}67 68define void @extract_mask(ptr %object, double %conv503, double %conv520) {69; CHECK-LABEL: define void @extract_mask(70; CHECK-SAME: ptr [[OBJECT:%.*]], double [[CONV503:%.*]], double [[CONV520:%.*]]) {71; CHECK-NEXT: entry:72; CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[OBJECT]], align 873; CHECK-NEXT: [[BBOX483:%.*]] = getelementptr float, ptr [[TMP0]]74; CHECK-NEXT: [[TMP1:%.*]] = load <2 x float>, ptr [[BBOX483]], align 875; CHECK-NEXT: [[TMP2:%.*]] = fpext <2 x float> [[TMP1]] to <2 x double>76; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <2 x double> [[TMP2]], <2 x double> poison, <2 x i32> <i32 1, i32 0>77; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x double> [[TMP3]], double [[CONV503]], i32 078; CHECK-NEXT: [[TMP5:%.*]] = fcmp ogt <2 x double> [[TMP4]], <double 0.000000e+00, double -2.000000e+10>79; CHECK-NEXT: [[TMP6:%.*]] = select <2 x i1> [[TMP5]], <2 x double> [[TMP3]], <2 x double> <double 0.000000e+00, double -2.000000e+10>80; CHECK-NEXT: [[TMP7:%.*]] = fsub <2 x double> zeroinitializer, [[TMP6]]81; CHECK-NEXT: [[TMP8:%.*]] = fptrunc <2 x double> [[TMP7]] to <2 x float>82; CHECK-NEXT: [[TMP9:%.*]] = extractelement <2 x float> [[TMP8]], i32 083; CHECK-NEXT: [[TMP10:%.*]] = extractelement <2 x float> [[TMP8]], i32 184; CHECK-NEXT: [[MUL646:%.*]] = fmul float [[TMP9]], [[TMP10]]85; CHECK-NEXT: [[CMP663:%.*]] = fcmp olt float [[MUL646]], 0.000000e+0086; CHECK-NEXT: br i1 [[CMP663]], label [[IF_THEN665:%.*]], label [[IF_END668:%.*]]87; CHECK: if.then665:88; CHECK-NEXT: [[ARRAYIDX656:%.*]] = getelementptr float, ptr [[OBJECT]], i64 1089; CHECK-NEXT: [[BBOX651:%.*]] = getelementptr float, ptr [[OBJECT]]90; CHECK-NEXT: [[CONV613:%.*]] = fptrunc double [[CONV503]] to float91; CHECK-NEXT: store float [[CONV613]], ptr [[BBOX651]], align 892; CHECK-NEXT: [[BBOX_SROA_6_0_BBOX666_SROA_IDX:%.*]] = getelementptr float, ptr [[OBJECT]], i64 193; CHECK-NEXT: [[TMP11:%.*]] = insertelement <2 x double> [[TMP6]], double [[CONV520]], i32 194; CHECK-NEXT: [[TMP12:%.*]] = fptrunc <2 x double> [[TMP11]] to <2 x float>95; CHECK-NEXT: store <2 x float> [[TMP12]], ptr [[BBOX_SROA_6_0_BBOX666_SROA_IDX]], align 496; CHECK-NEXT: store <2 x float> [[TMP8]], ptr [[ARRAYIDX656]], align 897; CHECK-NEXT: br label [[IF_END668]]98; CHECK: if.end668:99; CHECK-NEXT: ret void100;101entry:102 %0 = load ptr, ptr %object, align 8103 %bbox483 = getelementptr float, ptr %0104 %1 = load float, ptr %bbox483, align 8105 %conv486 = fpext float %1 to double106 %cmp487 = fcmp ogt double %conv486, -2.000000e+10107 %conv486.2 = select i1 %cmp487, double %conv486, double -2.000000e+10108 %arrayidx502 = getelementptr float, ptr %0, i64 1109 %2 = load float, ptr %arrayidx502, align 4110 %conv5033 = fpext float %2 to double111 %cmp504 = fcmp ogt double %conv503, 0.000000e+00112 %cond514 = select i1 %cmp504, double %conv5033, double 0.000000e+00113 %sub626 = fsub double 0.000000e+00, %conv486.2114 %conv627 = fptrunc double %sub626 to float115 %sub632 = fsub double 0.000000e+00, %cond514116 %conv633 = fptrunc double %sub632 to float117 %mul646 = fmul float %conv633, %conv627118 %cmp663 = fcmp olt float %mul646, 0.000000e+00119 br i1 %cmp663, label %if.then665, label %if.end668120 121if.then665: ; preds = %entry122 %arrayidx656 = getelementptr float, ptr %object, i64 10123 %lengths652 = getelementptr float, ptr %object, i64 11124 %bbox651 = getelementptr float, ptr %object125 %conv621 = fptrunc double %conv520 to float126 %conv617 = fptrunc double %cond514 to float127 %conv613 = fptrunc double %conv503 to float128 store float %conv613, ptr %bbox651, align 8129 %bbox.sroa.6.0.bbox666.sroa_idx = getelementptr float, ptr %object, i64 1130 store float %conv617, ptr %bbox.sroa.6.0.bbox666.sroa_idx, align 4131 %bbox.sroa.8.0.bbox666.sroa_idx = getelementptr float, ptr %object, i64 2132 store float %conv621, ptr %bbox.sroa.8.0.bbox666.sroa_idx, align 8133 store float %conv627, ptr %lengths652, align 4134 store float %conv633, ptr %arrayidx656, align 8135 br label %if.end668136 137if.end668: ; preds = %if.then665, %entry138 ret void139}140 141define void @gather_2(ptr %mat1, float %0, float %1) {142; NON-POW2-LABEL: define void @gather_2(143; NON-POW2-SAME: ptr [[MAT1:%.*]], float [[TMP0:%.*]], float [[TMP1:%.*]]) {144; NON-POW2-NEXT: entry:145; NON-POW2-NEXT: [[TMP2:%.*]] = insertelement <3 x float> poison, float [[TMP0]], i32 0146; NON-POW2-NEXT: [[TMP4:%.*]] = shufflevector <3 x float> [[TMP2]], <3 x float> poison, <3 x i32> zeroinitializer147; NON-POW2-NEXT: [[TMP5:%.*]] = insertelement <3 x float> <float 0.000000e+00, float poison, float poison>, float [[TMP1]], i32 1148; NON-POW2-NEXT: [[TMP6:%.*]] = shufflevector <3 x float> [[TMP5]], <3 x float> poison, <3 x i32> <i32 0, i32 1, i32 1>149; NON-POW2-NEXT: [[TMP7:%.*]] = call <3 x float> @llvm.fmuladd.v3f32(<3 x float> [[TMP4]], <3 x float> [[TMP6]], <3 x float> zeroinitializer)150; NON-POW2-NEXT: [[ARRAYIDX163:%.*]] = getelementptr [4 x [4 x float]], ptr [[MAT1]], i64 0, i64 1151; NON-POW2-NEXT: [[TMP8:%.*]] = fmul <3 x float> [[TMP7]], zeroinitializer152; NON-POW2-NEXT: store <3 x float> [[TMP8]], ptr [[ARRAYIDX163]], align 4153; NON-POW2-NEXT: ret void154;155; POW2-ONLY-LABEL: define void @gather_2(156; POW2-ONLY-SAME: ptr [[MAT1:%.*]], float [[TMP0:%.*]], float [[TMP1:%.*]]) {157; POW2-ONLY-NEXT: entry:158; POW2-ONLY-NEXT: [[TMP2:%.*]] = insertelement <2 x float> poison, float [[TMP0]], i32 0159; POW2-ONLY-NEXT: [[TMP3:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <2 x i32> zeroinitializer160; POW2-ONLY-NEXT: [[TMP4:%.*]] = insertelement <2 x float> <float 0.000000e+00, float poison>, float [[TMP1]], i32 1161; POW2-ONLY-NEXT: [[TMP5:%.*]] = call <2 x float> @llvm.fmuladd.v2f32(<2 x float> [[TMP3]], <2 x float> [[TMP4]], <2 x float> zeroinitializer)162; POW2-ONLY-NEXT: [[TMP6:%.*]] = call float @llvm.fmuladd.f32(float [[TMP0]], float [[TMP1]], float 0.000000e+00)163; POW2-ONLY-NEXT: [[TMP7:%.*]] = fmul float [[TMP6]], 0.000000e+00164; POW2-ONLY-NEXT: [[ARRAYIDX163:%.*]] = getelementptr [4 x [4 x float]], ptr [[MAT1]], i64 0, i64 1165; POW2-ONLY-NEXT: [[ARRAYIDX5_I_I_I280:%.*]] = getelementptr [4 x [4 x float]], ptr [[MAT1]], i64 0, i64 1, i64 2166; POW2-ONLY-NEXT: [[TMP8:%.*]] = fmul <2 x float> [[TMP5]], zeroinitializer167; POW2-ONLY-NEXT: store <2 x float> [[TMP8]], ptr [[ARRAYIDX163]], align 4168; POW2-ONLY-NEXT: store float [[TMP7]], ptr [[ARRAYIDX5_I_I_I280]], align 4169; POW2-ONLY-NEXT: ret void170;171entry:172 %2 = call float @llvm.fmuladd.f32(float %0, float 0.000000e+00, float 0.000000e+00)173 %3 = call float @llvm.fmuladd.f32(float %1, float %0, float 0.000000e+00)174 %4 = call float @llvm.fmuladd.f32(float %0, float %1, float 0.000000e+00)175 %5 = fmul float %2, 0.000000e+00176 %6 = fmul float %3, 0.000000e+00177 %7 = fmul float %4, 0.000000e+00178 %arrayidx163 = getelementptr [4 x [4 x float]], ptr %mat1, i64 0, i64 1179 %arrayidx2.i.i.i278 = getelementptr [4 x [4 x float]], ptr %mat1, i64 0, i64 1, i64 1180 %arrayidx5.i.i.i280 = getelementptr [4 x [4 x float]], ptr %mat1, i64 0, i64 1, i64 2181 store float %5, ptr %arrayidx163, align 4182 store float %6, ptr %arrayidx2.i.i.i278, align 4183 store float %7, ptr %arrayidx5.i.i.i280, align 4184 ret void185}186 187define i32 @reorder_indices_1(float %0) {188; NON-POW2-LABEL: define i32 @reorder_indices_1(189; NON-POW2-SAME: float [[TMP0:%.*]]) {190; NON-POW2-NEXT: entry:191; NON-POW2-NEXT: [[NOR1:%.*]] = alloca [0 x [3 x float]], i32 0, align 4192; NON-POW2-NEXT: [[TMP1:%.*]] = load <3 x float>, ptr [[NOR1]], align 4193; NON-POW2-NEXT: [[TMP2:%.*]] = shufflevector <3 x float> [[TMP1]], <3 x float> poison, <3 x i32> <i32 1, i32 2, i32 0>194; NON-POW2-NEXT: [[TMP3:%.*]] = fneg <3 x float> [[TMP2]]195; NON-POW2-NEXT: [[TMP4:%.*]] = insertelement <3 x float> poison, float [[TMP0]], i32 0196; NON-POW2-NEXT: [[TMP5:%.*]] = shufflevector <3 x float> [[TMP4]], <3 x float> poison, <3 x i32> zeroinitializer197; NON-POW2-NEXT: [[TMP6:%.*]] = fmul <3 x float> [[TMP3]], [[TMP5]]198; NON-POW2-NEXT: [[TMP7:%.*]] = call <3 x float> @llvm.fmuladd.v3f32(<3 x float> [[TMP1]], <3 x float> zeroinitializer, <3 x float> [[TMP6]])199; NON-POW2-NEXT: [[TMP8:%.*]] = call <3 x float> @llvm.fmuladd.v3f32(<3 x float> [[TMP5]], <3 x float> [[TMP7]], <3 x float> zeroinitializer)200; NON-POW2-NEXT: [[TMP9:%.*]] = fmul <3 x float> [[TMP8]], zeroinitializer201; NON-POW2-NEXT: store <3 x float> [[TMP9]], ptr [[NOR1]], align 4202; NON-POW2-NEXT: ret i32 0203;204; POW2-ONLY-LABEL: define i32 @reorder_indices_1(205; POW2-ONLY-SAME: float [[TMP0:%.*]]) {206; POW2-ONLY-NEXT: entry:207; POW2-ONLY-NEXT: [[NOR1:%.*]] = alloca [0 x [3 x float]], i32 0, align 4208; POW2-ONLY-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr float, ptr [[NOR1]], i64 1209; POW2-ONLY-NEXT: [[ARRAYIDX2_I265:%.*]] = getelementptr float, ptr [[NOR1]], i64 2210; POW2-ONLY-NEXT: [[TMP1:%.*]] = load float, ptr [[ARRAYIDX2_I265]], align 4211; POW2-ONLY-NEXT: [[TMP7:%.*]] = load <2 x float>, ptr [[ARRAYIDX_I]], align 4212; POW2-ONLY-NEXT: [[TMP2:%.*]] = load <2 x float>, ptr [[NOR1]], align 4213; POW2-ONLY-NEXT: [[TMP3:%.*]] = extractelement <2 x float> [[TMP2]], i32 0214; POW2-ONLY-NEXT: [[TMP4:%.*]] = fneg float [[TMP3]]215; POW2-ONLY-NEXT: [[NEG11_I:%.*]] = fmul float [[TMP4]], [[TMP0]]216; POW2-ONLY-NEXT: [[TMP5:%.*]] = call float @llvm.fmuladd.f32(float [[TMP1]], float 0.000000e+00, float [[NEG11_I]])217; POW2-ONLY-NEXT: [[TMP8:%.*]] = fneg <2 x float> [[TMP7]]218; POW2-ONLY-NEXT: [[TMP9:%.*]] = insertelement <2 x float> poison, float [[TMP0]], i32 0219; POW2-ONLY-NEXT: [[TMP10:%.*]] = shufflevector <2 x float> [[TMP9]], <2 x float> poison, <2 x i32> zeroinitializer220; POW2-ONLY-NEXT: [[TMP11:%.*]] = fmul <2 x float> [[TMP8]], [[TMP10]]221; POW2-ONLY-NEXT: [[TMP12:%.*]] = call <2 x float> @llvm.fmuladd.v2f32(<2 x float> [[TMP2]], <2 x float> zeroinitializer, <2 x float> [[TMP11]])222; POW2-ONLY-NEXT: [[TMP13:%.*]] = call <2 x float> @llvm.fmuladd.v2f32(<2 x float> [[TMP10]], <2 x float> [[TMP12]], <2 x float> zeroinitializer)223; POW2-ONLY-NEXT: [[TMP14:%.*]] = call float @llvm.fmuladd.f32(float [[TMP0]], float [[TMP5]], float 0.000000e+00)224; POW2-ONLY-NEXT: [[TMP15:%.*]] = fmul <2 x float> [[TMP13]], zeroinitializer225; POW2-ONLY-NEXT: [[MUL6_I_I_I:%.*]] = fmul float [[TMP14]], 0.000000e+00226; POW2-ONLY-NEXT: store <2 x float> [[TMP15]], ptr [[NOR1]], align 4227; POW2-ONLY-NEXT: store float [[MUL6_I_I_I]], ptr [[ARRAYIDX2_I265]], align 4228; POW2-ONLY-NEXT: ret i32 0229;230entry:231 %nor1 = alloca [0 x [3 x float]], i32 0, align 4232 %arrayidx.i = getelementptr float, ptr %nor1, i64 1233 %1 = load float, ptr %arrayidx.i, align 4234 %arrayidx2.i265 = getelementptr float, ptr %nor1, i64 2235 %2 = load float, ptr %arrayidx2.i265, align 4236 %3 = fneg float %2237 %neg.i267 = fmul float %3, %0238 %4 = call float @llvm.fmuladd.f32(float %1, float 0.000000e+00, float %neg.i267)239 %5 = load float, ptr %nor1, align 4240 %6 = fneg float %5241 %neg11.i = fmul float %6, %0242 %7 = call float @llvm.fmuladd.f32(float %2, float 0.000000e+00, float %neg11.i)243 %8 = fneg float %1244 %neg18.i = fmul float %8, %0245 %9 = call float @llvm.fmuladd.f32(float %5, float 0.000000e+00, float %neg18.i)246 %10 = call float @llvm.fmuladd.f32(float %0, float %9, float 0.000000e+00)247 %11 = call float @llvm.fmuladd.f32(float %0, float %4, float 0.000000e+00)248 %12 = call float @llvm.fmuladd.f32(float %0, float %7, float 0.000000e+00)249 %mul.i.i.i = fmul float %10, 0.000000e+00250 %mul3.i.i.i = fmul float %11, 0.000000e+00251 %mul6.i.i.i = fmul float %12, 0.000000e+00252 store float %mul.i.i.i, ptr %nor1, align 4253 store float %mul3.i.i.i, ptr %arrayidx.i, align 4254 store float %mul6.i.i.i, ptr %arrayidx2.i265, align 4255 ret i32 0256}257 258define void @reorder_indices_2(ptr %spoint) {259; NON-POW2-LABEL: define void @reorder_indices_2(260; NON-POW2-SAME: ptr [[SPOINT:%.*]]) {261; NON-POW2-NEXT: entry:262; NON-POW2-NEXT: [[DSCO:%.*]] = getelementptr float, ptr [[SPOINT]], i64 0263; NON-POW2-NEXT: [[TMP0:%.*]] = call <3 x float> @llvm.fmuladd.v3f32(<3 x float> zeroinitializer, <3 x float> zeroinitializer, <3 x float> zeroinitializer)264; NON-POW2-NEXT: [[TMP1:%.*]] = fmul <3 x float> [[TMP0]], zeroinitializer265; NON-POW2-NEXT: [[TMP2:%.*]] = shufflevector <3 x float> [[TMP1]], <3 x float> poison, <3 x i32> <i32 1, i32 2, i32 0>266; NON-POW2-NEXT: store <3 x float> [[TMP2]], ptr [[DSCO]], align 4267; NON-POW2-NEXT: ret void268;269; POW2-ONLY-LABEL: define void @reorder_indices_2(270; POW2-ONLY-SAME: ptr [[SPOINT:%.*]]) {271; POW2-ONLY-NEXT: entry:272; POW2-ONLY-NEXT: [[TMP0:%.*]] = extractelement <3 x float> zeroinitializer, i64 0273; POW2-ONLY-NEXT: [[TMP1:%.*]] = tail call float @llvm.fmuladd.f32(float [[TMP0]], float 0.000000e+00, float 0.000000e+00)274; POW2-ONLY-NEXT: [[MUL4_I461:%.*]] = fmul float [[TMP1]], 0.000000e+00275; POW2-ONLY-NEXT: [[DSCO:%.*]] = getelementptr float, ptr [[SPOINT]], i64 0276; POW2-ONLY-NEXT: [[TMP2:%.*]] = call <2 x float> @llvm.fmuladd.v2f32(<2 x float> zeroinitializer, <2 x float> zeroinitializer, <2 x float> zeroinitializer)277; POW2-ONLY-NEXT: [[TMP3:%.*]] = fmul <2 x float> [[TMP2]], zeroinitializer278; POW2-ONLY-NEXT: store <2 x float> [[TMP3]], ptr [[DSCO]], align 4279; POW2-ONLY-NEXT: [[ARRAYIDX5_I476:%.*]] = getelementptr float, ptr [[SPOINT]], i64 2280; POW2-ONLY-NEXT: store float [[MUL4_I461]], ptr [[ARRAYIDX5_I476]], align 4281; POW2-ONLY-NEXT: ret void282;283entry:284 %0 = extractelement <3 x float> zeroinitializer, i64 1285 %1 = extractelement <3 x float> zeroinitializer, i64 2286 %2 = extractelement <3 x float> zeroinitializer, i64 0287 %3 = tail call float @llvm.fmuladd.f32(float %0, float 0.000000e+00, float 0.000000e+00)288 %4 = tail call float @llvm.fmuladd.f32(float %1, float 0.000000e+00, float 0.000000e+00)289 %5 = tail call float @llvm.fmuladd.f32(float %2, float 0.000000e+00, float 0.000000e+00)290 %mul.i457 = fmul float %3, 0.000000e+00291 %mul2.i459 = fmul float %4, 0.000000e+00292 %mul4.i461 = fmul float %5, 0.000000e+00293 %dsco = getelementptr float, ptr %spoint, i64 0294 store float %mul.i457, ptr %dsco, align 4295 %arrayidx3.i474 = getelementptr float, ptr %spoint, i64 1296 store float %mul2.i459, ptr %arrayidx3.i474, align 4297 %arrayidx5.i476 = getelementptr float, ptr %spoint, i64 2298 store float %mul4.i461, ptr %arrayidx5.i476, align 4299 ret void300}301 302define void @reorder_indices_2x_load(ptr %png_ptr, ptr %info_ptr) {303; CHECK-LABEL: define void @reorder_indices_2x_load(304; CHECK-SAME: ptr [[PNG_PTR:%.*]], ptr [[INFO_PTR:%.*]]) {305; CHECK-NEXT: entry:306; CHECK-NEXT: [[BIT_DEPTH:%.*]] = getelementptr i8, ptr [[INFO_PTR]], i64 0307; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[BIT_DEPTH]], align 4308; CHECK-NEXT: [[COLOR_TYPE:%.*]] = getelementptr i8, ptr [[INFO_PTR]], i64 1309; CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr [[COLOR_TYPE]], align 1310; CHECK-NEXT: [[BIT_DEPTH37_I:%.*]] = getelementptr i8, ptr [[PNG_PTR]], i64 11311; CHECK-NEXT: store i8 [[TMP0]], ptr [[BIT_DEPTH37_I]], align 1312; CHECK-NEXT: [[COLOR_TYPE39_I:%.*]] = getelementptr i8, ptr [[PNG_PTR]], i64 10313; CHECK-NEXT: store i8 [[TMP1]], ptr [[COLOR_TYPE39_I]], align 2314; CHECK-NEXT: [[USR_BIT_DEPTH_I:%.*]] = getelementptr i8, ptr [[PNG_PTR]], i64 12315; CHECK-NEXT: store i8 [[TMP0]], ptr [[USR_BIT_DEPTH_I]], align 8316; CHECK-NEXT: ret void317;318entry:319 %bit_depth = getelementptr i8, ptr %info_ptr, i64 0320 %0 = load i8, ptr %bit_depth, align 4321 %color_type = getelementptr i8, ptr %info_ptr, i64 1322 %1 = load i8, ptr %color_type, align 1323 %bit_depth37.i = getelementptr i8, ptr %png_ptr, i64 11324 store i8 %0, ptr %bit_depth37.i, align 1325 %color_type39.i = getelementptr i8, ptr %png_ptr, i64 10326 store i8 %1, ptr %color_type39.i, align 2327 %usr_bit_depth.i = getelementptr i8, ptr %png_ptr, i64 12328 store i8 %0, ptr %usr_bit_depth.i, align 8329 ret void330}331 332define void @reuse_shuffle_indidces_1(ptr %col, float %0, float %1) {333; NON-POW2-LABEL: define void @reuse_shuffle_indidces_1(334; NON-POW2-SAME: ptr [[COL:%.*]], float [[TMP0:%.*]], float [[TMP1:%.*]]) {335; NON-POW2-NEXT: entry:336; NON-POW2-NEXT: [[TMP2:%.*]] = insertelement <3 x float> poison, float [[TMP1]], i32 0337; NON-POW2-NEXT: [[TMP3:%.*]] = insertelement <3 x float> [[TMP2]], float [[TMP0]], i32 1338; NON-POW2-NEXT: [[TMP4:%.*]] = shufflevector <3 x float> [[TMP3]], <3 x float> poison, <3 x i32> <i32 0, i32 1, i32 1>339; NON-POW2-NEXT: [[TMP5:%.*]] = fmul <3 x float> [[TMP4]], zeroinitializer340; NON-POW2-NEXT: [[TMP6:%.*]] = fadd <3 x float> [[TMP5]], zeroinitializer341; NON-POW2-NEXT: store <3 x float> [[TMP6]], ptr [[COL]], align 4342; NON-POW2-NEXT: ret void343;344; POW2-ONLY-LABEL: define void @reuse_shuffle_indidces_1(345; POW2-ONLY-SAME: ptr [[COL:%.*]], float [[TMP0:%.*]], float [[TMP1:%.*]]) {346; POW2-ONLY-NEXT: entry:347; POW2-ONLY-NEXT: [[TMP2:%.*]] = insertelement <2 x float> poison, float [[TMP1]], i32 0348; POW2-ONLY-NEXT: [[TMP3:%.*]] = insertelement <2 x float> [[TMP2]], float [[TMP0]], i32 1349; POW2-ONLY-NEXT: [[TMP4:%.*]] = fmul <2 x float> [[TMP3]], zeroinitializer350; POW2-ONLY-NEXT: [[TMP5:%.*]] = fadd <2 x float> [[TMP4]], zeroinitializer351; POW2-ONLY-NEXT: store <2 x float> [[TMP5]], ptr [[COL]], align 4352; POW2-ONLY-NEXT: [[ARRAYIDX33:%.*]] = getelementptr float, ptr [[COL]], i64 2353; POW2-ONLY-NEXT: [[MUL38:%.*]] = fmul float [[TMP0]], 0.000000e+00354; POW2-ONLY-NEXT: [[TMP6:%.*]] = fadd float [[MUL38]], 0.000000e+00355; POW2-ONLY-NEXT: store float [[TMP6]], ptr [[ARRAYIDX33]], align 4356; POW2-ONLY-NEXT: ret void357;358entry:359 %mul24 = fmul float %1, 0.000000e+00360 %2 = fadd float %mul24, 0.000000e+00361 store float %2, ptr %col, align 4362 %arrayidx26 = getelementptr float, ptr %col, i64 1363 %mul31 = fmul float %0, 0.000000e+00364 %3 = fadd float %mul31, 0.000000e+00365 store float %3, ptr %arrayidx26, align 4366 %arrayidx33 = getelementptr float, ptr %col, i64 2367 %mul38 = fmul float %0, 0.000000e+00368 %4 = fadd float %mul38, 0.000000e+00369 store float %4, ptr %arrayidx33, align 4370 ret void371}372 373define void @reuse_shuffle_indices_2(ptr %inertia, double %0) {374; CHECK-LABEL: define void @reuse_shuffle_indices_2(375; CHECK-SAME: ptr [[INERTIA:%.*]], double [[TMP0:%.*]]) {376; CHECK-NEXT: entry:377; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[TMP0]], i32 0378; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <2 x double> [[TMP1]], <2 x double> poison, <2 x i32> zeroinitializer379; CHECK-NEXT: [[TMP3:%.*]] = fptrunc <2 x double> [[TMP2]] to <2 x float>380; CHECK-NEXT: [[TMP4:%.*]] = fmul <2 x float> [[TMP3]], zeroinitializer381; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <2 x float> [[TMP4]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 1, i32 poison>382; CHECK-NEXT: [[TMP6:%.*]] = fadd <4 x float> [[TMP5]], <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float undef>383; CHECK-NEXT: [[TMP7:%.*]] = fmul <4 x float> [[TMP6]], <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float undef>384; CHECK-NEXT: [[TMP8:%.*]] = fadd <4 x float> [[TMP7]], <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float undef>385; CHECK-NEXT: [[TMP9:%.*]] = shufflevector <4 x float> [[TMP8]], <4 x float> poison, <3 x i32> <i32 0, i32 1, i32 2>386; CHECK-NEXT: store <3 x float> [[TMP9]], ptr [[INERTIA]], align 4387; CHECK-NEXT: ret void388;389entry:390 %1 = insertelement <2 x double> poison, double %0, i32 0391 %2 = shufflevector <2 x double> %1, <2 x double> poison, <2 x i32> zeroinitializer392 %3 = fptrunc <2 x double> %2 to <2 x float>393 %4 = fmul <2 x float> %3, zeroinitializer394 %5 = shufflevector <2 x float> %4, <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 1, i32 poison>395 %6 = fadd <4 x float> %5, <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float undef>396 %7 = fmul <4 x float> %6, <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float undef>397 %8 = fadd <4 x float> %7, <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float undef>398 %9 = shufflevector <4 x float> %8, <4 x float> poison, <3 x i32> <i32 0, i32 1, i32 2>399 store <3 x float> %9, ptr %inertia, align 4400 ret void401}402 403define void @reuse_shuffle_indices_cost_crash_2(ptr %bezt, float %0) {404; NON-POW2-LABEL: define void @reuse_shuffle_indices_cost_crash_2(405; NON-POW2-SAME: ptr [[BEZT:%.*]], float [[TMP0:%.*]]) {406; NON-POW2-NEXT: entry:407; NON-POW2-NEXT: [[FNEG:%.*]] = fmul float [[TMP0]], 0.000000e+00408; NON-POW2-NEXT: [[TMP1:%.*]] = insertelement <3 x float> poison, float [[FNEG]], i32 0409; NON-POW2-NEXT: [[TMP2:%.*]] = shufflevector <3 x float> [[TMP1]], <3 x float> poison, <3 x i32> zeroinitializer410; NON-POW2-NEXT: [[TMP3:%.*]] = insertelement <3 x float> <float poison, float poison, float 0.000000e+00>, float [[TMP0]], i32 0411; NON-POW2-NEXT: [[TMP4:%.*]] = shufflevector <3 x float> [[TMP3]], <3 x float> poison, <3 x i32> <i32 0, i32 0, i32 2>412; NON-POW2-NEXT: [[TMP5:%.*]] = call <3 x float> @llvm.fmuladd.v3f32(<3 x float> [[TMP2]], <3 x float> [[TMP4]], <3 x float> zeroinitializer)413; NON-POW2-NEXT: store <3 x float> [[TMP5]], ptr [[BEZT]], align 4414; NON-POW2-NEXT: ret void415;416; POW2-ONLY-LABEL: define void @reuse_shuffle_indices_cost_crash_2(417; POW2-ONLY-SAME: ptr [[BEZT:%.*]], float [[TMP0:%.*]]) {418; POW2-ONLY-NEXT: entry:419; POW2-ONLY-NEXT: [[FNEG:%.*]] = fmul float [[TMP0]], 0.000000e+00420; POW2-ONLY-NEXT: [[TMP1:%.*]] = insertelement <2 x float> poison, float [[TMP0]], i32 0421; POW2-ONLY-NEXT: [[TMP2:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> poison, <2 x i32> zeroinitializer422; POW2-ONLY-NEXT: [[TMP3:%.*]] = insertelement <2 x float> poison, float [[FNEG]], i32 0423; POW2-ONLY-NEXT: [[TMP4:%.*]] = shufflevector <2 x float> [[TMP3]], <2 x float> poison, <2 x i32> zeroinitializer424; POW2-ONLY-NEXT: [[TMP5:%.*]] = call <2 x float> @llvm.fmuladd.v2f32(<2 x float> [[TMP2]], <2 x float> [[TMP4]], <2 x float> zeroinitializer)425; POW2-ONLY-NEXT: store <2 x float> [[TMP5]], ptr [[BEZT]], align 4426; POW2-ONLY-NEXT: [[TMP6:%.*]] = tail call float @llvm.fmuladd.f32(float [[FNEG]], float 0.000000e+00, float 0.000000e+00)427; POW2-ONLY-NEXT: [[ARRAYIDX8_I831:%.*]] = getelementptr float, ptr [[BEZT]], i64 2428; POW2-ONLY-NEXT: store float [[TMP6]], ptr [[ARRAYIDX8_I831]], align 4429; POW2-ONLY-NEXT: ret void430;431entry:432 %fneg = fmul float %0, 0.000000e+00433 %1 = tail call float @llvm.fmuladd.f32(float %0, float %fneg, float 0.000000e+00)434 store float %1, ptr %bezt, align 4435 %2 = tail call float @llvm.fmuladd.f32(float %0, float %fneg, float 0.000000e+00)436 %arrayidx5.i = getelementptr float, ptr %bezt, i64 1437 store float %2, ptr %arrayidx5.i, align 4438 %3 = tail call float @llvm.fmuladd.f32(float %fneg, float 0.000000e+00, float 0.000000e+00)439 %arrayidx8.i831 = getelementptr float, ptr %bezt, i64 2440 store float %3, ptr %arrayidx8.i831, align 4441 ret void442}443 444define void @reuse_shuffle_indices_cost_crash_3(ptr %m, double %conv, double %conv2) {445; CHECK-LABEL: define void @reuse_shuffle_indices_cost_crash_3(446; CHECK-SAME: ptr [[M:%.*]], double [[CONV:%.*]], double [[CONV2:%.*]]) {447; CHECK-NEXT: entry:448; CHECK-NEXT: [[SUB19:%.*]] = fsub double 0.000000e+00, [[CONV2]]449; CHECK-NEXT: [[CONV20:%.*]] = fptrunc double [[SUB19]] to float450; CHECK-NEXT: store float [[CONV20]], ptr [[M]], align 4451; CHECK-NEXT: [[ADD:%.*]] = fadd double [[CONV]], 0.000000e+00452; CHECK-NEXT: [[CONV239:%.*]] = fptrunc double [[ADD]] to float453; CHECK-NEXT: [[ARRAYIDX25:%.*]] = getelementptr [4 x float], ptr [[M]], i64 0, i64 1454; CHECK-NEXT: store float [[CONV239]], ptr [[ARRAYIDX25]], align 4455; CHECK-NEXT: [[ADD26:%.*]] = fsub double [[CONV]], [[CONV]]456; CHECK-NEXT: [[CONV27:%.*]] = fptrunc double [[ADD26]] to float457; CHECK-NEXT: [[ARRAYIDX29:%.*]] = getelementptr [4 x float], ptr [[M]], i64 0, i64 2458; CHECK-NEXT: store float [[CONV27]], ptr [[ARRAYIDX29]], align 4459; CHECK-NEXT: ret void460;461entry:462 %sub19 = fsub double 0.000000e+00, %conv2463 %conv20 = fptrunc double %sub19 to float464 store float %conv20, ptr %m, align 4465 %add = fadd double %conv, 0.000000e+00466 %conv239 = fptrunc double %add to float467 %arrayidx25 = getelementptr [4 x float], ptr %m, i64 0, i64 1468 store float %conv239, ptr %arrayidx25, align 4469 %add26 = fsub double %conv, %conv470 %conv27 = fptrunc double %add26 to float471 %arrayidx29 = getelementptr [4 x float], ptr %m, i64 0, i64 2472 store float %conv27, ptr %arrayidx29, align 4473 ret void474}475 476define void @reuse_shuffle_indices_cost_crash_4(double %conv7.i) {477; CHECK-LABEL: define void @reuse_shuffle_indices_cost_crash_4(478; CHECK-SAME: double [[CONV7_I:%.*]]) {479; CHECK-NEXT: entry:480; CHECK-NEXT: [[DATA_I111:%.*]] = alloca [0 x [0 x [0 x [3 x float]]]], i32 0, align 4481; CHECK-NEXT: [[ARRAYIDX_2_I:%.*]] = getelementptr [3 x float], ptr [[DATA_I111]], i64 0, i64 2482; CHECK-NEXT: [[MUL17_I_US:%.*]] = fmul double [[CONV7_I]], 0.000000e+00483; CHECK-NEXT: [[MUL_2_I_I_US:%.*]] = fmul double [[MUL17_I_US]], 0.000000e+00484; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> poison, double [[CONV7_I]], i32 0485; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x double> [[TMP0]], <2 x double> poison, <2 x i32> zeroinitializer486; CHECK-NEXT: [[TMP2:%.*]] = fadd <2 x double> [[TMP1]], zeroinitializer487; CHECK-NEXT: [[ADD_2_I_I_US:%.*]] = fadd double [[MUL_2_I_I_US]], 0.000000e+00488; CHECK-NEXT: [[TMP3:%.*]] = fmul <2 x double> [[TMP2]], [[TMP1]]489; CHECK-NEXT: [[TMP4:%.*]] = fadd <2 x double> [[TMP3]], zeroinitializer490; CHECK-NEXT: [[TMP5:%.*]] = fptrunc <2 x double> [[TMP4]] to <2 x float>491; CHECK-NEXT: store <2 x float> [[TMP5]], ptr [[DATA_I111]], align 4492; CHECK-NEXT: [[CONV_2_I46_US:%.*]] = fptrunc double [[ADD_2_I_I_US]] to float493; CHECK-NEXT: store float [[CONV_2_I46_US]], ptr [[ARRAYIDX_2_I]], align 4494; CHECK-NEXT: [[CALL2_I_US:%.*]] = load volatile ptr, ptr [[DATA_I111]], align 8495; CHECK-NEXT: ret void496;497entry:498 %data.i111 = alloca [0 x [0 x [0 x [3 x float]]]], i32 0, align 4499 %arrayidx.1.i = getelementptr [3 x float], ptr %data.i111, i64 0, i64 1500 %arrayidx.2.i = getelementptr [3 x float], ptr %data.i111, i64 0, i64 2501 %mul17.i.us = fmul double %conv7.i, 0.000000e+00502 %mul.2.i.i.us = fmul double %mul17.i.us, 0.000000e+00503 %add.i.i82.i.us = fadd double %conv7.i, 0.000000e+00504 %add.1.i.i84.i.us = fadd double %conv7.i, 0.000000e+00505 %mul.i.i91.i.us = fmul double %add.i.i82.i.us, %conv7.i506 %mul.1.i.i92.i.us = fmul double %add.1.i.i84.i.us, %conv7.i507 %add.i96.i.us = fadd double %mul.i.i91.i.us, 0.000000e+00508 %add.1.i.i.us = fadd double %mul.1.i.i92.i.us, 0.000000e+00509 %add.2.i.i.us = fadd double %mul.2.i.i.us, 0.000000e+00510 %conv.i42.us = fptrunc double %add.i96.i.us to float511 store float %conv.i42.us, ptr %data.i111, align 4512 %conv.1.i44.us = fptrunc double %add.1.i.i.us to float513 store float %conv.1.i44.us, ptr %arrayidx.1.i, align 4514 %conv.2.i46.us = fptrunc double %add.2.i.i.us to float515 store float %conv.2.i46.us, ptr %arrayidx.2.i, align 4516 %call2.i.us = load volatile ptr, ptr %data.i111, align 8517 ret void518}519 520define void @common_mask(ptr %m, double %conv, double %conv2) {521; CHECK-LABEL: define void @common_mask(522; CHECK-SAME: ptr [[M:%.*]], double [[CONV:%.*]], double [[CONV2:%.*]]) {523; CHECK-NEXT: entry:524; CHECK-NEXT: [[SUB19:%.*]] = fsub double [[CONV]], [[CONV]]525; CHECK-NEXT: [[CONV20:%.*]] = fptrunc double [[SUB19]] to float526; CHECK-NEXT: store float [[CONV20]], ptr [[M]], align 4527; CHECK-NEXT: [[ADD:%.*]] = fadd double [[CONV2]], 0.000000e+00528; CHECK-NEXT: [[CONV239:%.*]] = fptrunc double [[ADD]] to float529; CHECK-NEXT: [[ARRAYIDX25:%.*]] = getelementptr [4 x float], ptr [[M]], i64 0, i64 1530; CHECK-NEXT: store float [[CONV239]], ptr [[ARRAYIDX25]], align 4531; CHECK-NEXT: [[ADD26:%.*]] = fsub double 0.000000e+00, [[CONV]]532; CHECK-NEXT: [[CONV27:%.*]] = fptrunc double [[ADD26]] to float533; CHECK-NEXT: [[ARRAYIDX29:%.*]] = getelementptr [4 x float], ptr [[M]], i64 0, i64 2534; CHECK-NEXT: store float [[CONV27]], ptr [[ARRAYIDX29]], align 4535; CHECK-NEXT: ret void536;537entry:538 %sub19 = fsub double %conv, %conv539 %conv20 = fptrunc double %sub19 to float540 store float %conv20, ptr %m, align 4541 %add = fadd double %conv2, 0.000000e+00542 %conv239 = fptrunc double %add to float543 %arrayidx25 = getelementptr [4 x float], ptr %m, i64 0, i64 1544 store float %conv239, ptr %arrayidx25, align 4545 %add26 = fsub double 0.000000e+00, %conv546 %conv27 = fptrunc double %add26 to float547 %arrayidx29 = getelementptr [4 x float], ptr %m, i64 0, i64 2548 store float %conv27, ptr %arrayidx29, align 4549 ret void550}551 552define void @vec3_extract(<3 x i16> %pixel.sroa.0.4.vec.insert606, ptr %call3.i536) {553; NON-POW2-LABEL: define void @vec3_extract(554; NON-POW2-SAME: <3 x i16> [[PIXEL_SROA_0_4_VEC_INSERT606:%.*]], ptr [[CALL3_I536:%.*]]) {555; NON-POW2-NEXT: entry:556; NON-POW2-NEXT: store <3 x i16> [[PIXEL_SROA_0_4_VEC_INSERT606]], ptr [[CALL3_I536]], align 2557; NON-POW2-NEXT: ret void558;559; POW2-ONLY-LABEL: define void @vec3_extract(560; POW2-ONLY-SAME: <3 x i16> [[PIXEL_SROA_0_4_VEC_INSERT606:%.*]], ptr [[CALL3_I536:%.*]]) {561; POW2-ONLY-NEXT: entry:562; POW2-ONLY-NEXT: [[PIXEL_SROA_0_4_VEC_EXTRACT:%.*]] = extractelement <3 x i16> [[PIXEL_SROA_0_4_VEC_INSERT606]], i64 2563; POW2-ONLY-NEXT: [[RED668:%.*]] = getelementptr i16, ptr [[CALL3_I536]], i64 2564; POW2-ONLY-NEXT: store i16 [[PIXEL_SROA_0_4_VEC_EXTRACT]], ptr [[RED668]], align 2565; POW2-ONLY-NEXT: [[TMP0:%.*]] = shufflevector <3 x i16> [[PIXEL_SROA_0_4_VEC_INSERT606]], <3 x i16> poison, <2 x i32> <i32 0, i32 1>566; POW2-ONLY-NEXT: store <2 x i16> [[TMP0]], ptr [[CALL3_I536]], align 2567; POW2-ONLY-NEXT: ret void568;569entry:570 %pixel.sroa.0.4.vec.extract = extractelement <3 x i16> %pixel.sroa.0.4.vec.insert606, i64 2571 %red668 = getelementptr i16, ptr %call3.i536, i64 2572 store i16 %pixel.sroa.0.4.vec.extract, ptr %red668, align 2573 %pixel.sroa.0.2.vec.extract = extractelement <3 x i16> %pixel.sroa.0.4.vec.insert606, i64 1574 %green670 = getelementptr i16, ptr %call3.i536, i64 1575 store i16 %pixel.sroa.0.2.vec.extract, ptr %green670, align 2576 %pixel.sroa.0.0.vec.extract = extractelement <3 x i16> %pixel.sroa.0.4.vec.insert606, i64 0577 store i16 %pixel.sroa.0.0.vec.extract, ptr %call3.i536, align 2578 ret void579}580 581declare float @llvm.fmuladd.f32(float, float, float)582