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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -mtriple=x86_64-unknown -passes=slp-vectorizer -S | FileCheck %s --check-prefixes=SSE23; RUN: opt < %s -mtriple=x86_64-unknown -mcpu=slm -passes=slp-vectorizer -S | FileCheck %s --check-prefixes=SLM4; RUN: opt < %s -mtriple=x86_64-unknown -mcpu=corei7-avx -passes=slp-vectorizer -S | FileCheck %s --check-prefixes=AVX5; RUN: opt < %s -mtriple=x86_64-unknown -mcpu=core-avx2 -passes=slp-vectorizer -S | FileCheck %s --check-prefixes=AVX6; RUN: opt < %s -mtriple=x86_64-unknown -mcpu=knl -passes=slp-vectorizer -S | FileCheck %s --check-prefixes=AVX7; RUN: opt < %s -mtriple=x86_64-unknown -mcpu=skx -mattr=+avx512bw -passes=slp-vectorizer -S | FileCheck %s --check-prefixes=AVX8 9;10; vXi811;12 13define <2 x i64> @loadext_2i8_to_2i64(ptr %p0) {14; SSE2-LABEL: @loadext_2i8_to_2i64(15; SSE2-NEXT: [[TMP1:%.*]] = load <2 x i8>, ptr [[P0:%.*]], align 116; SSE2-NEXT: [[V1:%.*]] = zext <2 x i8> [[TMP1]] to <2 x i64>17; SSE2-NEXT: ret <2 x i64> [[V1]]18;19; SLM-LABEL: @loadext_2i8_to_2i64(20; SLM-NEXT: [[TMP2:%.*]] = load <2 x i8>, ptr [[P0:%.*]], align 121; SLM-NEXT: [[TMP3:%.*]] = zext <2 x i8> [[TMP2]] to <2 x i64>22; SLM-NEXT: ret <2 x i64> [[TMP3]]23;24; AVX-LABEL: @loadext_2i8_to_2i64(25; AVX-NEXT: [[TMP2:%.*]] = load <2 x i8>, ptr [[P0:%.*]], align 126; AVX-NEXT: [[TMP3:%.*]] = zext <2 x i8> [[TMP2]] to <2 x i64>27; AVX-NEXT: ret <2 x i64> [[TMP3]]28;29 %p1 = getelementptr inbounds i8, ptr %p0, i64 130 %i0 = load i8, ptr %p0, align 131 %i1 = load i8, ptr %p1, align 132 %x0 = zext i8 %i0 to i6433 %x1 = zext i8 %i1 to i6434 %v0 = insertelement <2 x i64> undef, i64 %x0, i32 035 %v1 = insertelement <2 x i64> %v0, i64 %x1, i32 136 ret <2 x i64> %v137}38 39define <4 x i32> @loadext_4i8_to_4i32(ptr %p0) {40; SSE2-LABEL: @loadext_4i8_to_4i32(41; SSE2-NEXT: [[TMP2:%.*]] = load <4 x i8>, ptr [[P0:%.*]], align 142; SSE2-NEXT: [[TMP3:%.*]] = zext <4 x i8> [[TMP2]] to <4 x i32>43; SSE2-NEXT: ret <4 x i32> [[TMP3]]44;45; SLM-LABEL: @loadext_4i8_to_4i32(46; SLM-NEXT: [[TMP2:%.*]] = load <4 x i8>, ptr [[P0:%.*]], align 147; SLM-NEXT: [[TMP3:%.*]] = zext <4 x i8> [[TMP2]] to <4 x i32>48; SLM-NEXT: ret <4 x i32> [[TMP3]]49;50; AVX-LABEL: @loadext_4i8_to_4i32(51; AVX-NEXT: [[TMP2:%.*]] = load <4 x i8>, ptr [[P0:%.*]], align 152; AVX-NEXT: [[TMP3:%.*]] = zext <4 x i8> [[TMP2]] to <4 x i32>53; AVX-NEXT: ret <4 x i32> [[TMP3]]54;55 %p1 = getelementptr inbounds i8, ptr %p0, i64 156 %p2 = getelementptr inbounds i8, ptr %p0, i64 257 %p3 = getelementptr inbounds i8, ptr %p0, i64 358 %i0 = load i8, ptr %p0, align 159 %i1 = load i8, ptr %p1, align 160 %i2 = load i8, ptr %p2, align 161 %i3 = load i8, ptr %p3, align 162 %x0 = zext i8 %i0 to i3263 %x1 = zext i8 %i1 to i3264 %x2 = zext i8 %i2 to i3265 %x3 = zext i8 %i3 to i3266 %v0 = insertelement <4 x i32> undef, i32 %x0, i32 067 %v1 = insertelement <4 x i32> %v0, i32 %x1, i32 168 %v2 = insertelement <4 x i32> %v1, i32 %x2, i32 269 %v3 = insertelement <4 x i32> %v2, i32 %x3, i32 370 ret <4 x i32> %v371}72 73define <4 x i64> @loadext_4i8_to_4i64(ptr %p0) {74; SSE2-LABEL: @loadext_4i8_to_4i64(75; SSE2-NEXT: [[TMP2:%.*]] = load <4 x i8>, ptr [[P0:%.*]], align 176; SSE2-NEXT: [[TMP3:%.*]] = zext <4 x i8> [[TMP2]] to <4 x i64>77; SSE2-NEXT: ret <4 x i64> [[TMP3]]78;79; SLM-LABEL: @loadext_4i8_to_4i64(80; SLM-NEXT: [[TMP2:%.*]] = load <4 x i8>, ptr [[P0:%.*]], align 181; SLM-NEXT: [[TMP3:%.*]] = zext <4 x i8> [[TMP2]] to <4 x i64>82; SLM-NEXT: ret <4 x i64> [[TMP3]]83;84; AVX-LABEL: @loadext_4i8_to_4i64(85; AVX-NEXT: [[TMP2:%.*]] = load <4 x i8>, ptr [[P0:%.*]], align 186; AVX-NEXT: [[TMP3:%.*]] = zext <4 x i8> [[TMP2]] to <4 x i64>87; AVX-NEXT: ret <4 x i64> [[TMP3]]88;89 %p1 = getelementptr inbounds i8, ptr %p0, i64 190 %p2 = getelementptr inbounds i8, ptr %p0, i64 291 %p3 = getelementptr inbounds i8, ptr %p0, i64 392 %i0 = load i8, ptr %p0, align 193 %i1 = load i8, ptr %p1, align 194 %i2 = load i8, ptr %p2, align 195 %i3 = load i8, ptr %p3, align 196 %x0 = zext i8 %i0 to i6497 %x1 = zext i8 %i1 to i6498 %x2 = zext i8 %i2 to i6499 %x3 = zext i8 %i3 to i64100 %v0 = insertelement <4 x i64> undef, i64 %x0, i32 0101 %v1 = insertelement <4 x i64> %v0, i64 %x1, i32 1102 %v2 = insertelement <4 x i64> %v1, i64 %x2, i32 2103 %v3 = insertelement <4 x i64> %v2, i64 %x3, i32 3104 ret <4 x i64> %v3105}106 107define <8 x i16> @loadext_8i8_to_8i16(ptr %p0) {108; SSE2-LABEL: @loadext_8i8_to_8i16(109; SSE2-NEXT: [[TMP2:%.*]] = load <8 x i8>, ptr [[P0:%.*]], align 1110; SSE2-NEXT: [[TMP3:%.*]] = zext <8 x i8> [[TMP2]] to <8 x i16>111; SSE2-NEXT: ret <8 x i16> [[TMP3]]112;113; SLM-LABEL: @loadext_8i8_to_8i16(114; SLM-NEXT: [[TMP2:%.*]] = load <8 x i8>, ptr [[P0:%.*]], align 1115; SLM-NEXT: [[TMP3:%.*]] = zext <8 x i8> [[TMP2]] to <8 x i16>116; SLM-NEXT: ret <8 x i16> [[TMP3]]117;118; AVX-LABEL: @loadext_8i8_to_8i16(119; AVX-NEXT: [[TMP2:%.*]] = load <8 x i8>, ptr [[P0:%.*]], align 1120; AVX-NEXT: [[TMP3:%.*]] = zext <8 x i8> [[TMP2]] to <8 x i16>121; AVX-NEXT: ret <8 x i16> [[TMP3]]122;123 %p1 = getelementptr inbounds i8, ptr %p0, i64 1124 %p2 = getelementptr inbounds i8, ptr %p0, i64 2125 %p3 = getelementptr inbounds i8, ptr %p0, i64 3126 %p4 = getelementptr inbounds i8, ptr %p0, i64 4127 %p5 = getelementptr inbounds i8, ptr %p0, i64 5128 %p6 = getelementptr inbounds i8, ptr %p0, i64 6129 %p7 = getelementptr inbounds i8, ptr %p0, i64 7130 %i0 = load i8, ptr %p0, align 1131 %i1 = load i8, ptr %p1, align 1132 %i2 = load i8, ptr %p2, align 1133 %i3 = load i8, ptr %p3, align 1134 %i4 = load i8, ptr %p4, align 1135 %i5 = load i8, ptr %p5, align 1136 %i6 = load i8, ptr %p6, align 1137 %i7 = load i8, ptr %p7, align 1138 %x0 = zext i8 %i0 to i16139 %x1 = zext i8 %i1 to i16140 %x2 = zext i8 %i2 to i16141 %x3 = zext i8 %i3 to i16142 %x4 = zext i8 %i4 to i16143 %x5 = zext i8 %i5 to i16144 %x6 = zext i8 %i6 to i16145 %x7 = zext i8 %i7 to i16146 %v0 = insertelement <8 x i16> undef, i16 %x0, i32 0147 %v1 = insertelement <8 x i16> %v0, i16 %x1, i32 1148 %v2 = insertelement <8 x i16> %v1, i16 %x2, i32 2149 %v3 = insertelement <8 x i16> %v2, i16 %x3, i32 3150 %v4 = insertelement <8 x i16> %v3, i16 %x4, i32 4151 %v5 = insertelement <8 x i16> %v4, i16 %x5, i32 5152 %v6 = insertelement <8 x i16> %v5, i16 %x6, i32 6153 %v7 = insertelement <8 x i16> %v6, i16 %x7, i32 7154 ret <8 x i16> %v7155}156 157define <8 x i32> @loadext_8i8_to_8i32(ptr %p0) {158; SSE2-LABEL: @loadext_8i8_to_8i32(159; SSE2-NEXT: [[TMP2:%.*]] = load <8 x i8>, ptr [[P0:%.*]], align 1160; SSE2-NEXT: [[TMP3:%.*]] = zext <8 x i8> [[TMP2]] to <8 x i32>161; SSE2-NEXT: ret <8 x i32> [[TMP3]]162;163; SLM-LABEL: @loadext_8i8_to_8i32(164; SLM-NEXT: [[TMP2:%.*]] = load <8 x i8>, ptr [[P0:%.*]], align 1165; SLM-NEXT: [[TMP3:%.*]] = zext <8 x i8> [[TMP2]] to <8 x i32>166; SLM-NEXT: ret <8 x i32> [[TMP3]]167;168; AVX-LABEL: @loadext_8i8_to_8i32(169; AVX-NEXT: [[TMP2:%.*]] = load <8 x i8>, ptr [[P0:%.*]], align 1170; AVX-NEXT: [[TMP3:%.*]] = zext <8 x i8> [[TMP2]] to <8 x i32>171; AVX-NEXT: ret <8 x i32> [[TMP3]]172;173 %p1 = getelementptr inbounds i8, ptr %p0, i64 1174 %p2 = getelementptr inbounds i8, ptr %p0, i64 2175 %p3 = getelementptr inbounds i8, ptr %p0, i64 3176 %p4 = getelementptr inbounds i8, ptr %p0, i64 4177 %p5 = getelementptr inbounds i8, ptr %p0, i64 5178 %p6 = getelementptr inbounds i8, ptr %p0, i64 6179 %p7 = getelementptr inbounds i8, ptr %p0, i64 7180 %i0 = load i8, ptr %p0, align 1181 %i1 = load i8, ptr %p1, align 1182 %i2 = load i8, ptr %p2, align 1183 %i3 = load i8, ptr %p3, align 1184 %i4 = load i8, ptr %p4, align 1185 %i5 = load i8, ptr %p5, align 1186 %i6 = load i8, ptr %p6, align 1187 %i7 = load i8, ptr %p7, align 1188 %x0 = zext i8 %i0 to i32189 %x1 = zext i8 %i1 to i32190 %x2 = zext i8 %i2 to i32191 %x3 = zext i8 %i3 to i32192 %x4 = zext i8 %i4 to i32193 %x5 = zext i8 %i5 to i32194 %x6 = zext i8 %i6 to i32195 %x7 = zext i8 %i7 to i32196 %v0 = insertelement <8 x i32> undef, i32 %x0, i32 0197 %v1 = insertelement <8 x i32> %v0, i32 %x1, i32 1198 %v2 = insertelement <8 x i32> %v1, i32 %x2, i32 2199 %v3 = insertelement <8 x i32> %v2, i32 %x3, i32 3200 %v4 = insertelement <8 x i32> %v3, i32 %x4, i32 4201 %v5 = insertelement <8 x i32> %v4, i32 %x5, i32 5202 %v6 = insertelement <8 x i32> %v5, i32 %x6, i32 6203 %v7 = insertelement <8 x i32> %v6, i32 %x7, i32 7204 ret <8 x i32> %v7205}206 207define <16 x i16> @loadext_16i8_to_16i16(ptr %p0) {208; SSE2-LABEL: @loadext_16i8_to_16i16(209; SSE2-NEXT: [[TMP2:%.*]] = load <16 x i8>, ptr [[P0:%.*]], align 1210; SSE2-NEXT: [[TMP3:%.*]] = zext <16 x i8> [[TMP2]] to <16 x i16>211; SSE2-NEXT: ret <16 x i16> [[TMP3]]212;213; SLM-LABEL: @loadext_16i8_to_16i16(214; SLM-NEXT: [[TMP2:%.*]] = load <16 x i8>, ptr [[P0:%.*]], align 1215; SLM-NEXT: [[TMP3:%.*]] = zext <16 x i8> [[TMP2]] to <16 x i16>216; SLM-NEXT: ret <16 x i16> [[TMP3]]217;218; AVX-LABEL: @loadext_16i8_to_16i16(219; AVX-NEXT: [[TMP2:%.*]] = load <16 x i8>, ptr [[P0:%.*]], align 1220; AVX-NEXT: [[TMP3:%.*]] = zext <16 x i8> [[TMP2]] to <16 x i16>221; AVX-NEXT: ret <16 x i16> [[TMP3]]222;223 %p1 = getelementptr inbounds i8, ptr %p0, i64 1224 %p2 = getelementptr inbounds i8, ptr %p0, i64 2225 %p3 = getelementptr inbounds i8, ptr %p0, i64 3226 %p4 = getelementptr inbounds i8, ptr %p0, i64 4227 %p5 = getelementptr inbounds i8, ptr %p0, i64 5228 %p6 = getelementptr inbounds i8, ptr %p0, i64 6229 %p7 = getelementptr inbounds i8, ptr %p0, i64 7230 %p8 = getelementptr inbounds i8, ptr %p0, i64 8231 %p9 = getelementptr inbounds i8, ptr %p0, i64 9232 %p10 = getelementptr inbounds i8, ptr %p0, i64 10233 %p11 = getelementptr inbounds i8, ptr %p0, i64 11234 %p12 = getelementptr inbounds i8, ptr %p0, i64 12235 %p13 = getelementptr inbounds i8, ptr %p0, i64 13236 %p14 = getelementptr inbounds i8, ptr %p0, i64 14237 %p15 = getelementptr inbounds i8, ptr %p0, i64 15238 %i0 = load i8, ptr %p0, align 1239 %i1 = load i8, ptr %p1, align 1240 %i2 = load i8, ptr %p2, align 1241 %i3 = load i8, ptr %p3, align 1242 %i4 = load i8, ptr %p4, align 1243 %i5 = load i8, ptr %p5, align 1244 %i6 = load i8, ptr %p6, align 1245 %i7 = load i8, ptr %p7, align 1246 %i8 = load i8, ptr %p8, align 1247 %i9 = load i8, ptr %p9, align 1248 %i10 = load i8, ptr %p10, align 1249 %i11 = load i8, ptr %p11, align 1250 %i12 = load i8, ptr %p12, align 1251 %i13 = load i8, ptr %p13, align 1252 %i14 = load i8, ptr %p14, align 1253 %i15 = load i8, ptr %p15, align 1254 %x0 = zext i8 %i0 to i16255 %x1 = zext i8 %i1 to i16256 %x2 = zext i8 %i2 to i16257 %x3 = zext i8 %i3 to i16258 %x4 = zext i8 %i4 to i16259 %x5 = zext i8 %i5 to i16260 %x6 = zext i8 %i6 to i16261 %x7 = zext i8 %i7 to i16262 %x8 = zext i8 %i8 to i16263 %x9 = zext i8 %i9 to i16264 %x10 = zext i8 %i10 to i16265 %x11 = zext i8 %i11 to i16266 %x12 = zext i8 %i12 to i16267 %x13 = zext i8 %i13 to i16268 %x14 = zext i8 %i14 to i16269 %x15 = zext i8 %i15 to i16270 %v0 = insertelement <16 x i16> undef, i16 %x0, i32 0271 %v1 = insertelement <16 x i16> %v0, i16 %x1, i32 1272 %v2 = insertelement <16 x i16> %v1, i16 %x2, i32 2273 %v3 = insertelement <16 x i16> %v2, i16 %x3, i32 3274 %v4 = insertelement <16 x i16> %v3, i16 %x4, i32 4275 %v5 = insertelement <16 x i16> %v4, i16 %x5, i32 5276 %v6 = insertelement <16 x i16> %v5, i16 %x6, i32 6277 %v7 = insertelement <16 x i16> %v6, i16 %x7, i32 7278 %v8 = insertelement <16 x i16> %v7, i16 %x8, i32 8279 %v9 = insertelement <16 x i16> %v8, i16 %x9, i32 9280 %v10 = insertelement <16 x i16> %v9, i16 %x10, i32 10281 %v11 = insertelement <16 x i16> %v10, i16 %x11, i32 11282 %v12 = insertelement <16 x i16> %v11, i16 %x12, i32 12283 %v13 = insertelement <16 x i16> %v12, i16 %x13, i32 13284 %v14 = insertelement <16 x i16> %v13, i16 %x14, i32 14285 %v15 = insertelement <16 x i16> %v14, i16 %x15, i32 15286 ret <16 x i16> %v15287}288 289;290; vXi16291;292 293define <2 x i64> @loadext_2i16_to_2i64(ptr %p0) {294; SSE2-LABEL: @loadext_2i16_to_2i64(295; SSE2-NEXT: [[TMP2:%.*]] = load <2 x i16>, ptr [[P0:%.*]], align 1296; SSE2-NEXT: [[TMP3:%.*]] = zext <2 x i16> [[TMP2]] to <2 x i64>297; SSE2-NEXT: ret <2 x i64> [[TMP3]]298;299; SLM-LABEL: @loadext_2i16_to_2i64(300; SLM-NEXT: [[TMP2:%.*]] = load <2 x i16>, ptr [[P0:%.*]], align 1301; SLM-NEXT: [[TMP3:%.*]] = zext <2 x i16> [[TMP2]] to <2 x i64>302; SLM-NEXT: ret <2 x i64> [[TMP3]]303;304; AVX-LABEL: @loadext_2i16_to_2i64(305; AVX-NEXT: [[TMP2:%.*]] = load <2 x i16>, ptr [[P0:%.*]], align 1306; AVX-NEXT: [[TMP3:%.*]] = zext <2 x i16> [[TMP2]] to <2 x i64>307; AVX-NEXT: ret <2 x i64> [[TMP3]]308;309 %p1 = getelementptr inbounds i16, ptr %p0, i64 1310 %i0 = load i16, ptr %p0, align 1311 %i1 = load i16, ptr %p1, align 1312 %x0 = zext i16 %i0 to i64313 %x1 = zext i16 %i1 to i64314 %v0 = insertelement <2 x i64> undef, i64 %x0, i32 0315 %v1 = insertelement <2 x i64> %v0, i64 %x1, i32 1316 ret <2 x i64> %v1317}318 319define <4 x i32> @loadext_4i16_to_4i32(ptr %p0) {320; SSE2-LABEL: @loadext_4i16_to_4i32(321; SSE2-NEXT: [[TMP2:%.*]] = load <4 x i16>, ptr [[P0:%.*]], align 1322; SSE2-NEXT: [[TMP3:%.*]] = zext <4 x i16> [[TMP2]] to <4 x i32>323; SSE2-NEXT: ret <4 x i32> [[TMP3]]324;325; SLM-LABEL: @loadext_4i16_to_4i32(326; SLM-NEXT: [[TMP2:%.*]] = load <4 x i16>, ptr [[P0:%.*]], align 1327; SLM-NEXT: [[TMP3:%.*]] = zext <4 x i16> [[TMP2]] to <4 x i32>328; SLM-NEXT: ret <4 x i32> [[TMP3]]329;330; AVX-LABEL: @loadext_4i16_to_4i32(331; AVX-NEXT: [[TMP2:%.*]] = load <4 x i16>, ptr [[P0:%.*]], align 1332; AVX-NEXT: [[TMP3:%.*]] = zext <4 x i16> [[TMP2]] to <4 x i32>333; AVX-NEXT: ret <4 x i32> [[TMP3]]334;335 %p1 = getelementptr inbounds i16, ptr %p0, i64 1336 %p2 = getelementptr inbounds i16, ptr %p0, i64 2337 %p3 = getelementptr inbounds i16, ptr %p0, i64 3338 %i0 = load i16, ptr %p0, align 1339 %i1 = load i16, ptr %p1, align 1340 %i2 = load i16, ptr %p2, align 1341 %i3 = load i16, ptr %p3, align 1342 %x0 = zext i16 %i0 to i32343 %x1 = zext i16 %i1 to i32344 %x2 = zext i16 %i2 to i32345 %x3 = zext i16 %i3 to i32346 %v0 = insertelement <4 x i32> undef, i32 %x0, i32 0347 %v1 = insertelement <4 x i32> %v0, i32 %x1, i32 1348 %v2 = insertelement <4 x i32> %v1, i32 %x2, i32 2349 %v3 = insertelement <4 x i32> %v2, i32 %x3, i32 3350 ret <4 x i32> %v3351}352 353define <4 x i64> @loadext_4i16_to_4i64(ptr %p0) {354; SSE2-LABEL: @loadext_4i16_to_4i64(355; SSE2-NEXT: [[TMP2:%.*]] = load <4 x i16>, ptr [[P0:%.*]], align 1356; SSE2-NEXT: [[TMP3:%.*]] = zext <4 x i16> [[TMP2]] to <4 x i64>357; SSE2-NEXT: ret <4 x i64> [[TMP3]]358;359; SLM-LABEL: @loadext_4i16_to_4i64(360; SLM-NEXT: [[TMP2:%.*]] = load <4 x i16>, ptr [[P0:%.*]], align 1361; SLM-NEXT: [[TMP3:%.*]] = zext <4 x i16> [[TMP2]] to <4 x i64>362; SLM-NEXT: ret <4 x i64> [[TMP3]]363;364; AVX-LABEL: @loadext_4i16_to_4i64(365; AVX-NEXT: [[TMP2:%.*]] = load <4 x i16>, ptr [[P0:%.*]], align 1366; AVX-NEXT: [[TMP3:%.*]] = zext <4 x i16> [[TMP2]] to <4 x i64>367; AVX-NEXT: ret <4 x i64> [[TMP3]]368;369 %p1 = getelementptr inbounds i16, ptr %p0, i64 1370 %p2 = getelementptr inbounds i16, ptr %p0, i64 2371 %p3 = getelementptr inbounds i16, ptr %p0, i64 3372 %i0 = load i16, ptr %p0, align 1373 %i1 = load i16, ptr %p1, align 1374 %i2 = load i16, ptr %p2, align 1375 %i3 = load i16, ptr %p3, align 1376 %x0 = zext i16 %i0 to i64377 %x1 = zext i16 %i1 to i64378 %x2 = zext i16 %i2 to i64379 %x3 = zext i16 %i3 to i64380 %v0 = insertelement <4 x i64> undef, i64 %x0, i32 0381 %v1 = insertelement <4 x i64> %v0, i64 %x1, i32 1382 %v2 = insertelement <4 x i64> %v1, i64 %x2, i32 2383 %v3 = insertelement <4 x i64> %v2, i64 %x3, i32 3384 ret <4 x i64> %v3385}386 387define <8 x i32> @loadext_8i16_to_8i32(ptr %p0) {388; SSE2-LABEL: @loadext_8i16_to_8i32(389; SSE2-NEXT: [[TMP2:%.*]] = load <8 x i16>, ptr [[P0:%.*]], align 1390; SSE2-NEXT: [[TMP3:%.*]] = zext <8 x i16> [[TMP2]] to <8 x i32>391; SSE2-NEXT: ret <8 x i32> [[TMP3]]392;393; SLM-LABEL: @loadext_8i16_to_8i32(394; SLM-NEXT: [[TMP2:%.*]] = load <8 x i16>, ptr [[P0:%.*]], align 1395; SLM-NEXT: [[TMP3:%.*]] = zext <8 x i16> [[TMP2]] to <8 x i32>396; SLM-NEXT: ret <8 x i32> [[TMP3]]397;398; AVX-LABEL: @loadext_8i16_to_8i32(399; AVX-NEXT: [[TMP2:%.*]] = load <8 x i16>, ptr [[P0:%.*]], align 1400; AVX-NEXT: [[TMP3:%.*]] = zext <8 x i16> [[TMP2]] to <8 x i32>401; AVX-NEXT: ret <8 x i32> [[TMP3]]402;403 %p1 = getelementptr inbounds i16, ptr %p0, i64 1404 %p2 = getelementptr inbounds i16, ptr %p0, i64 2405 %p3 = getelementptr inbounds i16, ptr %p0, i64 3406 %p4 = getelementptr inbounds i16, ptr %p0, i64 4407 %p5 = getelementptr inbounds i16, ptr %p0, i64 5408 %p6 = getelementptr inbounds i16, ptr %p0, i64 6409 %p7 = getelementptr inbounds i16, ptr %p0, i64 7410 %i0 = load i16, ptr %p0, align 1411 %i1 = load i16, ptr %p1, align 1412 %i2 = load i16, ptr %p2, align 1413 %i3 = load i16, ptr %p3, align 1414 %i4 = load i16, ptr %p4, align 1415 %i5 = load i16, ptr %p5, align 1416 %i6 = load i16, ptr %p6, align 1417 %i7 = load i16, ptr %p7, align 1418 %x0 = zext i16 %i0 to i32419 %x1 = zext i16 %i1 to i32420 %x2 = zext i16 %i2 to i32421 %x3 = zext i16 %i3 to i32422 %x4 = zext i16 %i4 to i32423 %x5 = zext i16 %i5 to i32424 %x6 = zext i16 %i6 to i32425 %x7 = zext i16 %i7 to i32426 %v0 = insertelement <8 x i32> undef, i32 %x0, i32 0427 %v1 = insertelement <8 x i32> %v0, i32 %x1, i32 1428 %v2 = insertelement <8 x i32> %v1, i32 %x2, i32 2429 %v3 = insertelement <8 x i32> %v2, i32 %x3, i32 3430 %v4 = insertelement <8 x i32> %v3, i32 %x4, i32 4431 %v5 = insertelement <8 x i32> %v4, i32 %x5, i32 5432 %v6 = insertelement <8 x i32> %v5, i32 %x6, i32 6433 %v7 = insertelement <8 x i32> %v6, i32 %x7, i32 7434 ret <8 x i32> %v7435}436 437;438; vXi32439;440 441define <2 x i64> @loadext_2i32_to_2i64(ptr %p0) {442; SSE2-LABEL: @loadext_2i32_to_2i64(443; SSE2-NEXT: [[TMP2:%.*]] = load <2 x i32>, ptr [[P0:%.*]], align 1444; SSE2-NEXT: [[TMP3:%.*]] = zext <2 x i32> [[TMP2]] to <2 x i64>445; SSE2-NEXT: ret <2 x i64> [[TMP3]]446;447; SLM-LABEL: @loadext_2i32_to_2i64(448; SLM-NEXT: [[TMP2:%.*]] = load <2 x i32>, ptr [[P0:%.*]], align 1449; SLM-NEXT: [[TMP3:%.*]] = zext <2 x i32> [[TMP2]] to <2 x i64>450; SLM-NEXT: ret <2 x i64> [[TMP3]]451;452; AVX-LABEL: @loadext_2i32_to_2i64(453; AVX-NEXT: [[TMP2:%.*]] = load <2 x i32>, ptr [[P0:%.*]], align 1454; AVX-NEXT: [[TMP3:%.*]] = zext <2 x i32> [[TMP2]] to <2 x i64>455; AVX-NEXT: ret <2 x i64> [[TMP3]]456;457 %p1 = getelementptr inbounds i32, ptr %p0, i64 1458 %i0 = load i32, ptr %p0, align 1459 %i1 = load i32, ptr %p1, align 1460 %x0 = zext i32 %i0 to i64461 %x1 = zext i32 %i1 to i64462 %v0 = insertelement <2 x i64> undef, i64 %x0, i32 0463 %v1 = insertelement <2 x i64> %v0, i64 %x1, i32 1464 ret <2 x i64> %v1465}466 467define <4 x i64> @loadext_4i32_to_4i64(ptr %p0) {468; SSE2-LABEL: @loadext_4i32_to_4i64(469; SSE2-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr [[P0:%.*]], align 1470; SSE2-NEXT: [[TMP3:%.*]] = zext <4 x i32> [[TMP2]] to <4 x i64>471; SSE2-NEXT: ret <4 x i64> [[TMP3]]472;473; SLM-LABEL: @loadext_4i32_to_4i64(474; SLM-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr [[P0:%.*]], align 1475; SLM-NEXT: [[TMP3:%.*]] = zext <4 x i32> [[TMP2]] to <4 x i64>476; SLM-NEXT: ret <4 x i64> [[TMP3]]477;478; AVX-LABEL: @loadext_4i32_to_4i64(479; AVX-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr [[P0:%.*]], align 1480; AVX-NEXT: [[TMP3:%.*]] = zext <4 x i32> [[TMP2]] to <4 x i64>481; AVX-NEXT: ret <4 x i64> [[TMP3]]482;483 %p1 = getelementptr inbounds i32, ptr %p0, i64 1484 %p2 = getelementptr inbounds i32, ptr %p0, i64 2485 %p3 = getelementptr inbounds i32, ptr %p0, i64 3486 %i0 = load i32, ptr %p0, align 1487 %i1 = load i32, ptr %p1, align 1488 %i2 = load i32, ptr %p2, align 1489 %i3 = load i32, ptr %p3, align 1490 %x0 = zext i32 %i0 to i64491 %x1 = zext i32 %i1 to i64492 %x2 = zext i32 %i2 to i64493 %x3 = zext i32 %i3 to i64494 %v0 = insertelement <4 x i64> undef, i64 %x0, i32 0495 %v1 = insertelement <4 x i64> %v0, i64 %x1, i32 1496 %v2 = insertelement <4 x i64> %v1, i64 %x2, i32 2497 %v3 = insertelement <4 x i64> %v2, i64 %x3, i32 3498 ret <4 x i64> %v3499}500