67 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -S --passes=slp-vectorizer < %s | FileCheck %s3 4define i32 @test(i1 %.b, i8 %conv18, i32 %k.promoted61) {5; CHECK-LABEL: define i32 @test(6; CHECK-SAME: i1 [[DOTB:%.*]], i8 [[CONV18:%.*]], i32 [[K_PROMOTED61:%.*]]) {7; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i1> poison, i1 [[DOTB]], i32 08; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x i1> [[TMP1]], <4 x i1> poison, <4 x i32> zeroinitializer9; CHECK-NEXT: [[TMP3:%.*]] = xor <4 x i1> [[TMP2]], splat (i1 true)10; CHECK-NEXT: [[TMP4:%.*]] = zext <4 x i1> [[TMP3]] to <4 x i8>11; CHECK-NEXT: [[TMP5:%.*]] = icmp eq <4 x i8> [[TMP4]], zeroinitializer12; CHECK-NEXT: [[TMP6:%.*]] = zext <4 x i1> [[TMP3]] to <4 x i8>13; CHECK-NEXT: [[TMP7:%.*]] = freeze <4 x i8> [[TMP6]]14; CHECK-NEXT: [[TMP8:%.*]] = insertelement <4 x i8> poison, i8 [[CONV18]], i32 015; CHECK-NEXT: [[TMP9:%.*]] = shufflevector <4 x i8> [[TMP8]], <4 x i8> poison, <4 x i32> zeroinitializer16; CHECK-NEXT: [[TMP10:%.*]] = icmp ugt <4 x i8> [[TMP7]], [[TMP9]]17; CHECK-NEXT: [[TMP11:%.*]] = select <4 x i1> [[TMP10]], <4 x i8> zeroinitializer, <4 x i8> [[TMP7]]18; CHECK-NEXT: [[TMP12:%.*]] = sub nuw <4 x i8> [[TMP9]], [[TMP11]]19; CHECK-NEXT: [[TMP13:%.*]] = select <4 x i1> [[TMP5]], <4 x i8> [[TMP9]], <4 x i8> [[TMP12]]20; CHECK-NEXT: [[TMP14:%.*]] = zext <4 x i8> [[TMP13]] to <4 x i32>21; CHECK-NEXT: [[TMP15:%.*]] = call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> [[TMP14]])22; CHECK-NEXT: [[OP_RDX:%.*]] = or i32 [[TMP15]], [[K_PROMOTED61]]23; CHECK-NEXT: ret i32 [[OP_RDX]]24;25 %not..b79 = xor i1 %.b, true26 %3 = zext i1 %not..b79 to i827 %cmp.i51 = icmp eq i8 %3, 028 %cond.i55 = freeze i8 %329 %.cmp = icmp ugt i8 %cond.i55, %conv1830 %.urem = select i1 %.cmp, i8 0, i8 %cond.i5531 %4 = sub nuw i8 %conv18, %.urem32 %cond.in.i = select i1 %cmp.i51, i8 %conv18, i8 %433 %not..b80 = xor i1 %.b, true34 %5 = zext i1 %not..b80 to i835 %cmp.i51.1 = icmp eq i8 %5, 036 %cond.i55.1 = freeze i8 %537 %.cmp.1 = icmp ugt i8 %cond.i55.1, %conv1838 %.urem.1 = select i1 %.cmp.1, i8 0, i8 %cond.i55.139 %6 = sub nuw i8 %conv18, %.urem.140 %cond.in.i.1 = select i1 %cmp.i51.1, i8 %conv18, i8 %641 %not..b81 = xor i1 %.b, true42 %7 = zext i1 %not..b81 to i843 %cmp.i51.2 = icmp eq i8 %7, 044 %cond.i55.2 = freeze i8 %745 %.cmp.2 = icmp ugt i8 %cond.i55.2, %conv1846 %.urem.2 = select i1 %.cmp.2, i8 0, i8 %cond.i55.247 %8 = sub nuw i8 %conv18, %.urem.248 %cond.in.i.2 = select i1 %cmp.i51.2, i8 %conv18, i8 %849 %not..b = xor i1 %.b, true50 %9 = zext i1 %not..b to i851 %cmp.i51.3 = icmp eq i8 %9, 052 %cond.i55.3 = freeze i8 %953 %.cmp.3 = icmp ugt i8 %cond.i55.3, %conv1854 %.urem.3 = select i1 %.cmp.3, i8 0, i8 %cond.i55.355 %10 = sub nuw i8 %conv18, %.urem.356 %cond.in.i.3 = select i1 %cmp.i51.3, i8 %conv18, i8 %1057 %conv26 = zext nneg i8 %cond.in.i to i3258 %or = or i32 %k.promoted61, %conv2659 %conv26.1 = zext nneg i8 %cond.in.i.1 to i3260 %or.1 = or i32 %or, %conv26.161 %conv26.2 = zext nneg i8 %cond.in.i.2 to i3262 %or.2 = or i32 %or.1, %conv26.263 %conv26.3 = zext nneg i8 %cond.in.i.3 to i3264 %or.3 = or i32 %or.2, %conv26.365 ret i32 %or.366}67