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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 22; RUN: %if x86-registered-target %{ opt < %s -passes=slp-vectorizer -slp-threshold=-10 -mtriple=x86_64-unknown-linux-gnu -S | FileCheck %s %}3; RUN: %if aarch64-registered-target %{ opt < %s -passes=slp-vectorizer -slp-threshold=-10 -mtriple=aarch64-unknown-linux-gnu -S | FileCheck %s %}4 5define void @foo() {6; CHECK-LABEL: define void @foo() {7; CHECK-NEXT: bci_0:8; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr addrspace(1) null, align 89; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> <i32 poison, i32 0>, i32 [[TMP0]], i32 010; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <2 x i32> [[TMP1]], <2 x i32> poison, <2 x i32> zeroinitializer11; CHECK-NEXT: br label [[BCI_252:%.*]]12; CHECK: bci_252:13; CHECK-NEXT: [[TMP3:%.*]] = phi <2 x i32> [ zeroinitializer, [[BCI_0:%.*]] ], [ [[TMP16:%.*]], [[BCI_252_1:%.*]] ]14; CHECK-NEXT: [[TMP4:%.*]] = mul <2 x i32> [[TMP1]], zeroinitializer15; CHECK-NEXT: [[TMP5:%.*]] = or <2 x i32> [[TMP3]], zeroinitializer16; CHECK-NEXT: [[TMP6:%.*]] = or <2 x i32> [[TMP2]], [[TMP4]]17; CHECK-NEXT: [[TMP7:%.*]] = or <2 x i32> [[TMP6]], zeroinitializer18; CHECK-NEXT: [[TMP8:%.*]] = or <2 x i32> [[TMP5]], [[TMP7]]19; CHECK-NEXT: [[TMP9:%.*]] = or <2 x i32> [[TMP8]], zeroinitializer20; CHECK-NEXT: br i1 false, label [[NOT_ZERO70:%.*]], label [[BCI_252_1]]21; CHECK: bci_252.1:22; CHECK-NEXT: [[TMP10:%.*]] = or <2 x i32> [[TMP2]], zeroinitializer23; CHECK-NEXT: [[TMP11:%.*]] = or <2 x i32> [[TMP9]], zeroinitializer24; CHECK-NEXT: [[TMP12:%.*]] = mul <2 x i32> [[TMP10]], zeroinitializer25; CHECK-NEXT: [[TMP13:%.*]] = or <2 x i32> [[TMP2]], [[TMP12]]26; CHECK-NEXT: [[TMP14:%.*]] = or <2 x i32> [[TMP13]], zeroinitializer27; CHECK-NEXT: [[TMP15:%.*]] = or <2 x i32> [[TMP11]], [[TMP14]]28; CHECK-NEXT: [[TMP16]] = or <2 x i32> [[TMP15]], zeroinitializer29; CHECK-NEXT: br label [[BCI_252]]30; CHECK: not_zero70:31; CHECK-NEXT: [[TMP17:%.*]] = phi <2 x i32> [ [[TMP9]], [[BCI_252]] ]32; CHECK-NEXT: ret void33;34bci_0:35 %0 = load i32, ptr addrspace(1) null, align 836 br label %bci_25237 38bci_252:39 %1 = phi i32 [ 0, %bci_0 ], [ %20, %bci_252.1 ]40 %2 = phi i32 [ 0, %bci_0 ], [ %15, %bci_252.1 ]41 %3 = mul i32 %0, 042 %4 = or i32 %0, %343 %5 = or i32 %4, 044 %.neg91.neg = or i32 %2, 045 %.neg446 = or i32 %.neg91.neg, %546 %6 = or i32 %.neg446, 047 %7 = mul i32 0, 048 %8 = or i32 %0, %749 %9 = or i32 %8, 050 %.neg91.1.neg = or i32 %1, 051 %.neg448 = or i32 %.neg91.1.neg, %952 %10 = or i32 %.neg448, 053 br i1 false, label %not_zero70, label %bci_252.154 55bci_252.1:56 %11 = or i32 %0, 057 %12 = mul i32 %11, 058 %13 = or i32 %0, %1259 %14 = or i32 %13, 060 %.neg91.neg.1 = or i32 %6, 061 %.neg446.1 = or i32 %.neg91.neg.1, %1462 %15 = or i32 %.neg446.1, 063 %16 = or i32 %0, 064 %17 = mul i32 %16, 065 %18 = or i32 %0, %1766 %19 = or i32 %18, 067 %.neg91.1.neg.1 = or i32 %10, 068 %.neg448.1 = or i32 %.neg91.1.neg.1, %1969 %20 = or i32 %.neg448.1, 070 br label %bci_25271 72not_zero70:73 %.lcssa546 = phi i32 [ %6, %bci_252 ]74 %.lcssa545 = phi i32 [ %10, %bci_252 ]75 ret void76}77