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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 32; RUN: %if x86-registered-target %{ opt -S --passes=slp-vectorizer -mtriple=x86_64-sie-ps5 < %s | FileCheck %s --check-prefix=X86 %}3; RUN: %if aarch64-registered-target %{ opt -S --passes=slp-vectorizer -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=AARCH64 %}4 5define void @tes() {6; X86-LABEL: define void @tes() {7; X86-NEXT: entry:8; X86-NEXT: [[TMP0:%.*]] = fcmp ole <2 x double> zeroinitializer, zeroinitializer9; X86-NEXT: br label [[TMP1:%.*]]10; X86: 1:11; X86-NEXT: [[TMP2:%.*]] = shufflevector <2 x i1> zeroinitializer, <2 x i1> [[TMP0]], <4 x i32> <i32 0, i32 0, i32 0, i32 2>12; X86-NEXT: [[TMP3:%.*]] = call i1 @llvm.vector.reduce.and.v4i1(<4 x i1> [[TMP2]])13; X86-NEXT: [[OP_RDX:%.*]] = select i1 false, i1 [[TMP3]], i1 false14; X86-NEXT: [[OP_RDX1:%.*]] = select i1 false, i1 [[OP_RDX]], i1 false15; X86-NEXT: br i1 [[OP_RDX1]], label [[TMP4:%.*]], label [[TMP5:%.*]]16; X86: 4:17; X86-NEXT: ret void18; X86: 5:19; X86-NEXT: ret void20;21; AARCH64-LABEL: define void @tes() {22; AARCH64-NEXT: entry:23; AARCH64-NEXT: [[TMP0:%.*]] = extractelement <2 x i1> zeroinitializer, i64 024; AARCH64-NEXT: [[TMP1:%.*]] = extractelement <2 x i1> zeroinitializer, i64 025; AARCH64-NEXT: [[TMP2:%.*]] = fcmp ole <2 x double> zeroinitializer, zeroinitializer26; AARCH64-NEXT: [[TMP3:%.*]] = extractelement <2 x i1> [[TMP2]], i64 027; AARCH64-NEXT: [[TMP4:%.*]] = extractelement <2 x i1> zeroinitializer, i64 028; AARCH64-NEXT: br label [[TMP5:%.*]]29; AARCH64: 5:30; AARCH64-NEXT: [[TMP6:%.*]] = select i1 false, i1 false, i1 false31; AARCH64-NEXT: [[TMP7:%.*]] = select i1 [[TMP6]], i1 [[TMP0]], i1 false32; AARCH64-NEXT: [[TMP8:%.*]] = select i1 [[TMP7]], i1 [[TMP1]], i1 false33; AARCH64-NEXT: [[TMP9:%.*]] = select i1 [[TMP8]], i1 false, i1 false34; AARCH64-NEXT: [[TMP10:%.*]] = select i1 [[TMP9]], i1 [[TMP3]], i1 false35; AARCH64-NEXT: [[TMP11:%.*]] = select i1 [[TMP10]], i1 [[TMP4]], i1 false36; AARCH64-NEXT: br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP13:%.*]]37; AARCH64: 12:38; AARCH64-NEXT: ret void39; AARCH64: 13:40; AARCH64-NEXT: ret void41;42entry:43 %0 = extractelement <2 x i1> zeroinitializer, i64 044 %1 = extractelement <2 x i1> zeroinitializer, i64 045 %2 = fcmp ole <2 x double> zeroinitializer, zeroinitializer46 %3 = extractelement <2 x i1> %2, i64 047 %4 = extractelement <2 x i1> zeroinitializer, i64 048 br label %549 505:51 %6 = select i1 false, i1 false, i1 false52 %7 = select i1 %6, i1 %0, i1 false53 %8 = select i1 %7, i1 %1, i1 false54 %9 = select i1 %8, i1 false, i1 false55 %10 = select i1 %9, i1 %3, i1 false56 %11 = select i1 %10, i1 %4, i1 false57 br i1 %11, label %12, label %1358 5912:60 ret void61 6213:63 ret void64}65