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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=slp-vectorizer -S -mtriple=riscv64-unknown-linux -mattr=+v -slp-threshold=-100 | FileCheck %s --check-prefix=RISCV3; RUN: opt < %s -passes=slp-vectorizer -S -mtriple=x86_64-unknown-linux -slp-threshold=-100 | FileCheck %s4; RUN: opt < %s -passes=slp-vectorizer -S -mtriple=aarch64-unknown-linux -slp-threshold=-100 | FileCheck %s5; REQUIRES: aarch64-registered-target, x86-registered-target, riscv-registered-target6 7define i64 @test(ptr %p) {8; RISCV-LABEL: @test(9; RISCV-NEXT:  entry:10; RISCV-NEXT:    [[ARRAYIDX_4:%.*]] = getelementptr inbounds i64, ptr [[P:%.*]], i64 411; RISCV-NEXT:    [[TMP0:%.*]] = load <4 x i64>, ptr [[P]], align 412; RISCV-NEXT:    [[TMP1:%.*]] = load <2 x i64>, ptr [[ARRAYIDX_4]], align 413; RISCV-NEXT:    [[TMP2:%.*]] = shufflevector <4 x i64> [[TMP0]], <4 x i64> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 0, i32 0>14; RISCV-NEXT:    [[TMP3:%.*]] = shufflevector <8 x i64> [[TMP2]], <8 x i64> [[TMP2]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 poison, i32 poison, i32 6, i32 7>15; RISCV-NEXT:    [[TMP7:%.*]] = shufflevector <2 x i64> [[TMP1]], <2 x i64> poison, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>16; RISCV-NEXT:    [[TMP4:%.*]] = shufflevector <8 x i64> [[TMP3]], <8 x i64> [[TMP7]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 6, i32 7>17; RISCV-NEXT:    [[TMP5:%.*]] = mul <8 x i64> [[TMP4]], splat (i64 42)18; RISCV-NEXT:    [[TMP6:%.*]] = call i64 @llvm.vector.reduce.add.v8i64(<8 x i64> [[TMP5]])19; RISCV-NEXT:    ret i64 [[TMP6]]20;21; CHECK-LABEL: @test(22; CHECK-NEXT:  entry:23; CHECK-NEXT:    [[TMP0:%.*]] = load <6 x i64>, ptr [[P:%.*]], align 424; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <6 x i64> [[TMP0]], <6 x i64> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 0, i32 0>25; CHECK-NEXT:    [[TMP2:%.*]] = mul <8 x i64> [[TMP1]], splat (i64 42)26; CHECK-NEXT:    [[TMP3:%.*]] = call i64 @llvm.vector.reduce.add.v8i64(<8 x i64> [[TMP2]])27; CHECK-NEXT:    ret i64 [[TMP3]]28;29entry:30  %arrayidx.1 = getelementptr inbounds i64, ptr %p, i64 131  %arrayidx.2 = getelementptr inbounds i64, ptr %p, i64 232  %arrayidx.3 = getelementptr inbounds i64, ptr %p, i64 333  %arrayidx.4 = getelementptr inbounds i64, ptr %p, i64 434  %arrayidx.5 = getelementptr inbounds i64, ptr %p, i64 535  %tmp = load i64, ptr %p, align 436  %mul = mul i64 %tmp, 4237  %tmp1 = load i64, ptr %arrayidx.1, align 438  %mul1 = mul i64 %tmp1, 4239  %add = add i64 %mul, %mul140  %tmp2 = load i64, ptr %arrayidx.2, align 441  %mul2 = mul i64 %tmp2, 4242  %add1 = add i64 %add, %mul243  %tmp3 = load i64, ptr %arrayidx.3, align 444  %mul3 = mul i64 %tmp3, 4245  %add2 = add i64 %add1, %mul346  %tmp4 = load i64, ptr %arrayidx.4, align 447  %mul4 = mul i64 %tmp4, 4248  %add3 = add i64 %add2, %mul449  %tmp5 = load i64, ptr %arrayidx.5, align 450  %mul5 = mul i64 %tmp5, 4251  %add4 = add i64 %add3, %mul552  %mul6 = mul i64 %tmp, 4253  %add5 = add i64 %add4, %mul654  %mul7 = mul i64 %tmp, 4255  %add6 = add i64 %add5, %mul756  ret i64 %add657}58