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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: %if x86-registered-target %{ opt -passes=slp-vectorizer -S < %s -mtriple=x86_64 -slp-threshold=-150 | FileCheck %s --check-prefix X86 %}3; RUN: %if aarch64-registered-target %{ opt -passes=slp-vectorizer -S < %s -mtriple=aarch64-unknown-linux-gnu -slp-threshold=-150 | FileCheck %s --check-prefix AARCH64 %}4 5define i1 @test(ptr %arg, ptr %i233, i64 %i241, ptr %i235, ptr %i237, ptr %i227) {6; X86-LABEL: @test(7; X86-NEXT: bb:8; X86-NEXT: [[I226:%.*]] = getelementptr ptr, ptr [[ARG:%.*]], i32 79; X86-NEXT: [[I242:%.*]] = getelementptr double, ptr [[I233:%.*]], i64 [[I241:%.*]]10; X86-NEXT: [[I245:%.*]] = getelementptr double, ptr [[I235:%.*]], i64 [[I241]]11; X86-NEXT: [[I248:%.*]] = getelementptr double, ptr [[I237:%.*]], i64 [[I241]]12; X86-NEXT: [[I250:%.*]] = getelementptr double, ptr [[I227:%.*]], i64 [[I241]]13; X86-NEXT: [[TMP0:%.*]] = load <4 x ptr>, ptr [[I226]], align 814; X86-NEXT: [[TMP1:%.*]] = shufflevector <4 x ptr> [[TMP0]], <4 x ptr> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>15; X86-NEXT: [[TMP2:%.*]] = insertelement <8 x ptr> <ptr poison, ptr null, ptr poison, ptr null, ptr null, ptr null, ptr null, ptr null>, ptr [[I242]], i32 016; X86-NEXT: [[TMP3:%.*]] = insertelement <8 x ptr> [[TMP2]], ptr [[I250]], i32 217; X86-NEXT: [[TMP4:%.*]] = icmp ult <8 x ptr> [[TMP3]], [[TMP1]]18; X86-NEXT: [[TMP5:%.*]] = insertelement <8 x ptr> poison, ptr [[I250]], i32 019; X86-NEXT: [[TMP6:%.*]] = insertelement <8 x ptr> [[TMP5]], ptr [[I242]], i32 120; X86-NEXT: [[TMP7:%.*]] = insertelement <8 x ptr> [[TMP6]], ptr [[I245]], i32 221; X86-NEXT: [[TMP8:%.*]] = insertelement <8 x ptr> [[TMP7]], ptr [[I248]], i32 322; X86-NEXT: [[TMP9:%.*]] = shufflevector <8 x ptr> [[TMP8]], <8 x ptr> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>23; X86-NEXT: [[TMP10:%.*]] = shufflevector <8 x ptr> [[TMP1]], <8 x ptr> <ptr poison, ptr null, ptr poison, ptr null, ptr null, ptr null, ptr null, ptr null>, <8 x i32> <i32 1, i32 9, i32 0, i32 11, i32 12, i32 13, i32 14, i32 15>24; X86-NEXT: [[TMP11:%.*]] = icmp ult <8 x ptr> [[TMP9]], [[TMP10]]25; X86-NEXT: [[TMP12:%.*]] = or <8 x i1> [[TMP4]], [[TMP11]]26; X86-NEXT: [[TMP13:%.*]] = call i1 @llvm.vector.reduce.and.v8i1(<8 x i1> [[TMP12]])27; X86-NEXT: [[OP_RDX:%.*]] = and i1 [[TMP13]], false28; X86-NEXT: ret i1 [[OP_RDX]]29;30; AARCH64-LABEL: @test(31; AARCH64-NEXT: bb:32; AARCH64-NEXT: [[I226:%.*]] = getelementptr ptr, ptr [[ARG:%.*]], i32 733; AARCH64-NEXT: [[I242:%.*]] = getelementptr double, ptr [[I233:%.*]], i64 [[I241:%.*]]34; AARCH64-NEXT: [[I245:%.*]] = getelementptr double, ptr [[I235:%.*]], i64 [[I241]]35; AARCH64-NEXT: [[I248:%.*]] = getelementptr double, ptr [[I237:%.*]], i64 [[I241]]36; AARCH64-NEXT: [[I250:%.*]] = getelementptr double, ptr [[I227:%.*]], i64 [[I241]]37; AARCH64-NEXT: [[TMP0:%.*]] = load <4 x ptr>, ptr [[I226]], align 838; AARCH64-NEXT: [[TMP1:%.*]] = shufflevector <4 x ptr> [[TMP0]], <4 x ptr> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>39; AARCH64-NEXT: [[TMP2:%.*]] = insertelement <8 x ptr> <ptr poison, ptr null, ptr poison, ptr null, ptr null, ptr null, ptr null, ptr null>, ptr [[I242]], i32 040; AARCH64-NEXT: [[TMP3:%.*]] = insertelement <8 x ptr> [[TMP2]], ptr [[I250]], i32 241; AARCH64-NEXT: [[TMP4:%.*]] = icmp ult <8 x ptr> [[TMP3]], [[TMP1]]42; AARCH64-NEXT: [[TMP5:%.*]] = shufflevector <8 x ptr> [[TMP3]], <8 x ptr> poison, <4 x i32> <i32 2, i32 0, i32 poison, i32 poison>43; AARCH64-NEXT: [[TMP6:%.*]] = insertelement <4 x ptr> [[TMP5]], ptr [[I245]], i32 244; AARCH64-NEXT: [[TMP7:%.*]] = insertelement <4 x ptr> [[TMP6]], ptr [[I248]], i32 345; AARCH64-NEXT: [[TMP8:%.*]] = shufflevector <4 x ptr> [[TMP7]], <4 x ptr> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>46; AARCH64-NEXT: [[TMP9:%.*]] = shufflevector <8 x ptr> [[TMP1]], <8 x ptr> <ptr poison, ptr null, ptr poison, ptr null, ptr null, ptr null, ptr null, ptr null>, <8 x i32> <i32 1, i32 9, i32 0, i32 11, i32 12, i32 13, i32 14, i32 15>47; AARCH64-NEXT: [[TMP10:%.*]] = icmp ult <8 x ptr> [[TMP8]], [[TMP9]]48; AARCH64-NEXT: [[TMP11:%.*]] = or <8 x i1> [[TMP4]], [[TMP10]]49; AARCH64-NEXT: [[TMP12:%.*]] = call i1 @llvm.vector.reduce.and.v8i1(<8 x i1> [[TMP11]])50; AARCH64-NEXT: [[OP_RDX:%.*]] = and i1 [[TMP12]], false51; AARCH64-NEXT: ret i1 [[OP_RDX]]52;53bb:54 %i226 = getelementptr ptr, ptr %arg, i32 755 %i2271 = load ptr, ptr %i226, align 856 %i232 = getelementptr ptr, ptr %arg, i32 857 %i2332 = load ptr, ptr %i232, align 858 %i234 = getelementptr ptr, ptr %arg, i32 959 %i2353 = load ptr, ptr %i234, align 860 %i236 = getelementptr ptr, ptr %arg, i32 1061 %i2374 = load ptr, ptr %i236, align 862 %i240 = icmp ult ptr null, %i233263 %i242 = getelementptr double, ptr %i233, i64 %i24164 %i243 = icmp ult ptr %i242, null65 %i245 = getelementptr double, ptr %i235, i64 %i24166 %i247 = icmp ult ptr null, %i237467 %i248 = getelementptr double, ptr %i237, i64 %i24168 %i249 = icmp ult ptr %i248, null69 %i250 = getelementptr double, ptr %i227, i64 %i24170 %i251 = icmp ult ptr %i250, %i233271 %i252 = icmp ult ptr %i242, %i227172 %i253 = icmp ult ptr %i250, %i235373 %i254 = icmp ult ptr %i245, %i227174 %i255 = icmp ult ptr %i250, null75 %i256 = icmp ult ptr null, %i227176 %i257 = icmp ult ptr null, %i235377 %i258 = icmp ult ptr %i245, null78 %i259 = icmp ult ptr %i242, null79 %i260 = icmp ult ptr null, %i233280 %i261 = icmp ult ptr null, %i237481 %i262 = icmp ult ptr %i248, null82 %i263 = or i1 %i240, %i24383 %i265 = and i1 %i263, false84 %i266 = or i1 %i247, %i24985 %i267 = and i1 %i265, %i26686 %i268 = or i1 %i251, %i25287 %i269 = and i1 %i267, %i26888 %i270 = or i1 %i253, %i25489 %i271 = and i1 %i269, %i27090 %i272 = or i1 %i255, %i25691 %i273 = and i1 %i271, %i27292 %i274 = or i1 %i257, %i25893 %i275 = and i1 %i273, %i27494 %i276 = or i1 %i259, %i26095 %i277 = and i1 %i275, %i27696 %i278 = or i1 %i261, %i26297 %i279 = and i1 %i277, %i27898 ret i1 %i27999}100