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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: %if x86-registered-target %{ opt < %s -passes=slp-vectorizer -slp-revec -mtriple=x86_64 -S | FileCheck %s --check-prefixes=CHECK,X86 %}3; RUN: %if aarch64-registered-target %{ opt < %s -passes=slp-vectorizer -slp-revec -mtriple=aarch64-unknown-linux-gnu -S | FileCheck %s --check-prefixes=CHECK,AARCH64 %}4 5define i1 @logical_and_icmp_diff_preds(<4 x i32> %x) {6; CHECK-LABEL: @logical_and_icmp_diff_preds(7; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> <i32 poison, i32 poison, i32 0, i32 poison>, <4 x i32> <i32 1, i32 3, i32 6, i32 0>8; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x i32> [[X]], <4 x i32> <i32 0, i32 0, i32 poison, i32 0>, <4 x i32> <i32 4, i32 5, i32 2, i32 7>9; CHECK-NEXT: [[TMP3:%.*]] = icmp slt <4 x i32> [[TMP1]], [[TMP2]]10; CHECK-NEXT: [[TMP4:%.*]] = icmp ult <4 x i32> [[TMP1]], [[TMP2]]11; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <4 x i1> [[TMP3]], <4 x i1> [[TMP4]], <4 x i32> <i32 0, i32 1, i32 2, i32 7>12; CHECK-NEXT: [[TMP6:%.*]] = freeze <4 x i1> [[TMP5]]13; CHECK-NEXT: [[TMP7:%.*]] = call i1 @llvm.vector.reduce.and.v4i1(<4 x i1> [[TMP6]])14; CHECK-NEXT: ret i1 [[TMP7]]15;16 %x0 = extractelement <4 x i32> %x, i32 017 %x1 = extractelement <4 x i32> %x, i32 118 %x2 = extractelement <4 x i32> %x, i32 219 %x3 = extractelement <4 x i32> %x, i32 320 %c0 = icmp ult i32 %x0, 021 %c1 = icmp slt i32 %x1, 022 %c2 = icmp sgt i32 %x2, 023 %c3 = icmp slt i32 %x3, 024 %s1 = select i1 %c0, i1 %c1, i1 false25 %s2 = select i1 %s1, i1 %c2, i1 false26 %s3 = select i1 %s2, i1 %c3, i1 false27 ret i1 %s328}29 30define i1 @logical_and_icmp_clamp(<4 x i32> %x) {31; X86-LABEL: @logical_and_icmp_clamp(32; X86-NEXT: [[TMP1:%.*]] = icmp slt <4 x i32> [[X:%.*]], splat (i32 42)33; X86-NEXT: [[TMP2:%.*]] = icmp sgt <4 x i32> [[X]], splat (i32 17)34; X86-NEXT: [[TMP3:%.*]] = shufflevector <4 x i1> [[TMP2]], <4 x i1> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>35; X86-NEXT: [[TMP7:%.*]] = shufflevector <4 x i1> [[TMP1]], <4 x i1> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>36; X86-NEXT: [[TMP4:%.*]] = shufflevector <8 x i1> [[TMP3]], <8 x i1> [[TMP7]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>37; X86-NEXT: [[TMP5:%.*]] = freeze <8 x i1> [[TMP4]]38; X86-NEXT: [[TMP6:%.*]] = call i1 @llvm.vector.reduce.and.v8i1(<8 x i1> [[TMP5]])39; X86-NEXT: ret i1 [[TMP6]]40;41; AARCH64-LABEL: @logical_and_icmp_clamp(42; AARCH64-NEXT: [[TMP1:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>43; AARCH64-NEXT: [[TMP2:%.*]] = icmp sgt <8 x i32> [[TMP1]], <i32 17, i32 17, i32 17, i32 17, i32 42, i32 42, i32 42, i32 42>44; AARCH64-NEXT: [[TMP3:%.*]] = icmp slt <8 x i32> [[TMP1]], <i32 17, i32 17, i32 17, i32 17, i32 42, i32 42, i32 42, i32 42>45; AARCH64-NEXT: [[TMP4:%.*]] = shufflevector <8 x i1> [[TMP2]], <8 x i1> [[TMP3]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 12, i32 13, i32 14, i32 15>46; AARCH64-NEXT: [[TMP5:%.*]] = freeze <8 x i1> [[TMP4]]47; AARCH64-NEXT: [[TMP6:%.*]] = call i1 @llvm.vector.reduce.and.v8i1(<8 x i1> [[TMP5]])48; AARCH64-NEXT: ret i1 [[TMP6]]49;50 %x0 = extractelement <4 x i32> %x, i32 051 %x1 = extractelement <4 x i32> %x, i32 152 %x2 = extractelement <4 x i32> %x, i32 253 %x3 = extractelement <4 x i32> %x, i32 354 %c0 = icmp slt i32 %x0, 4255 %c1 = icmp slt i32 %x1, 4256 %c2 = icmp slt i32 %x2, 4257 %c3 = icmp slt i32 %x3, 4258 %d0 = icmp sgt i32 %x0, 1759 %d1 = icmp sgt i32 %x1, 1760 %d2 = icmp sgt i32 %x2, 1761 %d3 = icmp sgt i32 %x3, 1762 %s1 = select i1 %c0, i1 %c1, i1 false63 %s2 = select i1 %s1, i1 %c2, i1 false64 %s3 = select i1 %s2, i1 %c3, i1 false65 %s4 = select i1 %s3, i1 %d0, i1 false66 %s5 = select i1 %s4, i1 %d1, i1 false67 %s6 = select i1 %s5, i1 %d2, i1 false68 %s7 = select i1 %s6, i1 %d3, i1 false69 ret i1 %s770}71