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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: %if x86-registered-target %{ opt -S -o - -passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s %}3; RUN: %if aarch64-registered-target %{ opt -S -o - -passes=slp-vectorizer -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s %}4 5%class.e = type { i32, i32 }6%struct.a = type { i32, i32, i32, i32 }7 8define void @foo(ptr %this, ptr %p, i32 %add7) {9; CHECK-LABEL: @foo(10; CHECK-NEXT: entry:11; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i32> <i32 poison, i32 undef>, i32 [[ADD7:%.*]], i32 012; CHECK-NEXT: [[TMP1:%.*]] = sdiv <2 x i32> [[TMP0]], splat (i32 2)13; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <2 x i32> [[TMP1]], <2 x i32> poison, <4 x i32> <i32 1, i32 0, i32 1, i32 0>14; CHECK-NEXT: switch i32 undef, label [[SW_EPILOG:%.*]] [15; CHECK-NEXT: i32 0, label [[SW_BB:%.*]]16; CHECK-NEXT: i32 2, label [[SW_BB]]17; CHECK-NEXT: ]18; CHECK: sw.bb:19; CHECK-NEXT: [[TMP3:%.*]] = xor <2 x i32> [[TMP1]], splat (i32 -1)20; CHECK-NEXT: [[TMP4:%.*]] = load <2 x i32>, ptr [[THIS:%.*]], align 421; CHECK-NEXT: [[TMP5:%.*]] = add <2 x i32> [[TMP4]], [[TMP3]]22; CHECK-NEXT: br label [[SW_EPILOG]]23; CHECK: sw.epilog:24; CHECK-NEXT: [[TMP6:%.*]] = phi <2 x i32> [ undef, [[ENTRY:%.*]] ], [ [[TMP5]], [[SW_BB]] ]25; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <2 x i32> [[TMP6]], <2 x i32> poison, <4 x i32> <i32 1, i32 0, i32 1, i32 0>26; CHECK-NEXT: [[TMP8:%.*]] = sub <4 x i32> undef, [[TMP2]]27; CHECK-NEXT: [[TMP9:%.*]] = add <4 x i32> [[TMP8]], [[TMP7]]28; CHECK-NEXT: [[TMP10:%.*]] = shufflevector <4 x i32> [[TMP9]], <4 x i32> poison, <4 x i32> <i32 0, i32 2, i32 1, i32 3>29; CHECK-NEXT: store <4 x i32> [[TMP10]], ptr [[P:%.*]], align 430; CHECK-NEXT: ret void31;32entry:33 %c = getelementptr inbounds %struct.a, ptr %p, i64 0, i32 134 %o = getelementptr inbounds %struct.a, ptr %p, i64 0, i32 235 %d = getelementptr inbounds %struct.a, ptr %p, i64 0, i32 336 %h = getelementptr inbounds %class.e, ptr %this, i64 0, i32 137 %div = sdiv i32 undef, 238 %div8 = sdiv i32 %add7, 239 switch i32 undef, label %sw.epilog [40 i32 0, label %sw.bb41 i32 2, label %sw.bb42 ]43 44sw.bb:45 %0 = load i32, ptr %h, align 446 %1 = xor i32 %div, -147 %sub10 = add i32 %0, %148 %2 = load i32, ptr %this, align 449 %3 = xor i32 %div8, -150 %sub13 = add i32 %2, %351 br label %sw.epilog52 53sw.epilog:54 %l.0 = phi i32 [ undef, %entry ], [ %sub10, %sw.bb ]55 %m.0 = phi i32 [ undef, %entry ], [ %sub13, %sw.bb ]56 %add15 = sub i32 undef, %div57 %sub16 = add i32 %add15, %l.058 store i32 %sub16, ptr %p, align 459 %add19 = sub i32 undef, %div60 %sub20 = add i32 %add19, %l.061 store i32 %sub20, ptr %c, align 462 %add23 = sub i32 undef, %div863 %sub24 = add i32 %add23, %m.064 store i32 %sub24, ptr %o, align 465 %add27 = sub i32 undef, %div866 %sub28 = add i32 %add27, %m.067 store i32 %sub28, ptr %d, align 468 ret void69}70