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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: %if x86-registered-target %{ opt -passes=slp-vectorizer -S < %s -mtriple=x86_64-unknown-linux -slp-threshold=-165 | FileCheck %s %}3; RUN: %if aarch64-registered-target %{ opt -passes=slp-vectorizer -S < %s -mtriple=aarch64-unknown-linux -slp-threshold=-165 | FileCheck %s %}4 5define void @test1(i128 %p0, i128 %p1, i128 %p2, i128 %p3, <4 x i128> %vec) {6; CHECK-LABEL: @test1(7; CHECK-NEXT: entry:8; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i128> poison, i128 [[P0:%.*]], i32 09; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i128> [[TMP0]], i128 [[P1:%.*]], i32 110; CHECK-NEXT: [[TMP2:%.*]] = trunc <2 x i128> [[TMP1]] to <2 x i32>11; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <2 x i32> [[TMP2]], <2 x i32> poison, <4 x i32> <i32 0, i32 1, i32 0, i32 1>12; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i128> poison, i128 [[P2:%.*]], i32 013; CHECK-NEXT: [[TMP5:%.*]] = insertelement <2 x i128> [[TMP4]], i128 [[P3:%.*]], i32 114; CHECK-NEXT: [[TMP6:%.*]] = trunc <2 x i128> [[TMP5]] to <2 x i32>15; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <2 x i32> [[TMP6]], <2 x i32> poison, <4 x i32> <i32 0, i32 1, i32 0, i32 1>16; CHECK-NEXT: [[T5:%.*]] = trunc i128 [[P1]] to i3217; CHECK-NEXT: [[TMP8:%.*]] = sdiv <4 x i32> [[TMP3]], [[TMP7]]18; CHECK-NEXT: [[TMP9:%.*]] = trunc <4 x i128> [[VEC:%.*]] to <4 x i32>19; CHECK-NEXT: [[TMP10:%.*]] = trunc <4 x i128> [[VEC]] to <4 x i32>20; CHECK-NEXT: [[TMP11:%.*]] = shufflevector <2 x i32> [[TMP2]], <2 x i32> [[TMP6]], <4 x i32> <i32 poison, i32 0, i32 3, i32 2>21; CHECK-NEXT: [[TMP12:%.*]] = shufflevector <4 x i32> [[TMP10]], <4 x i32> [[TMP11]], <4 x i32> <i32 0, i32 5, i32 6, i32 7>22; CHECK-NEXT: [[TMP13:%.*]] = sdiv <4 x i32> [[TMP8]], [[TMP12]]23; CHECK-NEXT: br label [[BB:%.*]]24; CHECK: bb:25; CHECK-NEXT: [[TMP14:%.*]] = phi <4 x i32> [ [[TMP13]], [[ENTRY:%.*]] ]26; CHECK-NEXT: ret void27;28entry:29 %t1 = trunc i128 %p0 to i3230 %t2 = trunc i128 %p1 to i3231 %t3 = trunc i128 %p2 to i3232 %t4 = trunc i128 %p3 to i3233 %t5 = trunc i128 %p1 to i3234 %t6 = trunc i128 %p0 to i3235 %t7 = trunc i128 %p3 to i3236 %t8 = trunc i128 %p2 to i3237 %m0 = sdiv i32 %t1, %t338 %m1 = sdiv i32 %t2, %t439 %m2 = sdiv i32 %t1, %t340 %m3 = sdiv i32 %t2, %t441 %e0 = extractelement <4 x i128> %vec, i32 042 %t9 = trunc i128 %e0 to i3243 %d0 = sdiv i32 %m0, %t944 %d1 = sdiv i32 %m1, %t645 %d2 = sdiv i32 %m2, %t746 %d3 = sdiv i32 %m3, %t847 br label %bb48 49bb:50 %phi0 = phi i32 [ %d0, %entry ]51 %phi1 = phi i32 [ %d1, %entry ]52 %phi2 = phi i32 [ %d2, %entry ]53 %phi3 = phi i32 [ %d3, %entry ]54 ret void55}56