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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes='sroa<preserve-cfg>' -S | FileCheck %s --check-prefixes=CHECK,CHECK-PRESERVE-CFG3; RUN: opt < %s -passes='sroa<modify-cfg>' -S | FileCheck %s --check-prefixes=CHECK,CHECK-MODIFY-CFG4target datalayout = "e-p:64:64:64-p1:16:16:16-p3:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n8:16:32:64"5 6declare void @llvm.memcpy.p0.p0.i32(ptr nocapture, ptr nocapture readonly, i32, i1)7declare void @llvm.memcpy.p1.p0.i32(ptr addrspace(1) nocapture, ptr nocapture readonly, i32, i1)8declare void @llvm.memcpy.p0.p1.i32(ptr nocapture, ptr addrspace(1) nocapture readonly, i32, i1)9declare void @llvm.memcpy.p1.p1.i32(ptr addrspace(1) nocapture, ptr addrspace(1) nocapture readonly, i32, i1)10 11 12; Make sure an illegal bitcast isn't introduced13define void @test_address_space_1_1(ptr addrspace(1) %a, ptr addrspace(1) %b) {14; CHECK-LABEL: @test_address_space_1_1(15; CHECK-NEXT: [[AA_0_COPYLOAD:%.*]] = load <2 x i64>, ptr addrspace(1) [[A:%.*]], align 216; CHECK-NEXT: store <2 x i64> [[AA_0_COPYLOAD]], ptr addrspace(1) [[B:%.*]], align 217; CHECK-NEXT: ret void18;19 %aa = alloca <2 x i64>, align 1620 call void @llvm.memcpy.p0.p1.i32(ptr align 2 %aa, ptr addrspace(1) align 2 %a, i32 16, i1 false)21 call void @llvm.memcpy.p1.p0.i32(ptr addrspace(1) align 2 %b, ptr align 2 %aa, i32 16, i1 false)22 ret void23}24 25define void @test_address_space_1_0(ptr addrspace(1) %a, ptr %b) {26; CHECK-LABEL: @test_address_space_1_0(27; CHECK-NEXT: [[AA_0_COPYLOAD:%.*]] = load <2 x i64>, ptr addrspace(1) [[A:%.*]], align 228; CHECK-NEXT: store <2 x i64> [[AA_0_COPYLOAD]], ptr [[B:%.*]], align 229; CHECK-NEXT: ret void30;31 %aa = alloca <2 x i64>, align 1632 call void @llvm.memcpy.p0.p1.i32(ptr align 2 %aa, ptr addrspace(1) align 2 %a, i32 16, i1 false)33 call void @llvm.memcpy.p0.p0.i32(ptr align 2 %b, ptr align 2 %aa, i32 16, i1 false)34 ret void35}36 37define void @test_address_space_0_1(ptr %a, ptr addrspace(1) %b) {38; CHECK-LABEL: @test_address_space_0_1(39; CHECK-NEXT: [[AA_0_COPYLOAD:%.*]] = load <2 x i64>, ptr [[A:%.*]], align 240; CHECK-NEXT: store <2 x i64> [[AA_0_COPYLOAD]], ptr addrspace(1) [[B:%.*]], align 241; CHECK-NEXT: ret void42;43 %aa = alloca <2 x i64>, align 1644 call void @llvm.memcpy.p0.p0.i32(ptr align 2 %aa, ptr align 2 %a, i32 16, i1 false)45 call void @llvm.memcpy.p1.p0.i32(ptr addrspace(1) align 2 %b, ptr align 2 %aa, i32 16, i1 false)46 ret void47}48 49%struct.struct_test_27.0.13 = type { i32, float, i64, i8, [4 x i32] }50 51define void @copy_struct([5 x i64] %in.coerce, ptr addrspace(1) align 4 %ptr) {52; CHECK-LABEL: @copy_struct(53; CHECK-NEXT: for.end:54; CHECK-NEXT: [[IN_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [5 x i64] [[IN_COERCE:%.*]], 055; CHECK-NEXT: [[IN_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [5 x i64] [[IN_COERCE]], 156; CHECK-NEXT: [[IN_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [5 x i64] [[IN_COERCE]], 257; CHECK-NEXT: [[IN_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [5 x i64] [[IN_COERCE]], 358; CHECK-NEXT: [[IN_SROA_2_4_EXTRACT_SHIFT:%.*]] = lshr i64 [[IN_COERCE_FCA_2_EXTRACT]], 3259; CHECK-NEXT: [[IN_SROA_2_4_EXTRACT_TRUNC:%.*]] = trunc i64 [[IN_SROA_2_4_EXTRACT_SHIFT]] to i3260; CHECK-NEXT: store i32 [[IN_SROA_2_4_EXTRACT_TRUNC]], ptr addrspace(1) [[PTR:%.*]], align 461; CHECK-NEXT: [[IN_SROA_4_20_PTR_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[PTR]], i16 462; CHECK-NEXT: store i64 [[IN_COERCE_FCA_3_EXTRACT]], ptr addrspace(1) [[IN_SROA_4_20_PTR_SROA_IDX]], align 463; CHECK-NEXT: [[IN_SROA_5_20_PTR_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[PTR]], i16 1264; CHECK-NEXT: store i32 undef, ptr addrspace(1) [[IN_SROA_5_20_PTR_SROA_IDX]], align 465; CHECK-NEXT: ret void66;67for.end:68 %in = alloca %struct.struct_test_27.0.13, align 869 store [5 x i64] %in.coerce, ptr %in, align 870 %scevgep9 = getelementptr %struct.struct_test_27.0.13, ptr %in, i32 0, i32 4, i32 071 call void @llvm.memcpy.p1.p0.i32(ptr addrspace(1) align 4 %ptr, ptr align 4 %scevgep9, i32 16, i1 false)72 ret void73}74 75%union.anon = type { ptr }76 77@g = common global i32 0, align 478@l = common addrspace(3) global i32 0, align 479 80; If pointers from different address spaces have different sizes, make sure an81; illegal bitcast isn't introduced82define void @pr27557() {83; CHECK-LABEL: @pr27557(84; CHECK-NEXT: [[DOTSROA_0:%.*]] = alloca ptr, align 885; CHECK-NEXT: store ptr @g, ptr [[DOTSROA_0]], align 886; CHECK-NEXT: store ptr addrspace(3) @l, ptr [[DOTSROA_0]], align 887; CHECK-NEXT: ret void88;89 %1 = alloca %union.anon, align 890 store ptr @g, ptr %1, align 891 store ptr addrspace(3) @l, ptr %1, align 892 ret void93}94 95@l2 = common addrspace(2) global i32 0, align 496 97; If pointers from different address spaces have the same size, that pointer98; should be promoted through the pair of `ptrtoint`/`inttoptr`.99define ptr @pr27557.alt() {100; CHECK-LABEL: @pr27557.alt(101; CHECK-NEXT: ret ptr inttoptr (i64 ptrtoint (ptr addrspace(2) @l2 to i64) to ptr)102;103 %1 = alloca %union.anon, align 8104 store ptr addrspace(2) @l2, ptr %1, align 8105 %2 = load ptr, ptr %1, align 8106 ret ptr %2107}108 109; Make sure pre-splitting doesn't try to introduce an illegal bitcast110define float @presplit(ptr addrspace(1) %p) {111; CHECK-LABEL: @presplit(112; CHECK-NEXT: entry:113; CHECK-NEXT: [[L1:%.*]] = load i32, ptr addrspace(1) [[P:%.*]], align 4114; CHECK-NEXT: [[P_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[P]], i16 4115; CHECK-NEXT: [[L2:%.*]] = load i32, ptr addrspace(1) [[P_SROA_IDX]], align 4116; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32 [[L1]] to float117; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32 [[L2]] to float118; CHECK-NEXT: [[RET:%.*]] = fadd float [[TMP0]], [[TMP1]]119; CHECK-NEXT: ret float [[RET]]120;121entry:122 %b = alloca i64123 %b.gep2 = getelementptr [2 x float], ptr %b, i32 0, i32 1124 %l = load i64, ptr addrspace(1) %p125 store i64 %l, ptr %b126 %f1 = load float, ptr %b127 %f2 = load float, ptr %b.gep2128 %ret = fadd float %f1, %f2129 ret float %ret130}131 132; Test load from and store to non-zero address space.133define void @test_load_store_diff_addr_space(ptr addrspace(1) %complex1, ptr addrspace(1) %complex2) {134; CHECK-LABEL: @test_load_store_diff_addr_space(135; CHECK-NEXT: [[V13:%.*]] = load i32, ptr addrspace(1) [[COMPLEX1:%.*]], align 4136; CHECK-NEXT: [[COMPLEX1_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[COMPLEX1]], i16 4137; CHECK-NEXT: [[V14:%.*]] = load i32, ptr addrspace(1) [[COMPLEX1_SROA_IDX]], align 4138; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32 [[V13]] to float139; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32 [[V14]] to float140; CHECK-NEXT: [[SUM:%.*]] = fadd float [[TMP1]], [[TMP2]]141; CHECK-NEXT: [[TMP3:%.*]] = bitcast float [[SUM]] to i32142; CHECK-NEXT: [[TMP4:%.*]] = bitcast float [[SUM]] to i32143; CHECK-NEXT: store i32 [[TMP3]], ptr addrspace(1) [[COMPLEX2:%.*]], align 4144; CHECK-NEXT: [[COMPLEX2_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[COMPLEX2]], i16 4145; CHECK-NEXT: store i32 [[TMP4]], ptr addrspace(1) [[COMPLEX2_SROA_IDX]], align 4146; CHECK-NEXT: ret void147;148 %a = alloca i64149 %a.gep2 = getelementptr [2 x float], ptr %a, i32 0, i32 1150 %v1 = load i64, ptr addrspace(1) %complex1151 store i64 %v1, ptr %a152 %f1 = load float, ptr %a153 %f2 = load float, ptr %a.gep2154 %sum = fadd float %f1, %f2155 store float %sum, ptr %a156 store float %sum, ptr %a.gep2157 %v2 = load i64, ptr %a158 store i64 %v2, ptr addrspace(1) %complex2159 ret void160}161;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:162; CHECK-MODIFY-CFG: {{.*}}163; CHECK-PRESERVE-CFG: {{.*}}164