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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes='sroa<preserve-cfg>' -S | FileCheck %s --check-prefixes=CHECK,CHECK-PRESERVE-CFG3; RUN: opt < %s -passes='sroa<modify-cfg>' -S | FileCheck %s --check-prefixes=CHECK,CHECK-MODIFY-CFG4target datalayout = "e-p:64:64:64-p1:16:16:16-p2:32:32-p3:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n8:16:32:64-A2"5 6declare void @llvm.memcpy.p2.p2.i32(ptr addrspace(2) nocapture, ptr addrspace(2) nocapture readonly, i32, i1)7declare void @llvm.memcpy.p1.p2.i32(ptr addrspace(1) nocapture, ptr addrspace(2) nocapture readonly, i32, i1)8declare void @llvm.memcpy.p2.p1.i32(ptr addrspace(2) nocapture, ptr addrspace(1) nocapture readonly, i32, i1)9declare void @llvm.memcpy.p1.p1.i32(ptr addrspace(1) nocapture, ptr addrspace(1) nocapture readonly, i32, i1)10 11 12define void @test_address_space_1_1(ptr addrspace(1) %a, ptr addrspace(1) %b) {13; CHECK-LABEL: @test_address_space_1_1(14; CHECK-NEXT: [[AA_0_COPYLOAD:%.*]] = load <2 x i64>, ptr addrspace(1) [[A:%.*]], align 215; CHECK-NEXT: store <2 x i64> [[AA_0_COPYLOAD]], ptr addrspace(1) [[B:%.*]], align 216; CHECK-NEXT: ret void17;18 %aa = alloca <2 x i64>, align 16, addrspace(2)19 call void @llvm.memcpy.p2.p1.i32(ptr addrspace(2) align 2 %aa, ptr addrspace(1) align 2 %a, i32 16, i1 false)20 call void @llvm.memcpy.p1.p2.i32(ptr addrspace(1) align 2 %b, ptr addrspace(2) align 2 %aa, i32 16, i1 false)21 ret void22}23 24define void @test_address_space_1_0(ptr addrspace(1) %a, ptr addrspace(2) %b) {25; CHECK-LABEL: @test_address_space_1_0(26; CHECK-NEXT: [[AA_0_COPYLOAD:%.*]] = load <2 x i64>, ptr addrspace(1) [[A:%.*]], align 227; CHECK-NEXT: store <2 x i64> [[AA_0_COPYLOAD]], ptr addrspace(2) [[B:%.*]], align 228; CHECK-NEXT: ret void29;30 %aa = alloca <2 x i64>, align 16, addrspace(2)31 call void @llvm.memcpy.p2.p1.i32(ptr addrspace(2) align 2 %aa, ptr addrspace(1) align 2 %a, i32 16, i1 false)32 call void @llvm.memcpy.p2.p2.i32(ptr addrspace(2) align 2 %b, ptr addrspace(2) align 2 %aa, i32 16, i1 false)33 ret void34}35 36define void @test_address_space_0_1(ptr addrspace(2) %a, ptr addrspace(1) %b) {37; CHECK-LABEL: @test_address_space_0_1(38; CHECK-NEXT: [[AA_0_COPYLOAD:%.*]] = load <2 x i64>, ptr addrspace(2) [[A:%.*]], align 239; CHECK-NEXT: store <2 x i64> [[AA_0_COPYLOAD]], ptr addrspace(1) [[B:%.*]], align 240; CHECK-NEXT: ret void41;42 %aa = alloca <2 x i64>, align 16, addrspace(2)43 call void @llvm.memcpy.p2.p2.i32(ptr addrspace(2) align 2 %aa, ptr addrspace(2) align 2 %a, i32 16, i1 false)44 call void @llvm.memcpy.p1.p2.i32(ptr addrspace(1) align 2 %b, ptr addrspace(2) align 2 %aa, i32 16, i1 false)45 ret void46}47 48%struct.struct_test_27.0.13 = type { i32, float, i64, i8, [4 x i32] }49 50define void @copy_struct([5 x i64] %in.coerce, ptr addrspace(1) align 4 %ptr) {51; CHECK-LABEL: @copy_struct(52; CHECK-NEXT: for.end:53; CHECK-NEXT: [[IN_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [5 x i64] [[IN_COERCE:%.*]], 054; CHECK-NEXT: [[IN_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [5 x i64] [[IN_COERCE]], 155; CHECK-NEXT: [[IN_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [5 x i64] [[IN_COERCE]], 256; CHECK-NEXT: [[IN_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [5 x i64] [[IN_COERCE]], 357; CHECK-NEXT: [[IN_SROA_2_4_EXTRACT_SHIFT:%.*]] = lshr i64 [[IN_COERCE_FCA_2_EXTRACT]], 3258; CHECK-NEXT: [[IN_SROA_2_4_EXTRACT_TRUNC:%.*]] = trunc i64 [[IN_SROA_2_4_EXTRACT_SHIFT]] to i3259; CHECK-NEXT: store i32 [[IN_SROA_2_4_EXTRACT_TRUNC]], ptr addrspace(1) [[PTR:%.*]], align 460; CHECK-NEXT: [[IN_SROA_4_20_PTR_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[PTR]], i16 461; CHECK-NEXT: store i64 [[IN_COERCE_FCA_3_EXTRACT]], ptr addrspace(1) [[IN_SROA_4_20_PTR_SROA_IDX]], align 462; CHECK-NEXT: [[IN_SROA_5_20_PTR_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[PTR]], i16 1263; CHECK-NEXT: store i32 undef, ptr addrspace(1) [[IN_SROA_5_20_PTR_SROA_IDX]], align 464; CHECK-NEXT: ret void65;66for.end:67 %in = alloca %struct.struct_test_27.0.13, align 8, addrspace(2)68 store [5 x i64] %in.coerce, ptr addrspace(2) %in, align 869 %scevgep9 = getelementptr %struct.struct_test_27.0.13, ptr addrspace(2) %in, i32 0, i32 4, i32 070 call void @llvm.memcpy.p1.p2.i32(ptr addrspace(1) align 4 %ptr, ptr addrspace(2) align 4 %scevgep9, i32 16, i1 false)71 ret void72}73 74%union.anon = type { ptr }75 76@g = common global i32 0, align 477@l = common addrspace(3) global i32 0, align 478 79; If pointers from different address spaces have different sizes, make sure an80; illegal bitcast isn't introduced81define void @pr27557() {82; CHECK-LABEL: @pr27557(83; CHECK-NEXT: [[DOTSROA_0:%.*]] = alloca ptr, align 8, addrspace(2)84; CHECK-NEXT: store ptr @g, ptr addrspace(2) [[DOTSROA_0]], align 885; CHECK-NEXT: store ptr addrspace(3) @l, ptr addrspace(2) [[DOTSROA_0]], align 886; CHECK-NEXT: ret void87;88 %1 = alloca %union.anon, align 8, addrspace(2)89 store ptr @g, ptr addrspace(2) %1, align 890 store ptr addrspace(3) @l, ptr addrspace(2) %1, align 891 ret void92}93 94@l4 = common addrspace(4) global i32 0, align 495 96; If pointers from different address spaces have the same size, that pointer97; should be promoted through the pair of `ptrtoint`/`inttoptr`.98define ptr @pr27557.alt() {99; CHECK-LABEL: @pr27557.alt(100; CHECK-NEXT: ret ptr inttoptr (i64 ptrtoint (ptr addrspace(4) @l4 to i64) to ptr)101;102 %1 = alloca %union.anon, align 8, addrspace(2)103 store ptr addrspace(4) @l4, ptr addrspace(2) %1, align 8104 %2 = load ptr, ptr addrspace(2) %1, align 8105 ret ptr %2106}107 108; Test load from and store to non-zero address space.109define void @test_load_store_diff_addr_space(ptr addrspace(1) %complex1, ptr addrspace(1) %complex2) {110; CHECK-LABEL: @test_load_store_diff_addr_space(111; CHECK-NEXT: [[V13:%.*]] = load i32, ptr addrspace(1) [[COMPLEX1:%.*]], align 4112; CHECK-NEXT: [[COMPLEX1_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[COMPLEX1]], i16 4113; CHECK-NEXT: [[V14:%.*]] = load i32, ptr addrspace(1) [[COMPLEX1_SROA_IDX]], align 4114; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32 [[V13]] to float115; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32 [[V14]] to float116; CHECK-NEXT: [[SUM:%.*]] = fadd float [[TMP1]], [[TMP2]]117; CHECK-NEXT: [[TMP3:%.*]] = bitcast float [[SUM]] to i32118; CHECK-NEXT: [[TMP4:%.*]] = bitcast float [[SUM]] to i32119; CHECK-NEXT: store i32 [[TMP3]], ptr addrspace(1) [[COMPLEX2:%.*]], align 4120; CHECK-NEXT: [[COMPLEX2_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[COMPLEX2]], i16 4121; CHECK-NEXT: store i32 [[TMP4]], ptr addrspace(1) [[COMPLEX2_SROA_IDX]], align 4122; CHECK-NEXT: ret void123;124 %a0 = alloca [2 x i64], align 8, addrspace(2)125 %a.gep2 = getelementptr [2 x float], ptr addrspace(2) %a0, i32 0, i32 1126 %v1 = load i64, ptr addrspace(1) %complex1127 store i64 %v1, ptr addrspace(2) %a0128 %f1 = load float, ptr addrspace(2) %a0129 %f2 = load float, ptr addrspace(2) %a.gep2130 %sum = fadd float %f1, %f2131 store float %sum, ptr addrspace(2) %a0132 store float %sum, ptr addrspace(2) %a.gep2133 %v2 = load i64, ptr addrspace(2) %a0134 store i64 %v2, ptr addrspace(1) %complex2135 ret void136}137 138define void @addressspace_alloca_lifetime() {139; CHECK-LABEL: @addressspace_alloca_lifetime(140; CHECK-NEXT: ret void141;142 %alloca = alloca i8, align 8, addrspace(2)143 call void @llvm.lifetime.start(ptr addrspace(2) %alloca)144 ret void145}146 147;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:148; CHECK-MODIFY-CFG: {{.*}}149; CHECK-PRESERVE-CFG: {{.*}}150