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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes='sroa<preserve-cfg>' -S | FileCheck %s --check-prefixes=CHECK,CHECK-PRESERVE-CFG3; RUN: opt < %s -passes='sroa<modify-cfg>' -S | FileCheck %s --check-prefixes=CHECK,CHECK-MODIFY-CFG4target datalayout = "e-p:64:64:64-p1:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n8:16:32:64"5 6declare void @llvm.memcpy.p0.p0.i32(ptr nocapture, ptr nocapture, i32, i1) nounwind7 8; Check that the chosen type for a split is independent from the order of9; slices even in case of types that are skipped because their width is not a10; byte width multiple11define void @skipped_inttype_first(ptr) {12; CHECK-LABEL: @skipped_inttype_first(13; CHECK-NEXT: [[ARG_SROA_0:%.*]] = alloca ptr, align 814; CHECK-NEXT: [[ARG_SROA_0_0_COPYLOAD:%.*]] = load ptr, ptr [[TMP0:%.*]], align 815; CHECK-NEXT: store ptr [[ARG_SROA_0_0_COPYLOAD]], ptr [[ARG_SROA_0]], align 816; CHECK-NEXT: [[ARG_SROA_3_0__SROA_IDX:%.*]] = getelementptr inbounds i8, ptr [[TMP0]], i64 817; CHECK-NEXT: [[ARG_SROA_3_0_COPYLOAD:%.*]] = load i64, ptr [[ARG_SROA_3_0__SROA_IDX]], align 818; CHECK-NEXT: [[ARG_SROA_0_0_ARG_SROA_0_0_B0:%.*]] = load i63, ptr [[ARG_SROA_0]], align 819; CHECK-NEXT: [[ARG_SROA_0_0_ARG_SROA_0_0_B1:%.*]] = load ptr, ptr [[ARG_SROA_0]], align 820; CHECK-NEXT: ret void21;22 %arg = alloca { ptr, i32 }, align 823 call void @llvm.memcpy.p0.p0.i32(ptr align 8 %arg, ptr align 8 %0, i32 16, i1 false)24 %b = getelementptr inbounds { ptr, i32 }, ptr %arg, i64 0, i32 025 %b0 = load i63, ptr %b26 %b1 = load ptr, ptr %b27 ret void28}29 30define void @skipped_inttype_last(ptr) {31; CHECK-LABEL: @skipped_inttype_last(32; CHECK-NEXT: [[ARG_SROA_0:%.*]] = alloca ptr, align 833; CHECK-NEXT: [[ARG_SROA_0_0_COPYLOAD:%.*]] = load ptr, ptr [[TMP0:%.*]], align 834; CHECK-NEXT: store ptr [[ARG_SROA_0_0_COPYLOAD]], ptr [[ARG_SROA_0]], align 835; CHECK-NEXT: [[ARG_SROA_3_0__SROA_IDX:%.*]] = getelementptr inbounds i8, ptr [[TMP0]], i64 836; CHECK-NEXT: [[ARG_SROA_3_0_COPYLOAD:%.*]] = load i64, ptr [[ARG_SROA_3_0__SROA_IDX]], align 837; CHECK-NEXT: [[ARG_SROA_0_0_ARG_SROA_0_0_B1:%.*]] = load ptr, ptr [[ARG_SROA_0]], align 838; CHECK-NEXT: [[ARG_SROA_0_0_ARG_SROA_0_0_B0:%.*]] = load i63, ptr [[ARG_SROA_0]], align 839; CHECK-NEXT: ret void40;41 %arg = alloca { ptr, i32 }, align 842 call void @llvm.memcpy.p0.p0.i32(ptr align 8 %arg, ptr align 8 %0, i32 16, i1 false)43 %b = getelementptr inbounds { ptr, i32 }, ptr %arg, i64 0, i32 044 %b1 = load ptr, ptr %b45 %b0 = load i63, ptr %b46 ret void47}48;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:49; CHECK-MODIFY-CFG: {{.*}}50; CHECK-PRESERVE-CFG: {{.*}}51