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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes='sroa<preserve-cfg>' -data-layout="e-n8:16:32:64" -S %s | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-SCALAR,CHECK-SCALAR-64,CHECK-LE-643; RUN: opt -passes='sroa<modify-cfg>' -data-layout="e-n8:16:32:64" -S %s | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-SCALAR,CHECK-SCALAR-64,CHECK-LE-644; RUN: opt -passes='sroa<preserve-cfg>' -data-layout="e-n8:16:32" -S %s | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-SCALAR,CHECK-SCALAR-32,CHECK-LE-325; RUN: opt -passes='sroa<modify-cfg>' -data-layout="e-n8:16:32" -S %s | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-SCALAR,CHECK-SCALAR-32,CHECK-LE-326; RUN: opt -passes='sroa<preserve-cfg>' -data-layout="E-n8:16:32:64" -S %s | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-SCALAR,CHECK-SCALAR-64,CHECK-BE-647; RUN: opt -passes='sroa<modify-cfg>' -data-layout="E-n8:16:32:64" -S %s | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-SCALAR,CHECK-SCALAR-64,CHECK-BE-648; RUN: opt -passes='sroa<preserve-cfg>' -data-layout="E-n8:16:32" -S %s | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-SCALAR,CHECK-SCALAR-32,CHECK-BE-329; RUN: opt -passes='sroa<modify-cfg>' -data-layout="E-n8:16:32" -S %s | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-SCALAR,CHECK-SCALAR-32,CHECK-BE-3210 11define void @load_1byte_chunk_of_2byte_alloca_with_zero_upper_half(ptr %src, i64 %byteOff, ptr %dst) nounwind {12; CHECK-ALL-LABEL: @load_1byte_chunk_of_2byte_alloca_with_zero_upper_half(13; CHECK-ALL-NEXT: [[INTERMEDIATE:%.*]] = alloca [2 x i8], align 6414; CHECK-ALL-NEXT: store <2 x i8> zeroinitializer, ptr [[INTERMEDIATE]], align 6415; CHECK-ALL-NEXT: [[INIT:%.*]] = load <1 x i8>, ptr [[SRC:%.*]], align 116; CHECK-ALL-NEXT: store <1 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 6417; CHECK-ALL-NEXT: [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]18; CHECK-ALL-NEXT: [[CHUNK:%.*]] = load <1 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 119; CHECK-ALL-NEXT: store <1 x i8> [[CHUNK]], ptr [[DST:%.*]], align 120; CHECK-ALL-NEXT: ret void21;22 %intermediate = alloca [2 x i8], align 6423 store <2 x i8> zeroinitializer, ptr %intermediate, align 6424 %init = load <1 x i8>, ptr %src, align 125 store <1 x i8> %init, ptr %intermediate, align 6426 %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff27 %chunk = load <1 x i8>, ptr %intermediate.off.addr, align 128 store <1 x i8> %chunk, ptr %dst29 ret void30}31 32define void @load_1byte_chunk_of_4byte_alloca_with_zero_upper_half(ptr %src, i64 %byteOff, ptr %dst) nounwind {33; CHECK-ALL-LABEL: @load_1byte_chunk_of_4byte_alloca_with_zero_upper_half(34; CHECK-ALL-NEXT: [[INTERMEDIATE:%.*]] = alloca [4 x i8], align 6435; CHECK-ALL-NEXT: store <4 x i8> zeroinitializer, ptr [[INTERMEDIATE]], align 6436; CHECK-ALL-NEXT: [[INIT:%.*]] = load <2 x i8>, ptr [[SRC:%.*]], align 137; CHECK-ALL-NEXT: store <2 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 6438; CHECK-ALL-NEXT: [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]39; CHECK-ALL-NEXT: [[CHUNK:%.*]] = load <1 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 140; CHECK-ALL-NEXT: store <1 x i8> [[CHUNK]], ptr [[DST:%.*]], align 141; CHECK-ALL-NEXT: ret void42;43 %intermediate = alloca [4 x i8], align 6444 store <4 x i8> zeroinitializer, ptr %intermediate, align 6445 %init = load <2 x i8>, ptr %src, align 146 store <2 x i8> %init, ptr %intermediate, align 6447 %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff48 %chunk = load <1 x i8>, ptr %intermediate.off.addr, align 149 store <1 x i8> %chunk, ptr %dst50 ret void51}52 53define void @load_2byte_chunk_of_4byte_alloca_with_zero_upper_half(ptr %src, i64 %byteOff, ptr %dst) nounwind {54; CHECK-ALL-LABEL: @load_2byte_chunk_of_4byte_alloca_with_zero_upper_half(55; CHECK-ALL-NEXT: [[INTERMEDIATE:%.*]] = alloca [4 x i8], align 6456; CHECK-ALL-NEXT: store <4 x i8> zeroinitializer, ptr [[INTERMEDIATE]], align 6457; CHECK-ALL-NEXT: [[INIT:%.*]] = load <2 x i8>, ptr [[SRC:%.*]], align 158; CHECK-ALL-NEXT: store <2 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 6459; CHECK-ALL-NEXT: [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]60; CHECK-ALL-NEXT: [[CHUNK:%.*]] = load <2 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 161; CHECK-ALL-NEXT: store <2 x i8> [[CHUNK]], ptr [[DST:%.*]], align 262; CHECK-ALL-NEXT: ret void63;64 %intermediate = alloca [4 x i8], align 6465 store <4 x i8> zeroinitializer, ptr %intermediate, align 6466 %init = load <2 x i8>, ptr %src, align 167 store <2 x i8> %init, ptr %intermediate, align 6468 %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff69 %chunk = load <2 x i8>, ptr %intermediate.off.addr, align 170 store <2 x i8> %chunk, ptr %dst71 ret void72}73 74define void @load_1byte_chunk_of_8byte_alloca_with_zero_upper_half(ptr %src, i64 %byteOff, ptr %dst) nounwind {75; CHECK-ALL-LABEL: @load_1byte_chunk_of_8byte_alloca_with_zero_upper_half(76; CHECK-ALL-NEXT: [[INTERMEDIATE:%.*]] = alloca [8 x i8], align 6477; CHECK-ALL-NEXT: store <8 x i8> zeroinitializer, ptr [[INTERMEDIATE]], align 6478; CHECK-ALL-NEXT: [[INIT:%.*]] = load <4 x i8>, ptr [[SRC:%.*]], align 179; CHECK-ALL-NEXT: store <4 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 6480; CHECK-ALL-NEXT: [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]81; CHECK-ALL-NEXT: [[CHUNK:%.*]] = load <1 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 182; CHECK-ALL-NEXT: store <1 x i8> [[CHUNK]], ptr [[DST:%.*]], align 183; CHECK-ALL-NEXT: ret void84;85 %intermediate = alloca [8 x i8], align 6486 store <8 x i8> zeroinitializer, ptr %intermediate, align 6487 %init = load <4 x i8>, ptr %src, align 188 store <4 x i8> %init, ptr %intermediate, align 6489 %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff90 %chunk = load <1 x i8>, ptr %intermediate.off.addr, align 191 store <1 x i8> %chunk, ptr %dst92 ret void93}94 95define void @load_2byte_chunk_of_8byte_alloca_with_zero_upper_half(ptr %src, i64 %byteOff, ptr %dst) nounwind {96; CHECK-ALL-LABEL: @load_2byte_chunk_of_8byte_alloca_with_zero_upper_half(97; CHECK-ALL-NEXT: [[INTERMEDIATE:%.*]] = alloca [8 x i8], align 6498; CHECK-ALL-NEXT: store <8 x i8> zeroinitializer, ptr [[INTERMEDIATE]], align 6499; CHECK-ALL-NEXT: [[INIT:%.*]] = load <4 x i8>, ptr [[SRC:%.*]], align 1100; CHECK-ALL-NEXT: store <4 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64101; CHECK-ALL-NEXT: [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]102; CHECK-ALL-NEXT: [[CHUNK:%.*]] = load <2 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1103; CHECK-ALL-NEXT: store <2 x i8> [[CHUNK]], ptr [[DST:%.*]], align 2104; CHECK-ALL-NEXT: ret void105;106 %intermediate = alloca [8 x i8], align 64107 store <8 x i8> zeroinitializer, ptr %intermediate, align 64108 %init = load <4 x i8>, ptr %src, align 1109 store <4 x i8> %init, ptr %intermediate, align 64110 %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff111 %chunk = load <2 x i8>, ptr %intermediate.off.addr, align 1112 store <2 x i8> %chunk, ptr %dst113 ret void114}115 116define void @load_4byte_chunk_of_8byte_alloca_with_zero_upper_half(ptr %src, i64 %byteOff, ptr %dst) nounwind {117; CHECK-ALL-LABEL: @load_4byte_chunk_of_8byte_alloca_with_zero_upper_half(118; CHECK-ALL-NEXT: [[INTERMEDIATE:%.*]] = alloca [8 x i8], align 64119; CHECK-ALL-NEXT: store <8 x i8> zeroinitializer, ptr [[INTERMEDIATE]], align 64120; CHECK-ALL-NEXT: [[INIT:%.*]] = load <4 x i8>, ptr [[SRC:%.*]], align 1121; CHECK-ALL-NEXT: store <4 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64122; CHECK-ALL-NEXT: [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]123; CHECK-ALL-NEXT: [[CHUNK:%.*]] = load <4 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1124; CHECK-ALL-NEXT: store <4 x i8> [[CHUNK]], ptr [[DST:%.*]], align 4125; CHECK-ALL-NEXT: ret void126;127 %intermediate = alloca [8 x i8], align 64128 store <8 x i8> zeroinitializer, ptr %intermediate, align 64129 %init = load <4 x i8>, ptr %src, align 1130 store <4 x i8> %init, ptr %intermediate, align 64131 %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff132 %chunk = load <4 x i8>, ptr %intermediate.off.addr, align 1133 store <4 x i8> %chunk, ptr %dst134 ret void135}136 137define void @load_1byte_chunk_of_16byte_alloca_with_zero_upper_half(ptr %src, i64 %byteOff, ptr %dst) nounwind {138; CHECK-ALL-LABEL: @load_1byte_chunk_of_16byte_alloca_with_zero_upper_half(139; CHECK-ALL-NEXT: [[INTERMEDIATE:%.*]] = alloca [16 x i8], align 64140; CHECK-ALL-NEXT: store <16 x i8> zeroinitializer, ptr [[INTERMEDIATE]], align 64141; CHECK-ALL-NEXT: [[INIT:%.*]] = load <8 x i8>, ptr [[SRC:%.*]], align 1142; CHECK-ALL-NEXT: store <8 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64143; CHECK-ALL-NEXT: [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]144; CHECK-ALL-NEXT: [[CHUNK:%.*]] = load <1 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1145; CHECK-ALL-NEXT: store <1 x i8> [[CHUNK]], ptr [[DST:%.*]], align 1146; CHECK-ALL-NEXT: ret void147;148 %intermediate = alloca [16 x i8], align 64149 store <16 x i8> zeroinitializer, ptr %intermediate, align 64150 %init = load <8 x i8>, ptr %src, align 1151 store <8 x i8> %init, ptr %intermediate, align 64152 %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff153 %chunk = load <1 x i8>, ptr %intermediate.off.addr, align 1154 store <1 x i8> %chunk, ptr %dst155 ret void156}157 158define void @load_2byte_chunk_of_16byte_alloca_with_zero_upper_half(ptr %src, i64 %byteOff, ptr %dst) nounwind {159; CHECK-ALL-LABEL: @load_2byte_chunk_of_16byte_alloca_with_zero_upper_half(160; CHECK-ALL-NEXT: [[INTERMEDIATE:%.*]] = alloca [16 x i8], align 64161; CHECK-ALL-NEXT: store <16 x i8> zeroinitializer, ptr [[INTERMEDIATE]], align 64162; CHECK-ALL-NEXT: [[INIT:%.*]] = load <8 x i8>, ptr [[SRC:%.*]], align 1163; CHECK-ALL-NEXT: store <8 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64164; CHECK-ALL-NEXT: [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]165; CHECK-ALL-NEXT: [[CHUNK:%.*]] = load <2 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1166; CHECK-ALL-NEXT: store <2 x i8> [[CHUNK]], ptr [[DST:%.*]], align 2167; CHECK-ALL-NEXT: ret void168;169 %intermediate = alloca [16 x i8], align 64170 store <16 x i8> zeroinitializer, ptr %intermediate, align 64171 %init = load <8 x i8>, ptr %src, align 1172 store <8 x i8> %init, ptr %intermediate, align 64173 %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff174 %chunk = load <2 x i8>, ptr %intermediate.off.addr, align 1175 store <2 x i8> %chunk, ptr %dst176 ret void177}178 179define void @load_4byte_chunk_of_16byte_alloca_with_zero_upper_half(ptr %src, i64 %byteOff, ptr %dst) nounwind {180; CHECK-ALL-LABEL: @load_4byte_chunk_of_16byte_alloca_with_zero_upper_half(181; CHECK-ALL-NEXT: [[INTERMEDIATE:%.*]] = alloca [16 x i8], align 64182; CHECK-ALL-NEXT: store <16 x i8> zeroinitializer, ptr [[INTERMEDIATE]], align 64183; CHECK-ALL-NEXT: [[INIT:%.*]] = load <8 x i8>, ptr [[SRC:%.*]], align 1184; CHECK-ALL-NEXT: store <8 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64185; CHECK-ALL-NEXT: [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]186; CHECK-ALL-NEXT: [[CHUNK:%.*]] = load <4 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1187; CHECK-ALL-NEXT: store <4 x i8> [[CHUNK]], ptr [[DST:%.*]], align 4188; CHECK-ALL-NEXT: ret void189;190 %intermediate = alloca [16 x i8], align 64191 store <16 x i8> zeroinitializer, ptr %intermediate, align 64192 %init = load <8 x i8>, ptr %src, align 1193 store <8 x i8> %init, ptr %intermediate, align 64194 %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff195 %chunk = load <4 x i8>, ptr %intermediate.off.addr, align 1196 store <4 x i8> %chunk, ptr %dst197 ret void198}199 200define void @load_8byte_chunk_of_16byte_alloca_with_zero_upper_half(ptr %src, i64 %byteOff, ptr %dst) nounwind {201; CHECK-ALL-LABEL: @load_8byte_chunk_of_16byte_alloca_with_zero_upper_half(202; CHECK-ALL-NEXT: [[INTERMEDIATE:%.*]] = alloca [16 x i8], align 64203; CHECK-ALL-NEXT: store <16 x i8> zeroinitializer, ptr [[INTERMEDIATE]], align 64204; CHECK-ALL-NEXT: [[INIT:%.*]] = load <8 x i8>, ptr [[SRC:%.*]], align 1205; CHECK-ALL-NEXT: store <8 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64206; CHECK-ALL-NEXT: [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]207; CHECK-ALL-NEXT: [[CHUNK:%.*]] = load <8 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1208; CHECK-ALL-NEXT: store <8 x i8> [[CHUNK]], ptr [[DST:%.*]], align 8209; CHECK-ALL-NEXT: ret void210;211 %intermediate = alloca [16 x i8], align 64212 store <16 x i8> zeroinitializer, ptr %intermediate, align 64213 %init = load <8 x i8>, ptr %src, align 1214 store <8 x i8> %init, ptr %intermediate, align 64215 %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff216 %chunk = load <8 x i8>, ptr %intermediate.off.addr, align 1217 store <8 x i8> %chunk, ptr %dst218 ret void219}220 221define void @load_1byte_chunk_of_32byte_alloca_with_zero_upper_half(ptr %src, i64 %byteOff, ptr %dst) nounwind {222; CHECK-ALL-LABEL: @load_1byte_chunk_of_32byte_alloca_with_zero_upper_half(223; CHECK-ALL-NEXT: [[INTERMEDIATE:%.*]] = alloca [32 x i8], align 64224; CHECK-ALL-NEXT: store <32 x i8> zeroinitializer, ptr [[INTERMEDIATE]], align 64225; CHECK-ALL-NEXT: [[INIT:%.*]] = load <16 x i8>, ptr [[SRC:%.*]], align 1226; CHECK-ALL-NEXT: store <16 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64227; CHECK-ALL-NEXT: [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]228; CHECK-ALL-NEXT: [[CHUNK:%.*]] = load <1 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1229; CHECK-ALL-NEXT: store <1 x i8> [[CHUNK]], ptr [[DST:%.*]], align 1230; CHECK-ALL-NEXT: ret void231;232 %intermediate = alloca [32 x i8], align 64233 store <32 x i8> zeroinitializer, ptr %intermediate, align 64234 %init = load <16 x i8>, ptr %src, align 1235 store <16 x i8> %init, ptr %intermediate, align 64236 %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff237 %chunk = load <1 x i8>, ptr %intermediate.off.addr, align 1238 store <1 x i8> %chunk, ptr %dst239 ret void240}241 242define void @load_2byte_chunk_of_32byte_alloca_with_zero_upper_half(ptr %src, i64 %byteOff, ptr %dst) nounwind {243; CHECK-ALL-LABEL: @load_2byte_chunk_of_32byte_alloca_with_zero_upper_half(244; CHECK-ALL-NEXT: [[INTERMEDIATE:%.*]] = alloca [32 x i8], align 64245; CHECK-ALL-NEXT: store <32 x i8> zeroinitializer, ptr [[INTERMEDIATE]], align 64246; CHECK-ALL-NEXT: [[INIT:%.*]] = load <16 x i8>, ptr [[SRC:%.*]], align 1247; CHECK-ALL-NEXT: store <16 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64248; CHECK-ALL-NEXT: [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]249; CHECK-ALL-NEXT: [[CHUNK:%.*]] = load <2 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1250; CHECK-ALL-NEXT: store <2 x i8> [[CHUNK]], ptr [[DST:%.*]], align 2251; CHECK-ALL-NEXT: ret void252;253 %intermediate = alloca [32 x i8], align 64254 store <32 x i8> zeroinitializer, ptr %intermediate, align 64255 %init = load <16 x i8>, ptr %src, align 1256 store <16 x i8> %init, ptr %intermediate, align 64257 %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff258 %chunk = load <2 x i8>, ptr %intermediate.off.addr, align 1259 store <2 x i8> %chunk, ptr %dst260 ret void261}262 263define void @load_4byte_chunk_of_32byte_alloca_with_zero_upper_half(ptr %src, i64 %byteOff, ptr %dst) nounwind {264; CHECK-ALL-LABEL: @load_4byte_chunk_of_32byte_alloca_with_zero_upper_half(265; CHECK-ALL-NEXT: [[INTERMEDIATE:%.*]] = alloca [32 x i8], align 64266; CHECK-ALL-NEXT: store <32 x i8> zeroinitializer, ptr [[INTERMEDIATE]], align 64267; CHECK-ALL-NEXT: [[INIT:%.*]] = load <16 x i8>, ptr [[SRC:%.*]], align 1268; CHECK-ALL-NEXT: store <16 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64269; CHECK-ALL-NEXT: [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]270; CHECK-ALL-NEXT: [[CHUNK:%.*]] = load <4 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1271; CHECK-ALL-NEXT: store <4 x i8> [[CHUNK]], ptr [[DST:%.*]], align 4272; CHECK-ALL-NEXT: ret void273;274 %intermediate = alloca [32 x i8], align 64275 store <32 x i8> zeroinitializer, ptr %intermediate, align 64276 %init = load <16 x i8>, ptr %src, align 1277 store <16 x i8> %init, ptr %intermediate, align 64278 %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff279 %chunk = load <4 x i8>, ptr %intermediate.off.addr, align 1280 store <4 x i8> %chunk, ptr %dst281 ret void282}283 284define void @load_8byte_chunk_of_32byte_alloca_with_zero_upper_half(ptr %src, i64 %byteOff, ptr %dst) nounwind {285; CHECK-ALL-LABEL: @load_8byte_chunk_of_32byte_alloca_with_zero_upper_half(286; CHECK-ALL-NEXT: [[INTERMEDIATE:%.*]] = alloca [32 x i8], align 64287; CHECK-ALL-NEXT: store <32 x i8> zeroinitializer, ptr [[INTERMEDIATE]], align 64288; CHECK-ALL-NEXT: [[INIT:%.*]] = load <16 x i8>, ptr [[SRC:%.*]], align 1289; CHECK-ALL-NEXT: store <16 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64290; CHECK-ALL-NEXT: [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]291; CHECK-ALL-NEXT: [[CHUNK:%.*]] = load <8 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1292; CHECK-ALL-NEXT: store <8 x i8> [[CHUNK]], ptr [[DST:%.*]], align 8293; CHECK-ALL-NEXT: ret void294;295 %intermediate = alloca [32 x i8], align 64296 store <32 x i8> zeroinitializer, ptr %intermediate, align 64297 %init = load <16 x i8>, ptr %src, align 1298 store <16 x i8> %init, ptr %intermediate, align 64299 %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff300 %chunk = load <8 x i8>, ptr %intermediate.off.addr, align 1301 store <8 x i8> %chunk, ptr %dst302 ret void303}304 305define void @load_16byte_chunk_of_32byte_alloca_with_zero_upper_half(ptr %src, i64 %byteOff, ptr %dst) nounwind {306; CHECK-ALL-LABEL: @load_16byte_chunk_of_32byte_alloca_with_zero_upper_half(307; CHECK-ALL-NEXT: [[INTERMEDIATE:%.*]] = alloca [32 x i8], align 64308; CHECK-ALL-NEXT: store <32 x i8> zeroinitializer, ptr [[INTERMEDIATE]], align 64309; CHECK-ALL-NEXT: [[INIT:%.*]] = load <16 x i8>, ptr [[SRC:%.*]], align 1310; CHECK-ALL-NEXT: store <16 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64311; CHECK-ALL-NEXT: [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]312; CHECK-ALL-NEXT: [[CHUNK:%.*]] = load <16 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1313; CHECK-ALL-NEXT: store <16 x i8> [[CHUNK]], ptr [[DST:%.*]], align 16314; CHECK-ALL-NEXT: ret void315;316 %intermediate = alloca [32 x i8], align 64317 store <32 x i8> zeroinitializer, ptr %intermediate, align 64318 %init = load <16 x i8>, ptr %src, align 1319 store <16 x i8> %init, ptr %intermediate, align 64320 %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff321 %chunk = load <16 x i8>, ptr %intermediate.off.addr, align 1322 store <16 x i8> %chunk, ptr %dst323 ret void324}325 326define void @load_1byte_chunk_of_64byte_alloca_with_zero_upper_half(ptr %src, i64 %byteOff, ptr %dst) nounwind {327; CHECK-ALL-LABEL: @load_1byte_chunk_of_64byte_alloca_with_zero_upper_half(328; CHECK-ALL-NEXT: [[INTERMEDIATE:%.*]] = alloca [64 x i8], align 64329; CHECK-ALL-NEXT: store <64 x i8> zeroinitializer, ptr [[INTERMEDIATE]], align 64330; CHECK-ALL-NEXT: [[INIT:%.*]] = load <32 x i8>, ptr [[SRC:%.*]], align 1331; CHECK-ALL-NEXT: store <32 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64332; CHECK-ALL-NEXT: [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]333; CHECK-ALL-NEXT: [[CHUNK:%.*]] = load <1 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1334; CHECK-ALL-NEXT: store <1 x i8> [[CHUNK]], ptr [[DST:%.*]], align 1335; CHECK-ALL-NEXT: ret void336;337 %intermediate = alloca [64 x i8], align 64338 store <64 x i8> zeroinitializer, ptr %intermediate, align 64339 %init = load <32 x i8>, ptr %src, align 1340 store <32 x i8> %init, ptr %intermediate, align 64341 %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff342 %chunk = load <1 x i8>, ptr %intermediate.off.addr, align 1343 store <1 x i8> %chunk, ptr %dst344 ret void345}346 347define void @load_2byte_chunk_of_64byte_alloca_with_zero_upper_half(ptr %src, i64 %byteOff, ptr %dst) nounwind {348; CHECK-ALL-LABEL: @load_2byte_chunk_of_64byte_alloca_with_zero_upper_half(349; CHECK-ALL-NEXT: [[INTERMEDIATE:%.*]] = alloca [64 x i8], align 64350; CHECK-ALL-NEXT: store <64 x i8> zeroinitializer, ptr [[INTERMEDIATE]], align 64351; CHECK-ALL-NEXT: [[INIT:%.*]] = load <32 x i8>, ptr [[SRC:%.*]], align 1352; CHECK-ALL-NEXT: store <32 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64353; CHECK-ALL-NEXT: [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]354; CHECK-ALL-NEXT: [[CHUNK:%.*]] = load <2 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1355; CHECK-ALL-NEXT: store <2 x i8> [[CHUNK]], ptr [[DST:%.*]], align 2356; CHECK-ALL-NEXT: ret void357;358 %intermediate = alloca [64 x i8], align 64359 store <64 x i8> zeroinitializer, ptr %intermediate, align 64360 %init = load <32 x i8>, ptr %src, align 1361 store <32 x i8> %init, ptr %intermediate, align 64362 %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff363 %chunk = load <2 x i8>, ptr %intermediate.off.addr, align 1364 store <2 x i8> %chunk, ptr %dst365 ret void366}367 368define void @load_4byte_chunk_of_64byte_alloca_with_zero_upper_half(ptr %src, i64 %byteOff, ptr %dst) nounwind {369; CHECK-ALL-LABEL: @load_4byte_chunk_of_64byte_alloca_with_zero_upper_half(370; CHECK-ALL-NEXT: [[INTERMEDIATE:%.*]] = alloca [64 x i8], align 64371; CHECK-ALL-NEXT: store <64 x i8> zeroinitializer, ptr [[INTERMEDIATE]], align 64372; CHECK-ALL-NEXT: [[INIT:%.*]] = load <32 x i8>, ptr [[SRC:%.*]], align 1373; CHECK-ALL-NEXT: store <32 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64374; CHECK-ALL-NEXT: [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]375; CHECK-ALL-NEXT: [[CHUNK:%.*]] = load <4 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1376; CHECK-ALL-NEXT: store <4 x i8> [[CHUNK]], ptr [[DST:%.*]], align 4377; CHECK-ALL-NEXT: ret void378;379 %intermediate = alloca [64 x i8], align 64380 store <64 x i8> zeroinitializer, ptr %intermediate, align 64381 %init = load <32 x i8>, ptr %src, align 1382 store <32 x i8> %init, ptr %intermediate, align 64383 %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff384 %chunk = load <4 x i8>, ptr %intermediate.off.addr, align 1385 store <4 x i8> %chunk, ptr %dst386 ret void387}388 389define void @load_8byte_chunk_of_64byte_alloca_with_zero_upper_half(ptr %src, i64 %byteOff, ptr %dst) nounwind {390; CHECK-ALL-LABEL: @load_8byte_chunk_of_64byte_alloca_with_zero_upper_half(391; CHECK-ALL-NEXT: [[INTERMEDIATE:%.*]] = alloca [64 x i8], align 64392; CHECK-ALL-NEXT: store <64 x i8> zeroinitializer, ptr [[INTERMEDIATE]], align 64393; CHECK-ALL-NEXT: [[INIT:%.*]] = load <32 x i8>, ptr [[SRC:%.*]], align 1394; CHECK-ALL-NEXT: store <32 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64395; CHECK-ALL-NEXT: [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]396; CHECK-ALL-NEXT: [[CHUNK:%.*]] = load <8 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1397; CHECK-ALL-NEXT: store <8 x i8> [[CHUNK]], ptr [[DST:%.*]], align 8398; CHECK-ALL-NEXT: ret void399;400 %intermediate = alloca [64 x i8], align 64401 store <64 x i8> zeroinitializer, ptr %intermediate, align 64402 %init = load <32 x i8>, ptr %src, align 1403 store <32 x i8> %init, ptr %intermediate, align 64404 %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff405 %chunk = load <8 x i8>, ptr %intermediate.off.addr, align 1406 store <8 x i8> %chunk, ptr %dst407 ret void408}409 410define void @load_16byte_chunk_of_64byte_alloca_with_zero_upper_half(ptr %src, i64 %byteOff, ptr %dst) nounwind {411; CHECK-ALL-LABEL: @load_16byte_chunk_of_64byte_alloca_with_zero_upper_half(412; CHECK-ALL-NEXT: [[INTERMEDIATE:%.*]] = alloca [64 x i8], align 64413; CHECK-ALL-NEXT: store <64 x i8> zeroinitializer, ptr [[INTERMEDIATE]], align 64414; CHECK-ALL-NEXT: [[INIT:%.*]] = load <32 x i8>, ptr [[SRC:%.*]], align 1415; CHECK-ALL-NEXT: store <32 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64416; CHECK-ALL-NEXT: [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]417; CHECK-ALL-NEXT: [[CHUNK:%.*]] = load <16 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1418; CHECK-ALL-NEXT: store <16 x i8> [[CHUNK]], ptr [[DST:%.*]], align 16419; CHECK-ALL-NEXT: ret void420;421 %intermediate = alloca [64 x i8], align 64422 store <64 x i8> zeroinitializer, ptr %intermediate, align 64423 %init = load <32 x i8>, ptr %src, align 1424 store <32 x i8> %init, ptr %intermediate, align 64425 %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff426 %chunk = load <16 x i8>, ptr %intermediate.off.addr, align 1427 store <16 x i8> %chunk, ptr %dst428 ret void429}430 431define void @load_32byte_chunk_of_64byte_alloca_with_zero_upper_half(ptr %src, i64 %byteOff, ptr %dst) nounwind {432; CHECK-ALL-LABEL: @load_32byte_chunk_of_64byte_alloca_with_zero_upper_half(433; CHECK-ALL-NEXT: [[INTERMEDIATE:%.*]] = alloca [64 x i8], align 64434; CHECK-ALL-NEXT: store <64 x i8> zeroinitializer, ptr [[INTERMEDIATE]], align 64435; CHECK-ALL-NEXT: [[INIT:%.*]] = load <32 x i8>, ptr [[SRC:%.*]], align 1436; CHECK-ALL-NEXT: store <32 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64437; CHECK-ALL-NEXT: [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]438; CHECK-ALL-NEXT: [[CHUNK:%.*]] = load <32 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1439; CHECK-ALL-NEXT: store <32 x i8> [[CHUNK]], ptr [[DST:%.*]], align 32440; CHECK-ALL-NEXT: ret void441;442 %intermediate = alloca [64 x i8], align 64443 store <64 x i8> zeroinitializer, ptr %intermediate, align 64444 %init = load <32 x i8>, ptr %src, align 1445 store <32 x i8> %init, ptr %intermediate, align 64446 %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff447 %chunk = load <32 x i8>, ptr %intermediate.off.addr, align 1448 store <32 x i8> %chunk, ptr %dst449 ret void450}451;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:452; CHECK-BE-32: {{.*}}453; CHECK-BE-64: {{.*}}454; CHECK-LE-32: {{.*}}455; CHECK-LE-64: {{.*}}456; CHECK-SCALAR: {{.*}}457; CHECK-SCALAR-32: {{.*}}458; CHECK-SCALAR-64: {{.*}}459