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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes='sroa<preserve-cfg>' -data-layout="e-n8:16:32:64" -S %s | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-SCALAR,CHECK-SCALAR-64,CHECK-LE-643; RUN: opt -passes='sroa<modify-cfg>' -data-layout="e-n8:16:32:64" -S %s | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-SCALAR,CHECK-SCALAR-64,CHECK-LE-644; RUN: opt -passes='sroa<preserve-cfg>' -data-layout="e-n8:16:32" -S %s | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-SCALAR,CHECK-SCALAR-32,CHECK-LE-325; RUN: opt -passes='sroa<modify-cfg>' -data-layout="e-n8:16:32" -S %s | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-SCALAR,CHECK-SCALAR-32,CHECK-LE-326; RUN: opt -passes='sroa<preserve-cfg>' -data-layout="E-n8:16:32:64" -S %s | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-SCALAR,CHECK-SCALAR-64,CHECK-BE-647; RUN: opt -passes='sroa<modify-cfg>' -data-layout="E-n8:16:32:64" -S %s | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-SCALAR,CHECK-SCALAR-64,CHECK-BE-648; RUN: opt -passes='sroa<preserve-cfg>' -data-layout="E-n8:16:32" -S %s | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-SCALAR,CHECK-SCALAR-32,CHECK-BE-329; RUN: opt -passes='sroa<modify-cfg>' -data-layout="E-n8:16:32" -S %s | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-SCALAR,CHECK-SCALAR-32,CHECK-BE-3210 11define void @load_1byte_chunk_of_1byte_alloca(ptr %src, i64 %byteOff, ptr %dst) nounwind {12; CHECK-ALL-LABEL: @load_1byte_chunk_of_1byte_alloca(13; CHECK-ALL-NEXT:    [[INTERMEDIATE:%.*]] = alloca [1 x i8], align 6414; CHECK-ALL-NEXT:    [[INIT:%.*]] = load <1 x i8>, ptr [[SRC:%.*]], align 115; CHECK-ALL-NEXT:    store <1 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 6416; CHECK-ALL-NEXT:    [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]17; CHECK-ALL-NEXT:    [[CHUNK:%.*]] = load <1 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 118; CHECK-ALL-NEXT:    store <1 x i8> [[CHUNK]], ptr [[DST:%.*]], align 119; CHECK-ALL-NEXT:    ret void20;21  %intermediate = alloca [1 x i8], align 6422  %init = load <1 x i8>, ptr %src, align 123  store <1 x i8> %init, ptr %intermediate, align 6424  %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff25  %chunk = load <1 x i8>, ptr %intermediate.off.addr, align 126  store <1 x i8> %chunk, ptr %dst27  ret void28}29 30define void @load_1byte_chunk_of_2byte_alloca(ptr %src, i64 %byteOff, ptr %dst) nounwind {31; CHECK-ALL-LABEL: @load_1byte_chunk_of_2byte_alloca(32; CHECK-ALL-NEXT:    [[INTERMEDIATE:%.*]] = alloca [2 x i8], align 6433; CHECK-ALL-NEXT:    [[INIT:%.*]] = load <2 x i8>, ptr [[SRC:%.*]], align 134; CHECK-ALL-NEXT:    store <2 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 6435; CHECK-ALL-NEXT:    [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]36; CHECK-ALL-NEXT:    [[CHUNK:%.*]] = load <1 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 137; CHECK-ALL-NEXT:    store <1 x i8> [[CHUNK]], ptr [[DST:%.*]], align 138; CHECK-ALL-NEXT:    ret void39;40  %intermediate = alloca [2 x i8], align 6441  %init = load <2 x i8>, ptr %src, align 142  store <2 x i8> %init, ptr %intermediate, align 6443  %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff44  %chunk = load <1 x i8>, ptr %intermediate.off.addr, align 145  store <1 x i8> %chunk, ptr %dst46  ret void47}48 49define void @load_2byte_chunk_of_2byte_alloca(ptr %src, i64 %byteOff, ptr %dst) nounwind {50; CHECK-ALL-LABEL: @load_2byte_chunk_of_2byte_alloca(51; CHECK-ALL-NEXT:    [[INTERMEDIATE:%.*]] = alloca [2 x i8], align 6452; CHECK-ALL-NEXT:    [[INIT:%.*]] = load <2 x i8>, ptr [[SRC:%.*]], align 153; CHECK-ALL-NEXT:    store <2 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 6454; CHECK-ALL-NEXT:    [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]55; CHECK-ALL-NEXT:    [[CHUNK:%.*]] = load <2 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 156; CHECK-ALL-NEXT:    store <2 x i8> [[CHUNK]], ptr [[DST:%.*]], align 257; CHECK-ALL-NEXT:    ret void58;59  %intermediate = alloca [2 x i8], align 6460  %init = load <2 x i8>, ptr %src, align 161  store <2 x i8> %init, ptr %intermediate, align 6462  %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff63  %chunk = load <2 x i8>, ptr %intermediate.off.addr, align 164  store <2 x i8> %chunk, ptr %dst65  ret void66}67 68define void @load_1byte_chunk_of_4byte_alloca(ptr %src, i64 %byteOff, ptr %dst) nounwind {69; CHECK-ALL-LABEL: @load_1byte_chunk_of_4byte_alloca(70; CHECK-ALL-NEXT:    [[INTERMEDIATE:%.*]] = alloca [4 x i8], align 6471; CHECK-ALL-NEXT:    [[INIT:%.*]] = load <4 x i8>, ptr [[SRC:%.*]], align 172; CHECK-ALL-NEXT:    store <4 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 6473; CHECK-ALL-NEXT:    [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]74; CHECK-ALL-NEXT:    [[CHUNK:%.*]] = load <1 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 175; CHECK-ALL-NEXT:    store <1 x i8> [[CHUNK]], ptr [[DST:%.*]], align 176; CHECK-ALL-NEXT:    ret void77;78  %intermediate = alloca [4 x i8], align 6479  %init = load <4 x i8>, ptr %src, align 180  store <4 x i8> %init, ptr %intermediate, align 6481  %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff82  %chunk = load <1 x i8>, ptr %intermediate.off.addr, align 183  store <1 x i8> %chunk, ptr %dst84  ret void85}86 87define void @load_2byte_chunk_of_4byte_alloca(ptr %src, i64 %byteOff, ptr %dst) nounwind {88; CHECK-ALL-LABEL: @load_2byte_chunk_of_4byte_alloca(89; CHECK-ALL-NEXT:    [[INTERMEDIATE:%.*]] = alloca [4 x i8], align 6490; CHECK-ALL-NEXT:    [[INIT:%.*]] = load <4 x i8>, ptr [[SRC:%.*]], align 191; CHECK-ALL-NEXT:    store <4 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 6492; CHECK-ALL-NEXT:    [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]93; CHECK-ALL-NEXT:    [[CHUNK:%.*]] = load <2 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 194; CHECK-ALL-NEXT:    store <2 x i8> [[CHUNK]], ptr [[DST:%.*]], align 295; CHECK-ALL-NEXT:    ret void96;97  %intermediate = alloca [4 x i8], align 6498  %init = load <4 x i8>, ptr %src, align 199  store <4 x i8> %init, ptr %intermediate, align 64100  %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff101  %chunk = load <2 x i8>, ptr %intermediate.off.addr, align 1102  store <2 x i8> %chunk, ptr %dst103  ret void104}105 106define void @load_4byte_chunk_of_4byte_alloca(ptr %src, i64 %byteOff, ptr %dst) nounwind {107; CHECK-ALL-LABEL: @load_4byte_chunk_of_4byte_alloca(108; CHECK-ALL-NEXT:    [[INTERMEDIATE:%.*]] = alloca [4 x i8], align 64109; CHECK-ALL-NEXT:    [[INIT:%.*]] = load <4 x i8>, ptr [[SRC:%.*]], align 1110; CHECK-ALL-NEXT:    store <4 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64111; CHECK-ALL-NEXT:    [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]112; CHECK-ALL-NEXT:    [[CHUNK:%.*]] = load <4 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1113; CHECK-ALL-NEXT:    store <4 x i8> [[CHUNK]], ptr [[DST:%.*]], align 4114; CHECK-ALL-NEXT:    ret void115;116  %intermediate = alloca [4 x i8], align 64117  %init = load <4 x i8>, ptr %src, align 1118  store <4 x i8> %init, ptr %intermediate, align 64119  %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff120  %chunk = load <4 x i8>, ptr %intermediate.off.addr, align 1121  store <4 x i8> %chunk, ptr %dst122  ret void123}124 125define void @load_1byte_chunk_of_8byte_alloca(ptr %src, i64 %byteOff, ptr %dst) nounwind {126; CHECK-ALL-LABEL: @load_1byte_chunk_of_8byte_alloca(127; CHECK-ALL-NEXT:    [[INTERMEDIATE:%.*]] = alloca [8 x i8], align 64128; CHECK-ALL-NEXT:    [[INIT:%.*]] = load <8 x i8>, ptr [[SRC:%.*]], align 1129; CHECK-ALL-NEXT:    store <8 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64130; CHECK-ALL-NEXT:    [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]131; CHECK-ALL-NEXT:    [[CHUNK:%.*]] = load <1 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1132; CHECK-ALL-NEXT:    store <1 x i8> [[CHUNK]], ptr [[DST:%.*]], align 1133; CHECK-ALL-NEXT:    ret void134;135  %intermediate = alloca [8 x i8], align 64136  %init = load <8 x i8>, ptr %src, align 1137  store <8 x i8> %init, ptr %intermediate, align 64138  %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff139  %chunk = load <1 x i8>, ptr %intermediate.off.addr, align 1140  store <1 x i8> %chunk, ptr %dst141  ret void142}143 144define void @load_2byte_chunk_of_8byte_alloca(ptr %src, i64 %byteOff, ptr %dst) nounwind {145; CHECK-ALL-LABEL: @load_2byte_chunk_of_8byte_alloca(146; CHECK-ALL-NEXT:    [[INTERMEDIATE:%.*]] = alloca [8 x i8], align 64147; CHECK-ALL-NEXT:    [[INIT:%.*]] = load <8 x i8>, ptr [[SRC:%.*]], align 1148; CHECK-ALL-NEXT:    store <8 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64149; CHECK-ALL-NEXT:    [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]150; CHECK-ALL-NEXT:    [[CHUNK:%.*]] = load <2 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1151; CHECK-ALL-NEXT:    store <2 x i8> [[CHUNK]], ptr [[DST:%.*]], align 2152; CHECK-ALL-NEXT:    ret void153;154  %intermediate = alloca [8 x i8], align 64155  %init = load <8 x i8>, ptr %src, align 1156  store <8 x i8> %init, ptr %intermediate, align 64157  %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff158  %chunk = load <2 x i8>, ptr %intermediate.off.addr, align 1159  store <2 x i8> %chunk, ptr %dst160  ret void161}162 163define void @load_4byte_chunk_of_8byte_alloca(ptr %src, i64 %byteOff, ptr %dst) nounwind {164; CHECK-ALL-LABEL: @load_4byte_chunk_of_8byte_alloca(165; CHECK-ALL-NEXT:    [[INTERMEDIATE:%.*]] = alloca [8 x i8], align 64166; CHECK-ALL-NEXT:    [[INIT:%.*]] = load <8 x i8>, ptr [[SRC:%.*]], align 1167; CHECK-ALL-NEXT:    store <8 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64168; CHECK-ALL-NEXT:    [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]169; CHECK-ALL-NEXT:    [[CHUNK:%.*]] = load <4 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1170; CHECK-ALL-NEXT:    store <4 x i8> [[CHUNK]], ptr [[DST:%.*]], align 4171; CHECK-ALL-NEXT:    ret void172;173  %intermediate = alloca [8 x i8], align 64174  %init = load <8 x i8>, ptr %src, align 1175  store <8 x i8> %init, ptr %intermediate, align 64176  %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff177  %chunk = load <4 x i8>, ptr %intermediate.off.addr, align 1178  store <4 x i8> %chunk, ptr %dst179  ret void180}181 182define void @load_8byte_chunk_of_8byte_alloca(ptr %src, i64 %byteOff, ptr %dst) nounwind {183; CHECK-ALL-LABEL: @load_8byte_chunk_of_8byte_alloca(184; CHECK-ALL-NEXT:    [[INTERMEDIATE:%.*]] = alloca [8 x i8], align 64185; CHECK-ALL-NEXT:    [[INIT:%.*]] = load <8 x i8>, ptr [[SRC:%.*]], align 1186; CHECK-ALL-NEXT:    store <8 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64187; CHECK-ALL-NEXT:    [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]188; CHECK-ALL-NEXT:    [[CHUNK:%.*]] = load <8 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1189; CHECK-ALL-NEXT:    store <8 x i8> [[CHUNK]], ptr [[DST:%.*]], align 8190; CHECK-ALL-NEXT:    ret void191;192  %intermediate = alloca [8 x i8], align 64193  %init = load <8 x i8>, ptr %src, align 1194  store <8 x i8> %init, ptr %intermediate, align 64195  %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff196  %chunk = load <8 x i8>, ptr %intermediate.off.addr, align 1197  store <8 x i8> %chunk, ptr %dst198  ret void199}200 201define void @load_1byte_chunk_of_16byte_alloca(ptr %src, i64 %byteOff, ptr %dst) nounwind {202; CHECK-ALL-LABEL: @load_1byte_chunk_of_16byte_alloca(203; CHECK-ALL-NEXT:    [[INTERMEDIATE:%.*]] = alloca [16 x i8], align 64204; CHECK-ALL-NEXT:    [[INIT:%.*]] = load <16 x i8>, ptr [[SRC:%.*]], align 1205; CHECK-ALL-NEXT:    store <16 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64206; CHECK-ALL-NEXT:    [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]207; CHECK-ALL-NEXT:    [[CHUNK:%.*]] = load <1 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1208; CHECK-ALL-NEXT:    store <1 x i8> [[CHUNK]], ptr [[DST:%.*]], align 1209; CHECK-ALL-NEXT:    ret void210;211  %intermediate = alloca [16 x i8], align 64212  %init = load <16 x i8>, ptr %src, align 1213  store <16 x i8> %init, ptr %intermediate, align 64214  %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff215  %chunk = load <1 x i8>, ptr %intermediate.off.addr, align 1216  store <1 x i8> %chunk, ptr %dst217  ret void218}219 220define void @load_2byte_chunk_of_16byte_alloca(ptr %src, i64 %byteOff, ptr %dst) nounwind {221; CHECK-ALL-LABEL: @load_2byte_chunk_of_16byte_alloca(222; CHECK-ALL-NEXT:    [[INTERMEDIATE:%.*]] = alloca [16 x i8], align 64223; CHECK-ALL-NEXT:    [[INIT:%.*]] = load <16 x i8>, ptr [[SRC:%.*]], align 1224; CHECK-ALL-NEXT:    store <16 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64225; CHECK-ALL-NEXT:    [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]226; CHECK-ALL-NEXT:    [[CHUNK:%.*]] = load <2 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1227; CHECK-ALL-NEXT:    store <2 x i8> [[CHUNK]], ptr [[DST:%.*]], align 2228; CHECK-ALL-NEXT:    ret void229;230  %intermediate = alloca [16 x i8], align 64231  %init = load <16 x i8>, ptr %src, align 1232  store <16 x i8> %init, ptr %intermediate, align 64233  %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff234  %chunk = load <2 x i8>, ptr %intermediate.off.addr, align 1235  store <2 x i8> %chunk, ptr %dst236  ret void237}238 239define void @load_4byte_chunk_of_16byte_alloca(ptr %src, i64 %byteOff, ptr %dst) nounwind {240; CHECK-ALL-LABEL: @load_4byte_chunk_of_16byte_alloca(241; CHECK-ALL-NEXT:    [[INTERMEDIATE:%.*]] = alloca [16 x i8], align 64242; CHECK-ALL-NEXT:    [[INIT:%.*]] = load <16 x i8>, ptr [[SRC:%.*]], align 1243; CHECK-ALL-NEXT:    store <16 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64244; CHECK-ALL-NEXT:    [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]245; CHECK-ALL-NEXT:    [[CHUNK:%.*]] = load <4 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1246; CHECK-ALL-NEXT:    store <4 x i8> [[CHUNK]], ptr [[DST:%.*]], align 4247; CHECK-ALL-NEXT:    ret void248;249  %intermediate = alloca [16 x i8], align 64250  %init = load <16 x i8>, ptr %src, align 1251  store <16 x i8> %init, ptr %intermediate, align 64252  %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff253  %chunk = load <4 x i8>, ptr %intermediate.off.addr, align 1254  store <4 x i8> %chunk, ptr %dst255  ret void256}257 258define void @load_8byte_chunk_of_16byte_alloca(ptr %src, i64 %byteOff, ptr %dst) nounwind {259; CHECK-ALL-LABEL: @load_8byte_chunk_of_16byte_alloca(260; CHECK-ALL-NEXT:    [[INTERMEDIATE:%.*]] = alloca [16 x i8], align 64261; CHECK-ALL-NEXT:    [[INIT:%.*]] = load <16 x i8>, ptr [[SRC:%.*]], align 1262; CHECK-ALL-NEXT:    store <16 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64263; CHECK-ALL-NEXT:    [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]264; CHECK-ALL-NEXT:    [[CHUNK:%.*]] = load <8 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1265; CHECK-ALL-NEXT:    store <8 x i8> [[CHUNK]], ptr [[DST:%.*]], align 8266; CHECK-ALL-NEXT:    ret void267;268  %intermediate = alloca [16 x i8], align 64269  %init = load <16 x i8>, ptr %src, align 1270  store <16 x i8> %init, ptr %intermediate, align 64271  %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff272  %chunk = load <8 x i8>, ptr %intermediate.off.addr, align 1273  store <8 x i8> %chunk, ptr %dst274  ret void275}276 277define void @load_16byte_chunk_of_16byte_alloca(ptr %src, i64 %byteOff, ptr %dst) nounwind {278; CHECK-ALL-LABEL: @load_16byte_chunk_of_16byte_alloca(279; CHECK-ALL-NEXT:    [[INTERMEDIATE:%.*]] = alloca [16 x i8], align 64280; CHECK-ALL-NEXT:    [[INIT:%.*]] = load <16 x i8>, ptr [[SRC:%.*]], align 1281; CHECK-ALL-NEXT:    store <16 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64282; CHECK-ALL-NEXT:    [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]283; CHECK-ALL-NEXT:    [[CHUNK:%.*]] = load <16 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1284; CHECK-ALL-NEXT:    store <16 x i8> [[CHUNK]], ptr [[DST:%.*]], align 16285; CHECK-ALL-NEXT:    ret void286;287  %intermediate = alloca [16 x i8], align 64288  %init = load <16 x i8>, ptr %src, align 1289  store <16 x i8> %init, ptr %intermediate, align 64290  %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff291  %chunk = load <16 x i8>, ptr %intermediate.off.addr, align 1292  store <16 x i8> %chunk, ptr %dst293  ret void294}295 296define void @load_1byte_chunk_of_32byte_alloca(ptr %src, i64 %byteOff, ptr %dst) nounwind {297; CHECK-ALL-LABEL: @load_1byte_chunk_of_32byte_alloca(298; CHECK-ALL-NEXT:    [[INTERMEDIATE:%.*]] = alloca [32 x i8], align 64299; CHECK-ALL-NEXT:    [[INIT:%.*]] = load <32 x i8>, ptr [[SRC:%.*]], align 1300; CHECK-ALL-NEXT:    store <32 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64301; CHECK-ALL-NEXT:    [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]302; CHECK-ALL-NEXT:    [[CHUNK:%.*]] = load <1 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1303; CHECK-ALL-NEXT:    store <1 x i8> [[CHUNK]], ptr [[DST:%.*]], align 1304; CHECK-ALL-NEXT:    ret void305;306  %intermediate = alloca [32 x i8], align 64307  %init = load <32 x i8>, ptr %src, align 1308  store <32 x i8> %init, ptr %intermediate, align 64309  %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff310  %chunk = load <1 x i8>, ptr %intermediate.off.addr, align 1311  store <1 x i8> %chunk, ptr %dst312  ret void313}314 315define void @load_2byte_chunk_of_32byte_alloca(ptr %src, i64 %byteOff, ptr %dst) nounwind {316; CHECK-ALL-LABEL: @load_2byte_chunk_of_32byte_alloca(317; CHECK-ALL-NEXT:    [[INTERMEDIATE:%.*]] = alloca [32 x i8], align 64318; CHECK-ALL-NEXT:    [[INIT:%.*]] = load <32 x i8>, ptr [[SRC:%.*]], align 1319; CHECK-ALL-NEXT:    store <32 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64320; CHECK-ALL-NEXT:    [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]321; CHECK-ALL-NEXT:    [[CHUNK:%.*]] = load <2 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1322; CHECK-ALL-NEXT:    store <2 x i8> [[CHUNK]], ptr [[DST:%.*]], align 2323; CHECK-ALL-NEXT:    ret void324;325  %intermediate = alloca [32 x i8], align 64326  %init = load <32 x i8>, ptr %src, align 1327  store <32 x i8> %init, ptr %intermediate, align 64328  %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff329  %chunk = load <2 x i8>, ptr %intermediate.off.addr, align 1330  store <2 x i8> %chunk, ptr %dst331  ret void332}333 334define void @load_4byte_chunk_of_32byte_alloca(ptr %src, i64 %byteOff, ptr %dst) nounwind {335; CHECK-ALL-LABEL: @load_4byte_chunk_of_32byte_alloca(336; CHECK-ALL-NEXT:    [[INTERMEDIATE:%.*]] = alloca [32 x i8], align 64337; CHECK-ALL-NEXT:    [[INIT:%.*]] = load <32 x i8>, ptr [[SRC:%.*]], align 1338; CHECK-ALL-NEXT:    store <32 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64339; CHECK-ALL-NEXT:    [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]340; CHECK-ALL-NEXT:    [[CHUNK:%.*]] = load <4 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1341; CHECK-ALL-NEXT:    store <4 x i8> [[CHUNK]], ptr [[DST:%.*]], align 4342; CHECK-ALL-NEXT:    ret void343;344  %intermediate = alloca [32 x i8], align 64345  %init = load <32 x i8>, ptr %src, align 1346  store <32 x i8> %init, ptr %intermediate, align 64347  %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff348  %chunk = load <4 x i8>, ptr %intermediate.off.addr, align 1349  store <4 x i8> %chunk, ptr %dst350  ret void351}352 353define void @load_8byte_chunk_of_32byte_alloca(ptr %src, i64 %byteOff, ptr %dst) nounwind {354; CHECK-ALL-LABEL: @load_8byte_chunk_of_32byte_alloca(355; CHECK-ALL-NEXT:    [[INTERMEDIATE:%.*]] = alloca [32 x i8], align 64356; CHECK-ALL-NEXT:    [[INIT:%.*]] = load <32 x i8>, ptr [[SRC:%.*]], align 1357; CHECK-ALL-NEXT:    store <32 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64358; CHECK-ALL-NEXT:    [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]359; CHECK-ALL-NEXT:    [[CHUNK:%.*]] = load <8 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1360; CHECK-ALL-NEXT:    store <8 x i8> [[CHUNK]], ptr [[DST:%.*]], align 8361; CHECK-ALL-NEXT:    ret void362;363  %intermediate = alloca [32 x i8], align 64364  %init = load <32 x i8>, ptr %src, align 1365  store <32 x i8> %init, ptr %intermediate, align 64366  %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff367  %chunk = load <8 x i8>, ptr %intermediate.off.addr, align 1368  store <8 x i8> %chunk, ptr %dst369  ret void370}371 372define void @load_16byte_chunk_of_32byte_alloca(ptr %src, i64 %byteOff, ptr %dst) nounwind {373; CHECK-ALL-LABEL: @load_16byte_chunk_of_32byte_alloca(374; CHECK-ALL-NEXT:    [[INTERMEDIATE:%.*]] = alloca [32 x i8], align 64375; CHECK-ALL-NEXT:    [[INIT:%.*]] = load <32 x i8>, ptr [[SRC:%.*]], align 1376; CHECK-ALL-NEXT:    store <32 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64377; CHECK-ALL-NEXT:    [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]378; CHECK-ALL-NEXT:    [[CHUNK:%.*]] = load <16 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1379; CHECK-ALL-NEXT:    store <16 x i8> [[CHUNK]], ptr [[DST:%.*]], align 16380; CHECK-ALL-NEXT:    ret void381;382  %intermediate = alloca [32 x i8], align 64383  %init = load <32 x i8>, ptr %src, align 1384  store <32 x i8> %init, ptr %intermediate, align 64385  %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff386  %chunk = load <16 x i8>, ptr %intermediate.off.addr, align 1387  store <16 x i8> %chunk, ptr %dst388  ret void389}390 391define void @load_32byte_chunk_of_32byte_alloca(ptr %src, i64 %byteOff, ptr %dst) nounwind {392; CHECK-ALL-LABEL: @load_32byte_chunk_of_32byte_alloca(393; CHECK-ALL-NEXT:    [[INTERMEDIATE:%.*]] = alloca [32 x i8], align 64394; CHECK-ALL-NEXT:    [[INIT:%.*]] = load <32 x i8>, ptr [[SRC:%.*]], align 1395; CHECK-ALL-NEXT:    store <32 x i8> [[INIT]], ptr [[INTERMEDIATE]], align 64396; CHECK-ALL-NEXT:    [[INTERMEDIATE_OFF_ADDR:%.*]] = getelementptr inbounds i8, ptr [[INTERMEDIATE]], i64 [[BYTEOFF:%.*]]397; CHECK-ALL-NEXT:    [[CHUNK:%.*]] = load <32 x i8>, ptr [[INTERMEDIATE_OFF_ADDR]], align 1398; CHECK-ALL-NEXT:    store <32 x i8> [[CHUNK]], ptr [[DST:%.*]], align 32399; CHECK-ALL-NEXT:    ret void400;401  %intermediate = alloca [32 x i8], align 64402  %init = load <32 x i8>, ptr %src, align 1403  store <32 x i8> %init, ptr %intermediate, align 64404  %intermediate.off.addr = getelementptr inbounds i8, ptr %intermediate, i64 %byteOff405  %chunk = load <32 x i8>, ptr %intermediate.off.addr, align 1406  store <32 x i8> %chunk, ptr %dst407  ret void408}409 410;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:411; CHECK-BE-32: {{.*}}412; CHECK-BE-64: {{.*}}413; CHECK-LE-32: {{.*}}414; CHECK-LE-64: {{.*}}415; CHECK-SCALAR: {{.*}}416; CHECK-SCALAR-32: {{.*}}417; CHECK-SCALAR-64: {{.*}}418