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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 62; RUN: opt %s -passes='function(scalarizer<load-store>,dce)' -S | FileCheck %s3target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"4 5declare <4 x float> @ext(<4 x float>)6@g = global <4 x float> zeroinitializer7 8define void @f1(<4 x float> %init, ptr %base, i32 %count) {9; CHECK-LABEL: define void @f1(10; CHECK-SAME: <4 x float> [[INIT:%.*]], ptr [[BASE:%.*]], i32 [[COUNT:%.*]]) {11; CHECK-NEXT: [[ENTRY:.*]]:12; CHECK-NEXT: [[INIT_I0:%.*]] = extractelement <4 x float> [[INIT]], i64 013; CHECK-NEXT: [[INIT_I1:%.*]] = extractelement <4 x float> [[INIT]], i64 114; CHECK-NEXT: [[INIT_I2:%.*]] = extractelement <4 x float> [[INIT]], i64 215; CHECK-NEXT: [[INIT_I3:%.*]] = extractelement <4 x float> [[INIT]], i64 316; CHECK-NEXT: br label %[[LOOP:.*]]17; CHECK: [[LOOP]]:18; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[COUNT]], %[[ENTRY]] ], [ [[NEXTI:%.*]], %[[LOOP]] ]19; CHECK-NEXT: [[ACC_I0:%.*]] = phi float [ [[INIT_I0]], %[[ENTRY]] ], [ [[SEL_I0:%.*]], %[[LOOP]] ]20; CHECK-NEXT: [[ACC_I1:%.*]] = phi float [ [[INIT_I1]], %[[ENTRY]] ], [ [[SEL_I1:%.*]], %[[LOOP]] ]21; CHECK-NEXT: [[ACC_I2:%.*]] = phi float [ [[INIT_I2]], %[[ENTRY]] ], [ [[SEL_I2:%.*]], %[[LOOP]] ]22; CHECK-NEXT: [[ACC_I3:%.*]] = phi float [ [[INIT_I3]], %[[ENTRY]] ], [ [[SEL_I3:%.*]], %[[LOOP]] ]23; CHECK-NEXT: [[NEXTI]] = sub i32 [[I]], 124; CHECK-NEXT: [[PTR:%.*]] = getelementptr <4 x float>, ptr [[BASE]], i32 [[I]]25; CHECK-NEXT: [[VAL_I0:%.*]] = load float, ptr [[PTR]], align 1626; CHECK-NEXT: [[PTR_I1:%.*]] = getelementptr float, ptr [[PTR]], i32 127; CHECK-NEXT: [[VAL_I1:%.*]] = load float, ptr [[PTR_I1]], align 428; CHECK-NEXT: [[PTR_I2:%.*]] = getelementptr float, ptr [[PTR]], i32 229; CHECK-NEXT: [[VAL_I2:%.*]] = load float, ptr [[PTR_I2]], align 830; CHECK-NEXT: [[PTR_I3:%.*]] = getelementptr float, ptr [[PTR]], i32 331; CHECK-NEXT: [[VAL_I3:%.*]] = load float, ptr [[PTR_I3]], align 432; CHECK-NEXT: [[ADD_I0:%.*]] = fadd float [[VAL_I0]], [[VAL_I2]]33; CHECK-NEXT: [[ADD_I1:%.*]] = fadd float [[VAL_I1]], [[VAL_I3]]34; CHECK-NEXT: [[ADD_I2:%.*]] = fadd float [[ACC_I0]], [[ACC_I2]]35; CHECK-NEXT: [[ADD_I3:%.*]] = fadd float [[ACC_I1]], [[ACC_I3]]36; CHECK-NEXT: [[ADD_UPTO0:%.*]] = insertelement <4 x float> poison, float [[ADD_I0]], i64 037; CHECK-NEXT: [[ADD_UPTO1:%.*]] = insertelement <4 x float> [[ADD_UPTO0]], float [[ADD_I1]], i64 138; CHECK-NEXT: [[ADD_UPTO2:%.*]] = insertelement <4 x float> [[ADD_UPTO1]], float [[ADD_I2]], i64 239; CHECK-NEXT: [[ADD:%.*]] = insertelement <4 x float> [[ADD_UPTO2]], float [[ADD_I3]], i64 340; CHECK-NEXT: [[CALL:%.*]] = call <4 x float> @ext(<4 x float> [[ADD]])41; CHECK-NEXT: [[CALL_I0:%.*]] = extractelement <4 x float> [[CALL]], i64 042; CHECK-NEXT: [[CMP_I0:%.*]] = fcmp ogt float [[CALL_I0]], 1.000000e+0043; CHECK-NEXT: [[CALL_I1:%.*]] = extractelement <4 x float> [[CALL]], i64 144; CHECK-NEXT: [[CMP_I1:%.*]] = fcmp ogt float [[CALL_I1]], 2.000000e+0045; CHECK-NEXT: [[CALL_I2:%.*]] = extractelement <4 x float> [[CALL]], i64 246; CHECK-NEXT: [[CMP_I2:%.*]] = fcmp ogt float [[CALL_I2]], 3.000000e+0047; CHECK-NEXT: [[CALL_I3:%.*]] = extractelement <4 x float> [[CALL]], i64 348; CHECK-NEXT: [[CMP_I3:%.*]] = fcmp ogt float [[CALL_I3]], 4.000000e+0049; CHECK-NEXT: [[SEL_I0]] = select i1 [[CMP_I0]], float [[CALL_I0]], float 5.000000e+0050; CHECK-NEXT: [[SEL_I1]] = select i1 [[CMP_I1]], float [[CALL_I1]], float 6.000000e+0051; CHECK-NEXT: [[SEL_I2]] = select i1 [[CMP_I2]], float [[CALL_I2]], float 7.000000e+0052; CHECK-NEXT: [[SEL_I3]] = select i1 [[CMP_I3]], float [[CALL_I3]], float 8.000000e+0053; CHECK-NEXT: store float [[SEL_I0]], ptr [[PTR]], align 1654; CHECK-NEXT: store float [[SEL_I1]], ptr [[PTR_I1]], align 455; CHECK-NEXT: store float [[SEL_I2]], ptr [[PTR_I2]], align 856; CHECK-NEXT: store float [[SEL_I3]], ptr [[PTR_I3]], align 457; CHECK-NEXT: [[TEST:%.*]] = icmp eq i32 [[NEXTI]], 058; CHECK-NEXT: br i1 [[TEST]], label %[[LOOP]], label %[[EXIT:.*]]59; CHECK: [[EXIT]]:60; CHECK-NEXT: ret void61;62entry:63 br label %loop64 65loop:66 %i = phi i32 [ %count, %entry ], [ %nexti, %loop ]67 %acc = phi <4 x float> [ %init, %entry ], [ %sel, %loop ]68 %nexti = sub i32 %i, 169 70 %ptr = getelementptr <4 x float>, ptr %base, i32 %i71 %val = load <4 x float> , ptr %ptr72 %dval = bitcast <4 x float> %val to <2 x double>73 %dacc = bitcast <4 x float> %acc to <2 x double>74 %shuffle1 = shufflevector <2 x double> %dval, <2 x double> %dacc,75 <2 x i32> <i32 0, i32 2>76 %shuffle2 = shufflevector <2 x double> %dval, <2 x double> %dacc,77 <2 x i32> <i32 1, i32 3>78 %f1 = bitcast <2 x double> %shuffle1 to <4 x float>79 %f2 = bitcast <2 x double> %shuffle2 to <4 x float>80 %add = fadd <4 x float> %f1, %f281 %call = call <4 x float> @ext(<4 x float> %add)82 %cmp = fcmp ogt <4 x float> %call,83 <float 1.0, float 2.0, float 3.0, float 4.0>84 %sel = select <4 x i1> %cmp, <4 x float> %call,85 <4 x float> <float 5.0, float 6.0, float 7.0, float 8.0>86 store <4 x float> %sel, ptr %ptr87 88 %test = icmp eq i32 %nexti, 089 br i1 %test, label %loop, label %exit90 91exit:92 ret void93}94 95define void @f2(<4 x i32> %init, ptr %base, i32 %count) {96; CHECK-LABEL: define void @f2(97; CHECK-SAME: <4 x i32> [[INIT:%.*]], ptr [[BASE:%.*]], i32 [[COUNT:%.*]]) {98; CHECK-NEXT: [[ENTRY:.*]]:99; CHECK-NEXT: [[INIT_I0:%.*]] = extractelement <4 x i32> [[INIT]], i64 0100; CHECK-NEXT: [[INIT_I1:%.*]] = extractelement <4 x i32> [[INIT]], i64 1101; CHECK-NEXT: [[INIT_I2:%.*]] = extractelement <4 x i32> [[INIT]], i64 2102; CHECK-NEXT: [[INIT_I3:%.*]] = extractelement <4 x i32> [[INIT]], i64 3103; CHECK-NEXT: br label %[[LOOP:.*]]104; CHECK: [[LOOP]]:105; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[COUNT]], %[[ENTRY]] ], [ [[NEXTI:%.*]], %[[LOOP]] ]106; CHECK-NEXT: [[ACC_I0:%.*]] = phi i32 [ [[INIT_I0]], %[[ENTRY]] ], [ [[SEL_I0:%.*]], %[[LOOP]] ]107; CHECK-NEXT: [[ACC_I1:%.*]] = phi i32 [ [[INIT_I1]], %[[ENTRY]] ], [ [[SEL_I1:%.*]], %[[LOOP]] ]108; CHECK-NEXT: [[ACC_I2:%.*]] = phi i32 [ [[INIT_I2]], %[[ENTRY]] ], [ [[SEL_I2:%.*]], %[[LOOP]] ]109; CHECK-NEXT: [[ACC_I3:%.*]] = phi i32 [ [[INIT_I3]], %[[ENTRY]] ], [ [[SEL_I3:%.*]], %[[LOOP]] ]110; CHECK-NEXT: [[NEXTI]] = sub i32 [[I]], 1111; CHECK-NEXT: [[PTR:%.*]] = getelementptr <4 x i8>, ptr [[BASE]], i32 [[I]]112; CHECK-NEXT: [[VAL_I0:%.*]] = load i8, ptr [[PTR]], align 4113; CHECK-NEXT: [[PTR_I1:%.*]] = getelementptr i8, ptr [[PTR]], i32 1114; CHECK-NEXT: [[VAL_I1:%.*]] = load i8, ptr [[PTR_I1]], align 1115; CHECK-NEXT: [[PTR_I2:%.*]] = getelementptr i8, ptr [[PTR]], i32 2116; CHECK-NEXT: [[VAL_I2:%.*]] = load i8, ptr [[PTR_I2]], align 2117; CHECK-NEXT: [[PTR_I3:%.*]] = getelementptr i8, ptr [[PTR]], i32 3118; CHECK-NEXT: [[VAL_I3:%.*]] = load i8, ptr [[PTR_I3]], align 1119; CHECK-NEXT: [[EXT_I0:%.*]] = sext i8 [[VAL_I0]] to i32120; CHECK-NEXT: [[EXT_I1:%.*]] = sext i8 [[VAL_I1]] to i32121; CHECK-NEXT: [[EXT_I2:%.*]] = sext i8 [[VAL_I2]] to i32122; CHECK-NEXT: [[EXT_I3:%.*]] = sext i8 [[VAL_I3]] to i32123; CHECK-NEXT: [[ADD_I0:%.*]] = add i32 [[EXT_I0]], [[ACC_I0]]124; CHECK-NEXT: [[ADD_I1:%.*]] = add i32 [[EXT_I1]], [[ACC_I1]]125; CHECK-NEXT: [[ADD_I2:%.*]] = add i32 [[EXT_I2]], [[ACC_I2]]126; CHECK-NEXT: [[ADD_I3:%.*]] = add i32 [[EXT_I3]], [[ACC_I3]]127; CHECK-NEXT: [[CMP_I0:%.*]] = icmp slt i32 [[ADD_I0]], -10128; CHECK-NEXT: [[CMP_I1:%.*]] = icmp slt i32 [[ADD_I1]], -11129; CHECK-NEXT: [[CMP_I2:%.*]] = icmp slt i32 [[ADD_I2]], -12130; CHECK-NEXT: [[CMP_I3:%.*]] = icmp slt i32 [[ADD_I3]], -13131; CHECK-NEXT: [[SEL_I0]] = select i1 [[CMP_I0]], i32 [[ADD_I0]], i32 [[I]]132; CHECK-NEXT: [[SEL_I1]] = select i1 [[CMP_I1]], i32 [[ADD_I1]], i32 [[I]]133; CHECK-NEXT: [[SEL_I2]] = select i1 [[CMP_I2]], i32 [[ADD_I2]], i32 [[I]]134; CHECK-NEXT: [[SEL_I3]] = select i1 [[CMP_I3]], i32 [[ADD_I3]], i32 [[I]]135; CHECK-NEXT: [[TRUNC_I0:%.*]] = trunc i32 [[SEL_I0]] to i8136; CHECK-NEXT: [[TRUNC_I1:%.*]] = trunc i32 [[SEL_I1]] to i8137; CHECK-NEXT: [[TRUNC_I2:%.*]] = trunc i32 [[SEL_I2]] to i8138; CHECK-NEXT: [[TRUNC_I3:%.*]] = trunc i32 [[SEL_I3]] to i8139; CHECK-NEXT: store i8 [[TRUNC_I0]], ptr [[PTR]], align 4140; CHECK-NEXT: store i8 [[TRUNC_I1]], ptr [[PTR_I1]], align 1141; CHECK-NEXT: store i8 [[TRUNC_I2]], ptr [[PTR_I2]], align 2142; CHECK-NEXT: store i8 [[TRUNC_I3]], ptr [[PTR_I3]], align 1143; CHECK-NEXT: [[TEST:%.*]] = icmp eq i32 [[NEXTI]], 0144; CHECK-NEXT: br i1 [[TEST]], label %[[LOOP]], label %[[EXIT:.*]]145; CHECK: [[EXIT]]:146; CHECK-NEXT: ret void147;148entry:149 br label %loop150 151loop:152 %i = phi i32 [ %count, %entry ], [ %nexti, %loop ]153 %acc = phi <4 x i32> [ %init, %entry ], [ %sel, %loop ]154 %nexti = sub i32 %i, 1155 156 %ptr = getelementptr <4 x i8>, ptr %base, i32 %i157 %val = load <4 x i8> , ptr %ptr158 %ext = sext <4 x i8> %val to <4 x i32>159 %add = add <4 x i32> %ext, %acc160 %cmp = icmp slt <4 x i32> %add, <i32 -10, i32 -11, i32 -12, i32 -13>161 %single = insertelement <4 x i32> undef, i32 %i, i32 0162 %limit = shufflevector <4 x i32> %single, <4 x i32> undef,163 <4 x i32> zeroinitializer164 %sel = select <4 x i1> %cmp, <4 x i32> %add, <4 x i32> %limit165 %trunc = trunc <4 x i32> %sel to <4 x i8>166 store <4 x i8> %trunc, ptr %ptr167 168 %test = icmp eq i32 %nexti, 0169 br i1 %test, label %loop, label %exit170 171exit:172 ret void173}174 175; Check that !tbaa information is preserved.176define void @f3(ptr %src, ptr %dst) {177; CHECK-LABEL: define void @f3(178; CHECK-SAME: ptr [[SRC:%.*]], ptr [[DST:%.*]]) {179; CHECK-NEXT: [[DST_I1:%.*]] = getelementptr i32, ptr [[DST]], i32 1180; CHECK-NEXT: [[DST_I2:%.*]] = getelementptr i32, ptr [[DST]], i32 2181; CHECK-NEXT: [[DST_I3:%.*]] = getelementptr i32, ptr [[DST]], i32 3182; CHECK-NEXT: [[VAL_I0:%.*]] = load i32, ptr [[SRC]], align 16, !tbaa [[SET1_TBAA0:![0-9]+]]183; CHECK-NEXT: [[SRC_I1:%.*]] = getelementptr i32, ptr [[SRC]], i32 1184; CHECK-NEXT: [[VAL_I1:%.*]] = load i32, ptr [[SRC_I1]], align 4, !tbaa [[SET1_TBAA0]]185; CHECK-NEXT: [[SRC_I2:%.*]] = getelementptr i32, ptr [[SRC]], i32 2186; CHECK-NEXT: [[VAL_I2:%.*]] = load i32, ptr [[SRC_I2]], align 8, !tbaa [[SET1_TBAA0]]187; CHECK-NEXT: [[SRC_I3:%.*]] = getelementptr i32, ptr [[SRC]], i32 3188; CHECK-NEXT: [[VAL_I3:%.*]] = load i32, ptr [[SRC_I3]], align 4, !tbaa [[SET1_TBAA0]]189; CHECK-NEXT: [[ADD_I0:%.*]] = add i32 [[VAL_I0]], [[VAL_I0]]190; CHECK-NEXT: [[ADD_I1:%.*]] = add i32 [[VAL_I1]], [[VAL_I1]]191; CHECK-NEXT: [[ADD_I2:%.*]] = add i32 [[VAL_I2]], [[VAL_I2]]192; CHECK-NEXT: [[ADD_I3:%.*]] = add i32 [[VAL_I3]], [[VAL_I3]]193; CHECK-NEXT: store i32 [[ADD_I0]], ptr [[DST]], align 16, !tbaa [[SET2_TBAA3:![0-9]+]]194; CHECK-NEXT: store i32 [[ADD_I1]], ptr [[DST_I1]], align 4, !tbaa [[SET2_TBAA3]]195; CHECK-NEXT: store i32 [[ADD_I2]], ptr [[DST_I2]], align 8, !tbaa [[SET2_TBAA3]]196; CHECK-NEXT: store i32 [[ADD_I3]], ptr [[DST_I3]], align 4, !tbaa [[SET2_TBAA3]]197; CHECK-NEXT: ret void198;199 %val = load <4 x i32> , ptr %src, !tbaa !1200 %add = add <4 x i32> %val, %val201 store <4 x i32> %add, ptr %dst, !tbaa !2202 ret void203}204 205; Check that !tbaa.struct information is preserved.206define void @f4(ptr %src, ptr %dst) {207; CHECK-LABEL: define void @f4(208; CHECK-SAME: ptr [[SRC:%.*]], ptr [[DST:%.*]]) {209; CHECK-NEXT: [[DST_I1:%.*]] = getelementptr i32, ptr [[DST]], i32 1210; CHECK-NEXT: [[DST_I2:%.*]] = getelementptr i32, ptr [[DST]], i32 2211; CHECK-NEXT: [[DST_I3:%.*]] = getelementptr i32, ptr [[DST]], i32 3212; CHECK-NEXT: [[VAL_I0:%.*]] = load i32, ptr [[SRC]], align 16, !tbaa.struct [[TBAA_STRUCT5:![0-9]+]]213; CHECK-NEXT: [[SRC_I1:%.*]] = getelementptr i32, ptr [[SRC]], i32 1214; CHECK-NEXT: [[VAL_I1:%.*]] = load i32, ptr [[SRC_I1]], align 4, !tbaa.struct [[TBAA_STRUCT5]]215; CHECK-NEXT: [[SRC_I2:%.*]] = getelementptr i32, ptr [[SRC]], i32 2216; CHECK-NEXT: [[VAL_I2:%.*]] = load i32, ptr [[SRC_I2]], align 8, !tbaa.struct [[TBAA_STRUCT5]]217; CHECK-NEXT: [[SRC_I3:%.*]] = getelementptr i32, ptr [[SRC]], i32 3218; CHECK-NEXT: [[VAL_I3:%.*]] = load i32, ptr [[SRC_I3]], align 4, !tbaa.struct [[TBAA_STRUCT5]]219; CHECK-NEXT: [[ADD_I0:%.*]] = add i32 [[VAL_I0]], [[VAL_I0]]220; CHECK-NEXT: [[ADD_I1:%.*]] = add i32 [[VAL_I1]], [[VAL_I1]]221; CHECK-NEXT: [[ADD_I2:%.*]] = add i32 [[VAL_I2]], [[VAL_I2]]222; CHECK-NEXT: [[ADD_I3:%.*]] = add i32 [[VAL_I3]], [[VAL_I3]]223; CHECK-NEXT: store i32 [[ADD_I0]], ptr [[DST]], align 16, !tbaa.struct [[TBAA_STRUCT5]]224; CHECK-NEXT: store i32 [[ADD_I1]], ptr [[DST_I1]], align 4, !tbaa.struct [[TBAA_STRUCT5]]225; CHECK-NEXT: store i32 [[ADD_I2]], ptr [[DST_I2]], align 8, !tbaa.struct [[TBAA_STRUCT5]]226; CHECK-NEXT: store i32 [[ADD_I3]], ptr [[DST_I3]], align 4, !tbaa.struct [[TBAA_STRUCT5]]227; CHECK-NEXT: ret void228;229 %val = load <4 x i32> , ptr %src, !tbaa.struct !5230 %add = add <4 x i32> %val, %val231 store <4 x i32> %add, ptr %dst, !tbaa.struct !5232 ret void233}234 235; Check that llvm.access.group information is preserved.236define void @f5(i32 %count, ptr %src, ptr %dst) {237; CHECK-LABEL: define void @f5(238; CHECK-SAME: i32 [[COUNT:%.*]], ptr [[SRC:%.*]], ptr [[DST:%.*]]) {239; CHECK-NEXT: [[ENTRY:.*]]:240; CHECK-NEXT: br label %[[LOOP:.*]]241; CHECK: [[LOOP]]:242; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[NEXT_INDEX:%.*]], %[[LOOP]] ]243; CHECK-NEXT: [[THIS_SRC:%.*]] = getelementptr <4 x i32>, ptr [[SRC]], i32 [[INDEX]]244; CHECK-NEXT: [[THIS_SRC_I1:%.*]] = getelementptr i32, ptr [[THIS_SRC]], i32 1245; CHECK-NEXT: [[THIS_SRC_I2:%.*]] = getelementptr i32, ptr [[THIS_SRC]], i32 2246; CHECK-NEXT: [[THIS_SRC_I3:%.*]] = getelementptr i32, ptr [[THIS_SRC]], i32 3247; CHECK-NEXT: [[THIS_DST:%.*]] = getelementptr <4 x i32>, ptr [[DST]], i32 [[INDEX]]248; CHECK-NEXT: [[THIS_DST_I1:%.*]] = getelementptr i32, ptr [[THIS_DST]], i32 1249; CHECK-NEXT: [[THIS_DST_I2:%.*]] = getelementptr i32, ptr [[THIS_DST]], i32 2250; CHECK-NEXT: [[THIS_DST_I3:%.*]] = getelementptr i32, ptr [[THIS_DST]], i32 3251; CHECK-NEXT: [[VAL_I0:%.*]] = load i32, ptr [[THIS_SRC]], align 16, !llvm.access.group [[ACC_GRP6:![0-9]+]]252; CHECK-NEXT: [[VAL_I1:%.*]] = load i32, ptr [[THIS_SRC_I1]], align 4, !llvm.access.group [[ACC_GRP6]]253; CHECK-NEXT: [[VAL_I2:%.*]] = load i32, ptr [[THIS_SRC_I2]], align 8, !llvm.access.group [[ACC_GRP6]]254; CHECK-NEXT: [[VAL_I3:%.*]] = load i32, ptr [[THIS_SRC_I3]], align 4, !llvm.access.group [[ACC_GRP6]]255; CHECK-NEXT: [[ADD_I0:%.*]] = add i32 [[VAL_I0]], [[VAL_I0]]256; CHECK-NEXT: [[ADD_I1:%.*]] = add i32 [[VAL_I1]], [[VAL_I1]]257; CHECK-NEXT: [[ADD_I2:%.*]] = add i32 [[VAL_I2]], [[VAL_I2]]258; CHECK-NEXT: [[ADD_I3:%.*]] = add i32 [[VAL_I3]], [[VAL_I3]]259; CHECK-NEXT: store i32 [[ADD_I0]], ptr [[THIS_DST]], align 16, !llvm.access.group [[ACC_GRP6]]260; CHECK-NEXT: store i32 [[ADD_I1]], ptr [[THIS_DST_I1]], align 4, !llvm.access.group [[ACC_GRP6]]261; CHECK-NEXT: store i32 [[ADD_I2]], ptr [[THIS_DST_I2]], align 8, !llvm.access.group [[ACC_GRP6]]262; CHECK-NEXT: store i32 [[ADD_I3]], ptr [[THIS_DST_I3]], align 4, !llvm.access.group [[ACC_GRP6]]263; CHECK-NEXT: [[NEXT_INDEX]] = add i32 [[INDEX]], -1264; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ne i32 [[NEXT_INDEX]], [[COUNT]]265; CHECK-NEXT: br i1 [[CONTINUE]], label %[[LOOP]], label %[[END:.*]], !llvm.loop [[LOOP7:![0-9]+]]266; CHECK: [[END]]:267; CHECK-NEXT: ret void268;269entry:270 br label %loop271 272loop:273 %index = phi i32 [ 0, %entry ], [ %next_index, %loop ]274 %this_src = getelementptr <4 x i32>, ptr %src, i32 %index275 %this_dst = getelementptr <4 x i32>, ptr %dst, i32 %index276 %val = load <4 x i32> , ptr %this_src, !llvm.access.group !13277 %add = add <4 x i32> %val, %val278 store <4 x i32> %add, ptr %this_dst, !llvm.access.group !13279 %next_index = add i32 %index, -1280 %continue = icmp ne i32 %next_index, %count281 br i1 %continue, label %loop, label %end, !llvm.loop !3282 283end:284 ret void285}286 287; Check that fpmath information is preserved.288define <4 x float> @f6(<4 x float> %x) {289; CHECK-LABEL: define <4 x float> @f6(290; CHECK-SAME: <4 x float> [[X:%.*]]) {291; CHECK-NEXT: [[X_I0:%.*]] = extractelement <4 x float> [[X]], i64 0292; CHECK-NEXT: [[RES_I0:%.*]] = fadd float [[X_I0]], 1.000000e+00, !fpmath [[META9:![0-9]+]]293; CHECK-NEXT: [[X_I1:%.*]] = extractelement <4 x float> [[X]], i64 1294; CHECK-NEXT: [[RES_I1:%.*]] = fadd float [[X_I1]], 2.000000e+00, !fpmath [[META9]]295; CHECK-NEXT: [[X_I2:%.*]] = extractelement <4 x float> [[X]], i64 2296; CHECK-NEXT: [[RES_I2:%.*]] = fadd float [[X_I2]], 3.000000e+00, !fpmath [[META9]]297; CHECK-NEXT: [[X_I3:%.*]] = extractelement <4 x float> [[X]], i64 3298; CHECK-NEXT: [[RES_I3:%.*]] = fadd float [[X_I3]], 4.000000e+00, !fpmath [[META9]]299; CHECK-NEXT: [[RES_UPTO0:%.*]] = insertelement <4 x float> poison, float [[RES_I0]], i64 0300; CHECK-NEXT: [[RES_UPTO1:%.*]] = insertelement <4 x float> [[RES_UPTO0]], float [[RES_I1]], i64 1301; CHECK-NEXT: [[RES_UPTO2:%.*]] = insertelement <4 x float> [[RES_UPTO1]], float [[RES_I2]], i64 2302; CHECK-NEXT: [[RES:%.*]] = insertelement <4 x float> [[RES_UPTO2]], float [[RES_I3]], i64 3303; CHECK-NEXT: ret <4 x float> [[RES]]304;305 %res = fadd <4 x float> %x, <float 1.0, float 2.0, float 3.0, float 4.0>,306 !fpmath !4307 ret <4 x float> %res308}309 310; Check that random metadata isn't kept.311define void @f7(ptr %src, ptr %dst) {312; CHECK-LABEL: define void @f7(313; CHECK-SAME: ptr [[SRC:%.*]], ptr [[DST:%.*]]) {314; CHECK-NEXT: [[DST_I1:%.*]] = getelementptr i32, ptr [[DST]], i32 1315; CHECK-NEXT: [[DST_I2:%.*]] = getelementptr i32, ptr [[DST]], i32 2316; CHECK-NEXT: [[DST_I3:%.*]] = getelementptr i32, ptr [[DST]], i32 3317; CHECK-NEXT: [[VAL_I0:%.*]] = load i32, ptr [[SRC]], align 16318; CHECK-NEXT: [[SRC_I1:%.*]] = getelementptr i32, ptr [[SRC]], i32 1319; CHECK-NEXT: [[VAL_I1:%.*]] = load i32, ptr [[SRC_I1]], align 4320; CHECK-NEXT: [[SRC_I2:%.*]] = getelementptr i32, ptr [[SRC]], i32 2321; CHECK-NEXT: [[VAL_I2:%.*]] = load i32, ptr [[SRC_I2]], align 8322; CHECK-NEXT: [[SRC_I3:%.*]] = getelementptr i32, ptr [[SRC]], i32 3323; CHECK-NEXT: [[VAL_I3:%.*]] = load i32, ptr [[SRC_I3]], align 4324; CHECK-NEXT: [[ADD_I0:%.*]] = add i32 [[VAL_I0]], [[VAL_I0]]325; CHECK-NEXT: [[ADD_I1:%.*]] = add i32 [[VAL_I1]], [[VAL_I1]]326; CHECK-NEXT: [[ADD_I2:%.*]] = add i32 [[VAL_I2]], [[VAL_I2]]327; CHECK-NEXT: [[ADD_I3:%.*]] = add i32 [[VAL_I3]], [[VAL_I3]]328; CHECK-NEXT: store i32 [[ADD_I0]], ptr [[DST]], align 16329; CHECK-NEXT: store i32 [[ADD_I1]], ptr [[DST_I1]], align 4330; CHECK-NEXT: store i32 [[ADD_I2]], ptr [[DST_I2]], align 8331; CHECK-NEXT: store i32 [[ADD_I3]], ptr [[DST_I3]], align 4332; CHECK-NEXT: ret void333;334 %val = load <4 x i32> , ptr %src, !foo !5335 %add = add <4 x i32> %val, %val336 store <4 x i32> %add, ptr %dst, !foo !5337 ret void338}339 340; Test GEP with vectors.341define void @f8(ptr %dest, <4 x ptr> %ptr0, <4 x i32> %i0,342; CHECK-LABEL: define void @f8(343; CHECK-SAME: ptr [[DEST:%.*]], <4 x ptr> [[PTR0:%.*]], <4 x i32> [[I0:%.*]], ptr [[OTHER:%.*]]) {344; CHECK-NEXT: [[DEST_I1:%.*]] = getelementptr ptr, ptr [[DEST]], i32 1345; CHECK-NEXT: [[DEST_I2:%.*]] = getelementptr ptr, ptr [[DEST]], i32 2346; CHECK-NEXT: [[DEST_I3:%.*]] = getelementptr ptr, ptr [[DEST]], i32 3347; CHECK-NEXT: [[PTR0_I0:%.*]] = extractelement <4 x ptr> [[PTR0]], i64 0348; CHECK-NEXT: [[PTR0_I2:%.*]] = extractelement <4 x ptr> [[PTR0]], i64 2349; CHECK-NEXT: [[PTR0_I3:%.*]] = extractelement <4 x ptr> [[PTR0]], i64 3350; CHECK-NEXT: [[I0_I1:%.*]] = extractelement <4 x i32> [[I0]], i64 1351; CHECK-NEXT: [[I0_I3:%.*]] = extractelement <4 x i32> [[I0]], i64 3352; CHECK-NEXT: [[VAL_I0:%.*]] = getelementptr float, ptr [[PTR0_I0]], i32 100353; CHECK-NEXT: [[VAL_I1:%.*]] = getelementptr float, ptr [[OTHER]], i32 [[I0_I1]]354; CHECK-NEXT: [[VAL_I2:%.*]] = getelementptr float, ptr [[PTR0_I2]], i32 100355; CHECK-NEXT: [[VAL_I3:%.*]] = getelementptr float, ptr [[PTR0_I3]], i32 [[I0_I3]]356; CHECK-NEXT: store ptr [[VAL_I0]], ptr [[DEST]], align 32357; CHECK-NEXT: store ptr [[VAL_I1]], ptr [[DEST_I1]], align 8358; CHECK-NEXT: store ptr [[VAL_I2]], ptr [[DEST_I2]], align 16359; CHECK-NEXT: store ptr [[VAL_I3]], ptr [[DEST_I3]], align 8360; CHECK-NEXT: ret void361;362 ptr %other) {363 %i1 = insertelement <4 x i32> %i0, i32 100, i32 0364 %i2 = insertelement <4 x i32> %i1, i32 100, i32 2365 %ptr1 = insertelement <4 x ptr> %ptr0, ptr %other, i32 1366 %val = getelementptr float, <4 x ptr> %ptr1, <4 x i32> %i2367 store <4 x ptr> %val, ptr %dest368 ret void369}370 371; Test the handling of unaligned loads.372define void @f9(ptr %dest, ptr %src) {373; CHECK-LABEL: define void @f9(374; CHECK-SAME: ptr [[DEST:%.*]], ptr [[SRC:%.*]]) {375; CHECK-NEXT: [[DEST_I1:%.*]] = getelementptr float, ptr [[DEST]], i32 1376; CHECK-NEXT: [[DEST_I2:%.*]] = getelementptr float, ptr [[DEST]], i32 2377; CHECK-NEXT: [[DEST_I3:%.*]] = getelementptr float, ptr [[DEST]], i32 3378; CHECK-NEXT: [[VAL_I0:%.*]] = load float, ptr [[SRC]], align 4379; CHECK-NEXT: [[SRC_I1:%.*]] = getelementptr float, ptr [[SRC]], i32 1380; CHECK-NEXT: [[VAL_I1:%.*]] = load float, ptr [[SRC_I1]], align 4381; CHECK-NEXT: [[SRC_I2:%.*]] = getelementptr float, ptr [[SRC]], i32 2382; CHECK-NEXT: [[VAL_I2:%.*]] = load float, ptr [[SRC_I2]], align 4383; CHECK-NEXT: [[SRC_I3:%.*]] = getelementptr float, ptr [[SRC]], i32 3384; CHECK-NEXT: [[VAL_I3:%.*]] = load float, ptr [[SRC_I3]], align 4385; CHECK-NEXT: store float [[VAL_I0]], ptr [[DEST]], align 8386; CHECK-NEXT: store float [[VAL_I1]], ptr [[DEST_I1]], align 4387; CHECK-NEXT: store float [[VAL_I2]], ptr [[DEST_I2]], align 8388; CHECK-NEXT: store float [[VAL_I3]], ptr [[DEST_I3]], align 4389; CHECK-NEXT: ret void390;391 %val = load <4 x float> , ptr %src, align 4392 store <4 x float> %val, ptr %dest, align 8393 ret void394}395 396; ...and again with subelement alignment.397define void @f10(ptr %dest, ptr %src) {398; CHECK-LABEL: define void @f10(399; CHECK-SAME: ptr [[DEST:%.*]], ptr [[SRC:%.*]]) {400; CHECK-NEXT: [[DEST_I1:%.*]] = getelementptr float, ptr [[DEST]], i32 1401; CHECK-NEXT: [[DEST_I2:%.*]] = getelementptr float, ptr [[DEST]], i32 2402; CHECK-NEXT: [[DEST_I3:%.*]] = getelementptr float, ptr [[DEST]], i32 3403; CHECK-NEXT: [[VAL_I0:%.*]] = load float, ptr [[SRC]], align 1404; CHECK-NEXT: [[SRC_I1:%.*]] = getelementptr float, ptr [[SRC]], i32 1405; CHECK-NEXT: [[VAL_I1:%.*]] = load float, ptr [[SRC_I1]], align 1406; CHECK-NEXT: [[SRC_I2:%.*]] = getelementptr float, ptr [[SRC]], i32 2407; CHECK-NEXT: [[VAL_I2:%.*]] = load float, ptr [[SRC_I2]], align 1408; CHECK-NEXT: [[SRC_I3:%.*]] = getelementptr float, ptr [[SRC]], i32 3409; CHECK-NEXT: [[VAL_I3:%.*]] = load float, ptr [[SRC_I3]], align 1410; CHECK-NEXT: store float [[VAL_I0]], ptr [[DEST]], align 2411; CHECK-NEXT: store float [[VAL_I1]], ptr [[DEST_I1]], align 2412; CHECK-NEXT: store float [[VAL_I2]], ptr [[DEST_I2]], align 2413; CHECK-NEXT: store float [[VAL_I3]], ptr [[DEST_I3]], align 2414; CHECK-NEXT: ret void415;416 %val = load <4 x float> , ptr %src, align 1417 store <4 x float> %val, ptr %dest, align 2418 ret void419}420 421; Test that sub-byte loads aren't scalarized.422define void @f11(ptr %dest, ptr %src0) {423; CHECK-LABEL: define void @f11(424; CHECK-SAME: ptr [[DEST:%.*]], ptr [[SRC0:%.*]]) {425; CHECK-NEXT: [[SRC1:%.*]] = getelementptr <32 x i1>, ptr [[SRC0]], i32 1426; CHECK-NEXT: [[VAL0:%.*]] = load <32 x i1>, ptr [[SRC0]], align 4427; CHECK-NEXT: [[VAL0_I0:%.*]] = extractelement <32 x i1> [[VAL0]], i64 0428; CHECK-NEXT: [[VAL0_I1:%.*]] = extractelement <32 x i1> [[VAL0]], i64 1429; CHECK-NEXT: [[VAL0_I2:%.*]] = extractelement <32 x i1> [[VAL0]], i64 2430; CHECK-NEXT: [[VAL0_I3:%.*]] = extractelement <32 x i1> [[VAL0]], i64 3431; CHECK-NEXT: [[VAL0_I4:%.*]] = extractelement <32 x i1> [[VAL0]], i64 4432; CHECK-NEXT: [[VAL0_I5:%.*]] = extractelement <32 x i1> [[VAL0]], i64 5433; CHECK-NEXT: [[VAL0_I6:%.*]] = extractelement <32 x i1> [[VAL0]], i64 6434; CHECK-NEXT: [[VAL0_I7:%.*]] = extractelement <32 x i1> [[VAL0]], i64 7435; CHECK-NEXT: [[VAL0_I8:%.*]] = extractelement <32 x i1> [[VAL0]], i64 8436; CHECK-NEXT: [[VAL0_I9:%.*]] = extractelement <32 x i1> [[VAL0]], i64 9437; CHECK-NEXT: [[VAL0_I10:%.*]] = extractelement <32 x i1> [[VAL0]], i64 10438; CHECK-NEXT: [[VAL0_I11:%.*]] = extractelement <32 x i1> [[VAL0]], i64 11439; CHECK-NEXT: [[VAL0_I12:%.*]] = extractelement <32 x i1> [[VAL0]], i64 12440; CHECK-NEXT: [[VAL0_I13:%.*]] = extractelement <32 x i1> [[VAL0]], i64 13441; CHECK-NEXT: [[VAL0_I14:%.*]] = extractelement <32 x i1> [[VAL0]], i64 14442; CHECK-NEXT: [[VAL0_I15:%.*]] = extractelement <32 x i1> [[VAL0]], i64 15443; CHECK-NEXT: [[VAL0_I16:%.*]] = extractelement <32 x i1> [[VAL0]], i64 16444; CHECK-NEXT: [[VAL0_I17:%.*]] = extractelement <32 x i1> [[VAL0]], i64 17445; CHECK-NEXT: [[VAL0_I18:%.*]] = extractelement <32 x i1> [[VAL0]], i64 18446; CHECK-NEXT: [[VAL0_I19:%.*]] = extractelement <32 x i1> [[VAL0]], i64 19447; CHECK-NEXT: [[VAL0_I20:%.*]] = extractelement <32 x i1> [[VAL0]], i64 20448; CHECK-NEXT: [[VAL0_I21:%.*]] = extractelement <32 x i1> [[VAL0]], i64 21449; CHECK-NEXT: [[VAL0_I22:%.*]] = extractelement <32 x i1> [[VAL0]], i64 22450; CHECK-NEXT: [[VAL0_I23:%.*]] = extractelement <32 x i1> [[VAL0]], i64 23451; CHECK-NEXT: [[VAL0_I24:%.*]] = extractelement <32 x i1> [[VAL0]], i64 24452; CHECK-NEXT: [[VAL0_I25:%.*]] = extractelement <32 x i1> [[VAL0]], i64 25453; CHECK-NEXT: [[VAL0_I26:%.*]] = extractelement <32 x i1> [[VAL0]], i64 26454; CHECK-NEXT: [[VAL0_I27:%.*]] = extractelement <32 x i1> [[VAL0]], i64 27455; CHECK-NEXT: [[VAL0_I28:%.*]] = extractelement <32 x i1> [[VAL0]], i64 28456; CHECK-NEXT: [[VAL0_I29:%.*]] = extractelement <32 x i1> [[VAL0]], i64 29457; CHECK-NEXT: [[VAL0_I30:%.*]] = extractelement <32 x i1> [[VAL0]], i64 30458; CHECK-NEXT: [[VAL0_I31:%.*]] = extractelement <32 x i1> [[VAL0]], i64 31459; CHECK-NEXT: [[VAL1:%.*]] = load <32 x i1>, ptr [[SRC1]], align 4460; CHECK-NEXT: [[VAL1_I0:%.*]] = extractelement <32 x i1> [[VAL1]], i64 0461; CHECK-NEXT: [[AND_I0:%.*]] = and i1 [[VAL0_I0]], [[VAL1_I0]]462; CHECK-NEXT: [[VAL1_I1:%.*]] = extractelement <32 x i1> [[VAL1]], i64 1463; CHECK-NEXT: [[AND_I1:%.*]] = and i1 [[VAL0_I1]], [[VAL1_I1]]464; CHECK-NEXT: [[VAL1_I2:%.*]] = extractelement <32 x i1> [[VAL1]], i64 2465; CHECK-NEXT: [[AND_I2:%.*]] = and i1 [[VAL0_I2]], [[VAL1_I2]]466; CHECK-NEXT: [[VAL1_I3:%.*]] = extractelement <32 x i1> [[VAL1]], i64 3467; CHECK-NEXT: [[AND_I3:%.*]] = and i1 [[VAL0_I3]], [[VAL1_I3]]468; CHECK-NEXT: [[VAL1_I4:%.*]] = extractelement <32 x i1> [[VAL1]], i64 4469; CHECK-NEXT: [[AND_I4:%.*]] = and i1 [[VAL0_I4]], [[VAL1_I4]]470; CHECK-NEXT: [[VAL1_I5:%.*]] = extractelement <32 x i1> [[VAL1]], i64 5471; CHECK-NEXT: [[AND_I5:%.*]] = and i1 [[VAL0_I5]], [[VAL1_I5]]472; CHECK-NEXT: [[VAL1_I6:%.*]] = extractelement <32 x i1> [[VAL1]], i64 6473; CHECK-NEXT: [[AND_I6:%.*]] = and i1 [[VAL0_I6]], [[VAL1_I6]]474; CHECK-NEXT: [[VAL1_I7:%.*]] = extractelement <32 x i1> [[VAL1]], i64 7475; CHECK-NEXT: [[AND_I7:%.*]] = and i1 [[VAL0_I7]], [[VAL1_I7]]476; CHECK-NEXT: [[VAL1_I8:%.*]] = extractelement <32 x i1> [[VAL1]], i64 8477; CHECK-NEXT: [[AND_I8:%.*]] = and i1 [[VAL0_I8]], [[VAL1_I8]]478; CHECK-NEXT: [[VAL1_I9:%.*]] = extractelement <32 x i1> [[VAL1]], i64 9479; CHECK-NEXT: [[AND_I9:%.*]] = and i1 [[VAL0_I9]], [[VAL1_I9]]480; CHECK-NEXT: [[VAL1_I10:%.*]] = extractelement <32 x i1> [[VAL1]], i64 10481; CHECK-NEXT: [[AND_I10:%.*]] = and i1 [[VAL0_I10]], [[VAL1_I10]]482; CHECK-NEXT: [[VAL1_I11:%.*]] = extractelement <32 x i1> [[VAL1]], i64 11483; CHECK-NEXT: [[AND_I11:%.*]] = and i1 [[VAL0_I11]], [[VAL1_I11]]484; CHECK-NEXT: [[VAL1_I12:%.*]] = extractelement <32 x i1> [[VAL1]], i64 12485; CHECK-NEXT: [[AND_I12:%.*]] = and i1 [[VAL0_I12]], [[VAL1_I12]]486; CHECK-NEXT: [[VAL1_I13:%.*]] = extractelement <32 x i1> [[VAL1]], i64 13487; CHECK-NEXT: [[AND_I13:%.*]] = and i1 [[VAL0_I13]], [[VAL1_I13]]488; CHECK-NEXT: [[VAL1_I14:%.*]] = extractelement <32 x i1> [[VAL1]], i64 14489; CHECK-NEXT: [[AND_I14:%.*]] = and i1 [[VAL0_I14]], [[VAL1_I14]]490; CHECK-NEXT: [[VAL1_I15:%.*]] = extractelement <32 x i1> [[VAL1]], i64 15491; CHECK-NEXT: [[AND_I15:%.*]] = and i1 [[VAL0_I15]], [[VAL1_I15]]492; CHECK-NEXT: [[VAL1_I16:%.*]] = extractelement <32 x i1> [[VAL1]], i64 16493; CHECK-NEXT: [[AND_I16:%.*]] = and i1 [[VAL0_I16]], [[VAL1_I16]]494; CHECK-NEXT: [[VAL1_I17:%.*]] = extractelement <32 x i1> [[VAL1]], i64 17495; CHECK-NEXT: [[AND_I17:%.*]] = and i1 [[VAL0_I17]], [[VAL1_I17]]496; CHECK-NEXT: [[VAL1_I18:%.*]] = extractelement <32 x i1> [[VAL1]], i64 18497; CHECK-NEXT: [[AND_I18:%.*]] = and i1 [[VAL0_I18]], [[VAL1_I18]]498; CHECK-NEXT: [[VAL1_I19:%.*]] = extractelement <32 x i1> [[VAL1]], i64 19499; CHECK-NEXT: [[AND_I19:%.*]] = and i1 [[VAL0_I19]], [[VAL1_I19]]500; CHECK-NEXT: [[VAL1_I20:%.*]] = extractelement <32 x i1> [[VAL1]], i64 20501; CHECK-NEXT: [[AND_I20:%.*]] = and i1 [[VAL0_I20]], [[VAL1_I20]]502; CHECK-NEXT: [[VAL1_I21:%.*]] = extractelement <32 x i1> [[VAL1]], i64 21503; CHECK-NEXT: [[AND_I21:%.*]] = and i1 [[VAL0_I21]], [[VAL1_I21]]504; CHECK-NEXT: [[VAL1_I22:%.*]] = extractelement <32 x i1> [[VAL1]], i64 22505; CHECK-NEXT: [[AND_I22:%.*]] = and i1 [[VAL0_I22]], [[VAL1_I22]]506; CHECK-NEXT: [[VAL1_I23:%.*]] = extractelement <32 x i1> [[VAL1]], i64 23507; CHECK-NEXT: [[AND_I23:%.*]] = and i1 [[VAL0_I23]], [[VAL1_I23]]508; CHECK-NEXT: [[VAL1_I24:%.*]] = extractelement <32 x i1> [[VAL1]], i64 24509; CHECK-NEXT: [[AND_I24:%.*]] = and i1 [[VAL0_I24]], [[VAL1_I24]]510; CHECK-NEXT: [[VAL1_I25:%.*]] = extractelement <32 x i1> [[VAL1]], i64 25511; CHECK-NEXT: [[AND_I25:%.*]] = and i1 [[VAL0_I25]], [[VAL1_I25]]512; CHECK-NEXT: [[VAL1_I26:%.*]] = extractelement <32 x i1> [[VAL1]], i64 26513; CHECK-NEXT: [[AND_I26:%.*]] = and i1 [[VAL0_I26]], [[VAL1_I26]]514; CHECK-NEXT: [[VAL1_I27:%.*]] = extractelement <32 x i1> [[VAL1]], i64 27515; CHECK-NEXT: [[AND_I27:%.*]] = and i1 [[VAL0_I27]], [[VAL1_I27]]516; CHECK-NEXT: [[VAL1_I28:%.*]] = extractelement <32 x i1> [[VAL1]], i64 28517; CHECK-NEXT: [[AND_I28:%.*]] = and i1 [[VAL0_I28]], [[VAL1_I28]]518; CHECK-NEXT: [[VAL1_I29:%.*]] = extractelement <32 x i1> [[VAL1]], i64 29519; CHECK-NEXT: [[AND_I29:%.*]] = and i1 [[VAL0_I29]], [[VAL1_I29]]520; CHECK-NEXT: [[VAL1_I30:%.*]] = extractelement <32 x i1> [[VAL1]], i64 30521; CHECK-NEXT: [[AND_I30:%.*]] = and i1 [[VAL0_I30]], [[VAL1_I30]]522; CHECK-NEXT: [[VAL1_I31:%.*]] = extractelement <32 x i1> [[VAL1]], i64 31523; CHECK-NEXT: [[AND_I31:%.*]] = and i1 [[VAL0_I31]], [[VAL1_I31]]524; CHECK-NEXT: [[AND_UPTO0:%.*]] = insertelement <32 x i1> poison, i1 [[AND_I0]], i64 0525; CHECK-NEXT: [[AND_UPTO1:%.*]] = insertelement <32 x i1> [[AND_UPTO0]], i1 [[AND_I1]], i64 1526; CHECK-NEXT: [[AND_UPTO2:%.*]] = insertelement <32 x i1> [[AND_UPTO1]], i1 [[AND_I2]], i64 2527; CHECK-NEXT: [[AND_UPTO3:%.*]] = insertelement <32 x i1> [[AND_UPTO2]], i1 [[AND_I3]], i64 3528; CHECK-NEXT: [[AND_UPTO4:%.*]] = insertelement <32 x i1> [[AND_UPTO3]], i1 [[AND_I4]], i64 4529; CHECK-NEXT: [[AND_UPTO5:%.*]] = insertelement <32 x i1> [[AND_UPTO4]], i1 [[AND_I5]], i64 5530; CHECK-NEXT: [[AND_UPTO6:%.*]] = insertelement <32 x i1> [[AND_UPTO5]], i1 [[AND_I6]], i64 6531; CHECK-NEXT: [[AND_UPTO7:%.*]] = insertelement <32 x i1> [[AND_UPTO6]], i1 [[AND_I7]], i64 7532; CHECK-NEXT: [[AND_UPTO8:%.*]] = insertelement <32 x i1> [[AND_UPTO7]], i1 [[AND_I8]], i64 8533; CHECK-NEXT: [[AND_UPTO9:%.*]] = insertelement <32 x i1> [[AND_UPTO8]], i1 [[AND_I9]], i64 9534; CHECK-NEXT: [[AND_UPTO10:%.*]] = insertelement <32 x i1> [[AND_UPTO9]], i1 [[AND_I10]], i64 10535; CHECK-NEXT: [[AND_UPTO11:%.*]] = insertelement <32 x i1> [[AND_UPTO10]], i1 [[AND_I11]], i64 11536; CHECK-NEXT: [[AND_UPTO12:%.*]] = insertelement <32 x i1> [[AND_UPTO11]], i1 [[AND_I12]], i64 12537; CHECK-NEXT: [[AND_UPTO13:%.*]] = insertelement <32 x i1> [[AND_UPTO12]], i1 [[AND_I13]], i64 13538; CHECK-NEXT: [[AND_UPTO14:%.*]] = insertelement <32 x i1> [[AND_UPTO13]], i1 [[AND_I14]], i64 14539; CHECK-NEXT: [[AND_UPTO15:%.*]] = insertelement <32 x i1> [[AND_UPTO14]], i1 [[AND_I15]], i64 15540; CHECK-NEXT: [[AND_UPTO16:%.*]] = insertelement <32 x i1> [[AND_UPTO15]], i1 [[AND_I16]], i64 16541; CHECK-NEXT: [[AND_UPTO17:%.*]] = insertelement <32 x i1> [[AND_UPTO16]], i1 [[AND_I17]], i64 17542; CHECK-NEXT: [[AND_UPTO18:%.*]] = insertelement <32 x i1> [[AND_UPTO17]], i1 [[AND_I18]], i64 18543; CHECK-NEXT: [[AND_UPTO19:%.*]] = insertelement <32 x i1> [[AND_UPTO18]], i1 [[AND_I19]], i64 19544; CHECK-NEXT: [[AND_UPTO20:%.*]] = insertelement <32 x i1> [[AND_UPTO19]], i1 [[AND_I20]], i64 20545; CHECK-NEXT: [[AND_UPTO21:%.*]] = insertelement <32 x i1> [[AND_UPTO20]], i1 [[AND_I21]], i64 21546; CHECK-NEXT: [[AND_UPTO22:%.*]] = insertelement <32 x i1> [[AND_UPTO21]], i1 [[AND_I22]], i64 22547; CHECK-NEXT: [[AND_UPTO23:%.*]] = insertelement <32 x i1> [[AND_UPTO22]], i1 [[AND_I23]], i64 23548; CHECK-NEXT: [[AND_UPTO24:%.*]] = insertelement <32 x i1> [[AND_UPTO23]], i1 [[AND_I24]], i64 24549; CHECK-NEXT: [[AND_UPTO25:%.*]] = insertelement <32 x i1> [[AND_UPTO24]], i1 [[AND_I25]], i64 25550; CHECK-NEXT: [[AND_UPTO26:%.*]] = insertelement <32 x i1> [[AND_UPTO25]], i1 [[AND_I26]], i64 26551; CHECK-NEXT: [[AND_UPTO27:%.*]] = insertelement <32 x i1> [[AND_UPTO26]], i1 [[AND_I27]], i64 27552; CHECK-NEXT: [[AND_UPTO28:%.*]] = insertelement <32 x i1> [[AND_UPTO27]], i1 [[AND_I28]], i64 28553; CHECK-NEXT: [[AND_UPTO29:%.*]] = insertelement <32 x i1> [[AND_UPTO28]], i1 [[AND_I29]], i64 29554; CHECK-NEXT: [[AND_UPTO30:%.*]] = insertelement <32 x i1> [[AND_UPTO29]], i1 [[AND_I30]], i64 30555; CHECK-NEXT: [[AND:%.*]] = insertelement <32 x i1> [[AND_UPTO30]], i1 [[AND_I31]], i64 31556; CHECK-NEXT: store <32 x i1> [[AND]], ptr [[DEST]], align 4557; CHECK-NEXT: ret void558;559 %src1 = getelementptr <32 x i1>, ptr %src0, i32 1560 %val0 = load <32 x i1> , ptr %src0561 %val1 = load <32 x i1> , ptr %src1562 %and = and <32 x i1> %val0, %val1563 store <32 x i1> %and, ptr %dest564 ret void565}566 567; Test vector GEPs with more than one index.568define void @f13(ptr %dest, <4 x ptr> %ptr, <4 x i32> %i,569; CHECK-LABEL: define void @f13(570; CHECK-SAME: ptr [[DEST:%.*]], <4 x ptr> [[PTR:%.*]], <4 x i32> [[I:%.*]], ptr [[OTHER:%.*]]) {571; CHECK-NEXT: [[DEST_I1:%.*]] = getelementptr ptr, ptr [[DEST]], i32 1572; CHECK-NEXT: [[DEST_I2:%.*]] = getelementptr ptr, ptr [[DEST]], i32 2573; CHECK-NEXT: [[DEST_I3:%.*]] = getelementptr ptr, ptr [[DEST]], i32 3574; CHECK-NEXT: [[PTR_I0:%.*]] = extractelement <4 x ptr> [[PTR]], i64 0575; CHECK-NEXT: [[I_I0:%.*]] = extractelement <4 x i32> [[I]], i64 0576; CHECK-NEXT: [[VAL_I0:%.*]] = getelementptr inbounds [4 x float], ptr [[PTR_I0]], i32 0, i32 [[I_I0]]577; CHECK-NEXT: [[PTR_I1:%.*]] = extractelement <4 x ptr> [[PTR]], i64 1578; CHECK-NEXT: [[I_I1:%.*]] = extractelement <4 x i32> [[I]], i64 1579; CHECK-NEXT: [[VAL_I1:%.*]] = getelementptr inbounds [4 x float], ptr [[PTR_I1]], i32 1, i32 [[I_I1]]580; CHECK-NEXT: [[PTR_I2:%.*]] = extractelement <4 x ptr> [[PTR]], i64 2581; CHECK-NEXT: [[I_I2:%.*]] = extractelement <4 x i32> [[I]], i64 2582; CHECK-NEXT: [[VAL_I2:%.*]] = getelementptr inbounds [4 x float], ptr [[PTR_I2]], i32 2, i32 [[I_I2]]583; CHECK-NEXT: [[PTR_I3:%.*]] = extractelement <4 x ptr> [[PTR]], i64 3584; CHECK-NEXT: [[I_I3:%.*]] = extractelement <4 x i32> [[I]], i64 3585; CHECK-NEXT: [[VAL_I3:%.*]] = getelementptr inbounds [4 x float], ptr [[PTR_I3]], i32 3, i32 [[I_I3]]586; CHECK-NEXT: store ptr [[VAL_I0]], ptr [[DEST]], align 32587; CHECK-NEXT: store ptr [[VAL_I1]], ptr [[DEST_I1]], align 8588; CHECK-NEXT: store ptr [[VAL_I2]], ptr [[DEST_I2]], align 16589; CHECK-NEXT: store ptr [[VAL_I3]], ptr [[DEST_I3]], align 8590; CHECK-NEXT: ret void591;592 ptr %other) {593 %val = getelementptr inbounds [4 x float], <4 x ptr> %ptr,594 <4 x i32> <i32 0, i32 1, i32 2, i32 3>,595 <4 x i32> %i596 store <4 x ptr> %val, ptr %dest597 ret void598}599 600; Test combinations of vector and non-vector PHIs.601define <4 x float> @f14(<4 x float> %acc, i32 %count) {602; CHECK-LABEL: define <4 x float> @f14(603; CHECK-SAME: <4 x float> [[ACC:%.*]], i32 [[COUNT:%.*]]) {604; CHECK-NEXT: [[ENTRY:.*]]:605; CHECK-NEXT: [[ACC_I0:%.*]] = extractelement <4 x float> [[ACC]], i64 0606; CHECK-NEXT: [[ACC_I1:%.*]] = extractelement <4 x float> [[ACC]], i64 1607; CHECK-NEXT: [[ACC_I2:%.*]] = extractelement <4 x float> [[ACC]], i64 2608; CHECK-NEXT: [[ACC_I3:%.*]] = extractelement <4 x float> [[ACC]], i64 3609; CHECK-NEXT: br label %[[LOOP:.*]]610; CHECK: [[LOOP]]:611; CHECK-NEXT: [[THIS_ACC_I0:%.*]] = phi float [ [[ACC_I0]], %[[ENTRY]] ], [ [[NEXT_ACC_I0:%.*]], %[[LOOP]] ]612; CHECK-NEXT: [[THIS_ACC_I1:%.*]] = phi float [ [[ACC_I1]], %[[ENTRY]] ], [ [[NEXT_ACC_I1:%.*]], %[[LOOP]] ]613; CHECK-NEXT: [[THIS_ACC_I2:%.*]] = phi float [ [[ACC_I2]], %[[ENTRY]] ], [ [[NEXT_ACC_I2:%.*]], %[[LOOP]] ]614; CHECK-NEXT: [[THIS_ACC_I3:%.*]] = phi float [ [[ACC_I3]], %[[ENTRY]] ], [ [[NEXT_ACC_I3:%.*]], %[[LOOP]] ]615; CHECK-NEXT: [[THIS_COUNT:%.*]] = phi i32 [ [[COUNT]], %[[ENTRY]] ], [ [[NEXT_COUNT:%.*]], %[[LOOP]] ]616; CHECK-NEXT: [[THIS_ACC_UPTO0:%.*]] = insertelement <4 x float> poison, float [[THIS_ACC_I0]], i64 0617; CHECK-NEXT: [[THIS_ACC_UPTO1:%.*]] = insertelement <4 x float> [[THIS_ACC_UPTO0]], float [[THIS_ACC_I1]], i64 1618; CHECK-NEXT: [[THIS_ACC_UPTO2:%.*]] = insertelement <4 x float> [[THIS_ACC_UPTO1]], float [[THIS_ACC_I2]], i64 2619; CHECK-NEXT: [[THIS_ACC:%.*]] = insertelement <4 x float> [[THIS_ACC_UPTO2]], float [[THIS_ACC_I3]], i64 3620; CHECK-NEXT: [[FOO:%.*]] = call <4 x float> @ext(<4 x float> [[THIS_ACC]])621; CHECK-NEXT: [[FOO_I0:%.*]] = extractelement <4 x float> [[FOO]], i64 0622; CHECK-NEXT: [[NEXT_ACC_I0]] = fadd float [[THIS_ACC_I0]], [[FOO_I0]]623; CHECK-NEXT: [[FOO_I1:%.*]] = extractelement <4 x float> [[FOO]], i64 1624; CHECK-NEXT: [[NEXT_ACC_I1]] = fadd float [[THIS_ACC_I1]], [[FOO_I1]]625; CHECK-NEXT: [[FOO_I2:%.*]] = extractelement <4 x float> [[FOO]], i64 2626; CHECK-NEXT: [[NEXT_ACC_I2]] = fadd float [[THIS_ACC_I2]], [[FOO_I2]]627; CHECK-NEXT: [[FOO_I3:%.*]] = extractelement <4 x float> [[FOO]], i64 3628; CHECK-NEXT: [[NEXT_ACC_I3]] = fadd float [[THIS_ACC_I3]], [[FOO_I3]]629; CHECK-NEXT: [[NEXT_ACC_UPTO0:%.*]] = insertelement <4 x float> poison, float [[NEXT_ACC_I0]], i64 0630; CHECK-NEXT: [[NEXT_ACC_UPTO1:%.*]] = insertelement <4 x float> [[NEXT_ACC_UPTO0]], float [[NEXT_ACC_I1]], i64 1631; CHECK-NEXT: [[NEXT_ACC_UPTO2:%.*]] = insertelement <4 x float> [[NEXT_ACC_UPTO1]], float [[NEXT_ACC_I2]], i64 2632; CHECK-NEXT: [[NEXT_ACC:%.*]] = insertelement <4 x float> [[NEXT_ACC_UPTO2]], float [[NEXT_ACC_I3]], i64 3633; CHECK-NEXT: [[NEXT_COUNT]] = sub i32 [[THIS_COUNT]], 1634; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[NEXT_COUNT]], 0635; CHECK-NEXT: br i1 [[CMP]], label %[[LOOP]], label %[[EXIT:.*]]636; CHECK: [[EXIT]]:637; CHECK-NEXT: ret <4 x float> [[NEXT_ACC]]638;639entry:640 br label %loop641 642loop:643 %this_acc = phi <4 x float> [ %acc, %entry ], [ %next_acc, %loop ]644 %this_count = phi i32 [ %count, %entry ], [ %next_count, %loop ]645 %foo = call <4 x float> @ext(<4 x float> %this_acc)646 %next_acc = fadd <4 x float> %this_acc, %foo647 %next_count = sub i32 %this_count, 1648 %cmp = icmp eq i32 %next_count, 0649 br i1 %cmp, label %loop, label %exit650 651exit:652 ret <4 x float> %next_acc653}654 655; Test unary operator scalarization.656define void @f15(<4 x float> %init, ptr %base, i32 %count) {657; CHECK-LABEL: define void @f15(658; CHECK-SAME: <4 x float> [[INIT:%.*]], ptr [[BASE:%.*]], i32 [[COUNT:%.*]]) {659; CHECK-NEXT: [[ENTRY:.*]]:660; CHECK-NEXT: br label %[[LOOP:.*]]661; CHECK: [[LOOP]]:662; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[COUNT]], %[[ENTRY]] ], [ [[NEXTI:%.*]], %[[LOOP]] ]663; CHECK-NEXT: [[NEXTI]] = sub i32 [[I]], 1664; CHECK-NEXT: [[PTR:%.*]] = getelementptr <4 x float>, ptr [[BASE]], i32 [[I]]665; CHECK-NEXT: [[VAL_I0:%.*]] = load float, ptr [[PTR]], align 16666; CHECK-NEXT: [[PTR_I1:%.*]] = getelementptr float, ptr [[PTR]], i32 1667; CHECK-NEXT: [[VAL_I1:%.*]] = load float, ptr [[PTR_I1]], align 4668; CHECK-NEXT: [[PTR_I2:%.*]] = getelementptr float, ptr [[PTR]], i32 2669; CHECK-NEXT: [[VAL_I2:%.*]] = load float, ptr [[PTR_I2]], align 8670; CHECK-NEXT: [[PTR_I3:%.*]] = getelementptr float, ptr [[PTR]], i32 3671; CHECK-NEXT: [[VAL_I3:%.*]] = load float, ptr [[PTR_I3]], align 4672; CHECK-NEXT: [[NEG_I0:%.*]] = fneg float [[VAL_I0]]673; CHECK-NEXT: [[NEG_I1:%.*]] = fneg float [[VAL_I1]]674; CHECK-NEXT: [[NEG_I2:%.*]] = fneg float [[VAL_I2]]675; CHECK-NEXT: [[NEG_I3:%.*]] = fneg float [[VAL_I3]]676; CHECK-NEXT: [[NEG_UPTO0:%.*]] = insertelement <4 x float> poison, float [[NEG_I0]], i64 0677; CHECK-NEXT: [[NEG_UPTO1:%.*]] = insertelement <4 x float> [[NEG_UPTO0]], float [[NEG_I1]], i64 1678; CHECK-NEXT: [[NEG_UPTO2:%.*]] = insertelement <4 x float> [[NEG_UPTO1]], float [[NEG_I2]], i64 2679; CHECK-NEXT: [[NEG:%.*]] = insertelement <4 x float> [[NEG_UPTO2]], float [[NEG_I3]], i64 3680; CHECK-NEXT: [[CALL:%.*]] = call <4 x float> @ext(<4 x float> [[NEG]])681; CHECK-NEXT: [[CALL_I0:%.*]] = extractelement <4 x float> [[CALL]], i64 0682; CHECK-NEXT: [[CMP_I0:%.*]] = fcmp ogt float [[CALL_I0]], 1.000000e+00683; CHECK-NEXT: [[CALL_I1:%.*]] = extractelement <4 x float> [[CALL]], i64 1684; CHECK-NEXT: [[CMP_I1:%.*]] = fcmp ogt float [[CALL_I1]], 2.000000e+00685; CHECK-NEXT: [[CALL_I2:%.*]] = extractelement <4 x float> [[CALL]], i64 2686; CHECK-NEXT: [[CMP_I2:%.*]] = fcmp ogt float [[CALL_I2]], 3.000000e+00687; CHECK-NEXT: [[CALL_I3:%.*]] = extractelement <4 x float> [[CALL]], i64 3688; CHECK-NEXT: [[CMP_I3:%.*]] = fcmp ogt float [[CALL_I3]], 4.000000e+00689; CHECK-NEXT: [[SEL_I0:%.*]] = select i1 [[CMP_I0]], float [[CALL_I0]], float 5.000000e+00690; CHECK-NEXT: [[SEL_I1:%.*]] = select i1 [[CMP_I1]], float [[CALL_I1]], float 6.000000e+00691; CHECK-NEXT: [[SEL_I2:%.*]] = select i1 [[CMP_I2]], float [[CALL_I2]], float 7.000000e+00692; CHECK-NEXT: [[SEL_I3:%.*]] = select i1 [[CMP_I3]], float [[CALL_I3]], float 8.000000e+00693; CHECK-NEXT: store float [[SEL_I0]], ptr [[PTR]], align 16694; CHECK-NEXT: store float [[SEL_I1]], ptr [[PTR_I1]], align 4695; CHECK-NEXT: store float [[SEL_I2]], ptr [[PTR_I2]], align 8696; CHECK-NEXT: store float [[SEL_I3]], ptr [[PTR_I3]], align 4697; CHECK-NEXT: [[TEST:%.*]] = icmp eq i32 [[NEXTI]], 0698; CHECK-NEXT: br i1 [[TEST]], label %[[LOOP]], label %[[EXIT:.*]]699; CHECK: [[EXIT]]:700; CHECK-NEXT: ret void701;702entry:703 br label %loop704 705loop:706 %i = phi i32 [ %count, %entry ], [ %nexti, %loop ]707 %acc = phi <4 x float> [ %init, %entry ], [ %sel, %loop ]708 %nexti = sub i32 %i, 1709 710 %ptr = getelementptr <4 x float>, ptr %base, i32 %i711 %val = load <4 x float> , ptr %ptr712 %neg = fneg <4 x float> %val713 %call = call <4 x float> @ext(<4 x float> %neg)714 %cmp = fcmp ogt <4 x float> %call,715 <float 1.0, float 2.0, float 3.0, float 4.0>716 %sel = select <4 x i1> %cmp, <4 x float> %call,717 <4 x float> <float 5.0, float 6.0, float 7.0, float 8.0>718 store <4 x float> %sel, ptr %ptr719 720 %test = icmp eq i32 %nexti, 0721 br i1 %test, label %loop, label %exit722 723exit:724 ret void725}726 727; Check that IR flags are preserved.728define <2 x i32> @f16(<2 x i32> %i, <2 x i32> %j) {729; CHECK-LABEL: define <2 x i32> @f16(730; CHECK-SAME: <2 x i32> [[I:%.*]], <2 x i32> [[J:%.*]]) {731; CHECK-NEXT: [[I_I0:%.*]] = extractelement <2 x i32> [[I]], i64 0732; CHECK-NEXT: [[J_I0:%.*]] = extractelement <2 x i32> [[J]], i64 0733; CHECK-NEXT: [[RES_I0:%.*]] = add nuw nsw i32 [[I_I0]], [[J_I0]]734; CHECK-NEXT: [[I_I1:%.*]] = extractelement <2 x i32> [[I]], i64 1735; CHECK-NEXT: [[J_I1:%.*]] = extractelement <2 x i32> [[J]], i64 1736; CHECK-NEXT: [[RES_I1:%.*]] = add nuw nsw i32 [[I_I1]], [[J_I1]]737; CHECK-NEXT: [[RES_UPTO0:%.*]] = insertelement <2 x i32> poison, i32 [[RES_I0]], i64 0738; CHECK-NEXT: [[RES:%.*]] = insertelement <2 x i32> [[RES_UPTO0]], i32 [[RES_I1]], i64 1739; CHECK-NEXT: ret <2 x i32> [[RES]]740;741 %res = add nuw nsw <2 x i32> %i, %j742 ret <2 x i32> %res743}744define <2 x i32> @f17(<2 x i32> %i, <2 x i32> %j) {745; CHECK-LABEL: define <2 x i32> @f17(746; CHECK-SAME: <2 x i32> [[I:%.*]], <2 x i32> [[J:%.*]]) {747; CHECK-NEXT: [[I_I0:%.*]] = extractelement <2 x i32> [[I]], i64 0748; CHECK-NEXT: [[J_I0:%.*]] = extractelement <2 x i32> [[J]], i64 0749; CHECK-NEXT: [[RES_I0:%.*]] = sdiv exact i32 [[I_I0]], [[J_I0]]750; CHECK-NEXT: [[I_I1:%.*]] = extractelement <2 x i32> [[I]], i64 1751; CHECK-NEXT: [[J_I1:%.*]] = extractelement <2 x i32> [[J]], i64 1752; CHECK-NEXT: [[RES_I1:%.*]] = sdiv exact i32 [[I_I1]], [[J_I1]]753; CHECK-NEXT: [[RES_UPTO0:%.*]] = insertelement <2 x i32> poison, i32 [[RES_I0]], i64 0754; CHECK-NEXT: [[RES:%.*]] = insertelement <2 x i32> [[RES_UPTO0]], i32 [[RES_I1]], i64 1755; CHECK-NEXT: ret <2 x i32> [[RES]]756;757 %res = sdiv exact <2 x i32> %i, %j758 ret <2 x i32> %res759}760define <2 x float> @f18(<2 x float> %x, <2 x float> %y) {761; CHECK-LABEL: define <2 x float> @f18(762; CHECK-SAME: <2 x float> [[X:%.*]], <2 x float> [[Y:%.*]]) {763; CHECK-NEXT: [[X_I0:%.*]] = extractelement <2 x float> [[X]], i64 0764; CHECK-NEXT: [[Y_I0:%.*]] = extractelement <2 x float> [[Y]], i64 0765; CHECK-NEXT: [[RES_I0:%.*]] = fadd fast float [[X_I0]], [[Y_I0]]766; CHECK-NEXT: [[X_I1:%.*]] = extractelement <2 x float> [[X]], i64 1767; CHECK-NEXT: [[Y_I1:%.*]] = extractelement <2 x float> [[Y]], i64 1768; CHECK-NEXT: [[RES_I1:%.*]] = fadd fast float [[X_I1]], [[Y_I1]]769; CHECK-NEXT: [[RES_UPTO0:%.*]] = insertelement <2 x float> poison, float [[RES_I0]], i64 0770; CHECK-NEXT: [[RES:%.*]] = insertelement <2 x float> [[RES_UPTO0]], float [[RES_I1]], i64 1771; CHECK-NEXT: ret <2 x float> [[RES]]772;773 %res = fadd fast <2 x float> %x, %y774 ret <2 x float> %res775}776define <2 x float> @f19(<2 x float> %x) {777; CHECK-LABEL: define <2 x float> @f19(778; CHECK-SAME: <2 x float> [[X:%.*]]) {779; CHECK-NEXT: [[X_I0:%.*]] = extractelement <2 x float> [[X]], i64 0780; CHECK-NEXT: [[RES_I0:%.*]] = fneg fast float [[X_I0]]781; CHECK-NEXT: [[X_I1:%.*]] = extractelement <2 x float> [[X]], i64 1782; CHECK-NEXT: [[RES_I1:%.*]] = fneg fast float [[X_I1]]783; CHECK-NEXT: [[RES_UPTO0:%.*]] = insertelement <2 x float> poison, float [[RES_I0]], i64 0784; CHECK-NEXT: [[RES:%.*]] = insertelement <2 x float> [[RES_UPTO0]], float [[RES_I1]], i64 1785; CHECK-NEXT: ret <2 x float> [[RES]]786;787 %res = fneg fast <2 x float> %x788 ret <2 x float> %res789}790define <2 x i1> @f20(<2 x float> %x, <2 x float> %y) {791; CHECK-LABEL: define <2 x i1> @f20(792; CHECK-SAME: <2 x float> [[X:%.*]], <2 x float> [[Y:%.*]]) {793; CHECK-NEXT: [[X_I0:%.*]] = extractelement <2 x float> [[X]], i64 0794; CHECK-NEXT: [[Y_I0:%.*]] = extractelement <2 x float> [[Y]], i64 0795; CHECK-NEXT: [[RES_I0:%.*]] = fcmp fast ogt float [[X_I0]], [[Y_I0]]796; CHECK-NEXT: [[X_I1:%.*]] = extractelement <2 x float> [[X]], i64 1797; CHECK-NEXT: [[Y_I1:%.*]] = extractelement <2 x float> [[Y]], i64 1798; CHECK-NEXT: [[RES_I1:%.*]] = fcmp fast ogt float [[X_I1]], [[Y_I1]]799; CHECK-NEXT: [[RES_UPTO0:%.*]] = insertelement <2 x i1> poison, i1 [[RES_I0]], i64 0800; CHECK-NEXT: [[RES:%.*]] = insertelement <2 x i1> [[RES_UPTO0]], i1 [[RES_I1]], i64 1801; CHECK-NEXT: ret <2 x i1> [[RES]]802;803 %res = fcmp fast ogt <2 x float> %x, %y804 ret <2 x i1> %res805}806declare <2 x float> @llvm.sqrt.v2f32(<2 x float>)807define <2 x float> @f21(<2 x float> %x) {808; CHECK-LABEL: define <2 x float> @f21(809; CHECK-SAME: <2 x float> [[X:%.*]]) {810; CHECK-NEXT: [[X_I0:%.*]] = extractelement <2 x float> [[X]], i64 0811; CHECK-NEXT: [[RES_I0:%.*]] = call fast float @llvm.sqrt.f32(float [[X_I0]])812; CHECK-NEXT: [[X_I1:%.*]] = extractelement <2 x float> [[X]], i64 1813; CHECK-NEXT: [[RES_I1:%.*]] = call fast float @llvm.sqrt.f32(float [[X_I1]])814; CHECK-NEXT: [[RES_UPTO0:%.*]] = insertelement <2 x float> poison, float [[RES_I0]], i64 0815; CHECK-NEXT: [[RES:%.*]] = insertelement <2 x float> [[RES_UPTO0]], float [[RES_I1]], i64 1816; CHECK-NEXT: ret <2 x float> [[RES]]817;818 %res = call fast <2 x float> @llvm.sqrt.v2f32(<2 x float> %x)819 ret <2 x float> %res820}821declare <2 x float> @llvm.fma.v2f32(<2 x float>, <2 x float>, <2 x float>)822define <2 x float> @f22(<2 x float> %x, <2 x float> %y, <2 x float> %z) {823; CHECK-LABEL: define <2 x float> @f22(824; CHECK-SAME: <2 x float> [[X:%.*]], <2 x float> [[Y:%.*]], <2 x float> [[Z:%.*]]) {825; CHECK-NEXT: [[X_I0:%.*]] = extractelement <2 x float> [[X]], i64 0826; CHECK-NEXT: [[Y_I0:%.*]] = extractelement <2 x float> [[Y]], i64 0827; CHECK-NEXT: [[Z_I0:%.*]] = extractelement <2 x float> [[Z]], i64 0828; CHECK-NEXT: [[RES_I0:%.*]] = call fast float @llvm.fma.f32(float [[X_I0]], float [[Y_I0]], float [[Z_I0]])829; CHECK-NEXT: [[X_I1:%.*]] = extractelement <2 x float> [[X]], i64 1830; CHECK-NEXT: [[Y_I1:%.*]] = extractelement <2 x float> [[Y]], i64 1831; CHECK-NEXT: [[Z_I1:%.*]] = extractelement <2 x float> [[Z]], i64 1832; CHECK-NEXT: [[RES_I1:%.*]] = call fast float @llvm.fma.f32(float [[X_I1]], float [[Y_I1]], float [[Z_I1]])833; CHECK-NEXT: [[RES_UPTO0:%.*]] = insertelement <2 x float> poison, float [[RES_I0]], i64 0834; CHECK-NEXT: [[RES:%.*]] = insertelement <2 x float> [[RES_UPTO0]], float [[RES_I1]], i64 1835; CHECK-NEXT: ret <2 x float> [[RES]]836;837 %res = call fast <2 x float> @llvm.fma.v2f32(<2 x float> %x, <2 x float> %y, <2 x float> %z)838 ret <2 x float> %res839}840 841; See https://reviews.llvm.org/D83101#2133062842define <2 x i32> @f23_crash(<2 x i32> %srcvec, i32 %v1) {843; CHECK-LABEL: define <2 x i32> @f23_crash(844; CHECK-SAME: <2 x i32> [[SRCVEC:%.*]], i32 [[V1:%.*]]) {845; CHECK-NEXT: [[SRCVEC_I0:%.*]] = extractelement <2 x i32> [[SRCVEC]], i64 0846; CHECK-NEXT: [[T1_UPTO0:%.*]] = insertelement <2 x i32> poison, i32 [[SRCVEC_I0]], i64 0847; CHECK-NEXT: [[T1:%.*]] = insertelement <2 x i32> [[T1_UPTO0]], i32 [[V1]], i64 1848; CHECK-NEXT: ret <2 x i32> [[T1]]849;850 %v0 = extractelement <2 x i32> %srcvec, i32 0851 %t0 = insertelement <2 x i32> undef, i32 %v0, i32 0852 %t1 = insertelement <2 x i32> %t0, i32 %v1, i32 1853 ret <2 x i32> %t1854}855 856define <2 x i32> @f24(<2 x i32> %src) {857; CHECK-LABEL: define <2 x i32> @f24(858; CHECK-SAME: <2 x i32> [[SRC:%.*]]) {859; CHECK-NEXT: [[SRC_I0:%.*]] = extractelement <2 x i32> [[SRC]], i64 0860; CHECK-NEXT: [[FRZ_I0:%.*]] = freeze i32 [[SRC_I0]]861; CHECK-NEXT: [[SRC_I1:%.*]] = extractelement <2 x i32> [[SRC]], i64 1862; CHECK-NEXT: [[FRZ_I1:%.*]] = freeze i32 [[SRC_I1]]863; CHECK-NEXT: [[FRZ_UPTO0:%.*]] = insertelement <2 x i32> poison, i32 [[FRZ_I0]], i64 0864; CHECK-NEXT: [[FRZ:%.*]] = insertelement <2 x i32> [[FRZ_UPTO0]], i32 [[FRZ_I1]], i64 1865; CHECK-NEXT: ret <2 x i32> [[FRZ]]866;867 %frz = freeze <2 x i32> %src868 ret <2 x i32> %frz869}870 871define <2 x float> @f25(<2 x float> %src) {872; CHECK-LABEL: define <2 x float> @f25(873; CHECK-SAME: <2 x float> [[SRC:%.*]]) {874; CHECK-NEXT: [[SRC_I0:%.*]] = extractelement <2 x float> [[SRC]], i64 0875; CHECK-NEXT: [[ADD_I0:%.*]] = fadd float [[SRC_I0]], [[SRC_I0]]876; CHECK-NEXT: [[SRC_I1:%.*]] = extractelement <2 x float> [[SRC]], i64 1877; CHECK-NEXT: [[ADD_I1:%.*]] = fadd float [[SRC_I1]], [[SRC_I1]]878; CHECK-NEXT: [[FRZ_I0:%.*]] = freeze float [[ADD_I0]]879; CHECK-NEXT: [[FRZ_I1:%.*]] = freeze float [[ADD_I1]]880; CHECK-NEXT: [[MUL_I0:%.*]] = fmul float [[FRZ_I0]], [[FRZ_I0]]881; CHECK-NEXT: [[MUL_I1:%.*]] = fmul float [[FRZ_I1]], [[FRZ_I1]]882; CHECK-NEXT: [[MUL_UPTO0:%.*]] = insertelement <2 x float> poison, float [[MUL_I0]], i64 0883; CHECK-NEXT: [[MUL:%.*]] = insertelement <2 x float> [[MUL_UPTO0]], float [[MUL_I1]], i64 1884; CHECK-NEXT: ret <2 x float> [[MUL]]885;886 %add = fadd <2 x float> %src, %src887 %frz = freeze <2 x float> %add888 %mul = fmul <2 x float> %frz, %frz889 ret <2 x float> %mul890}891 892define <2 x i8> @test_copy_trunc_flags(<2 x i32> %src) {893; CHECK-LABEL: define <2 x i8> @test_copy_trunc_flags(894; CHECK-SAME: <2 x i32> [[SRC:%.*]]) {895; CHECK-NEXT: [[SRC_I0:%.*]] = extractelement <2 x i32> [[SRC]], i64 0896; CHECK-NEXT: [[TRUNC_I0:%.*]] = trunc nuw nsw i32 [[SRC_I0]] to i8897; CHECK-NEXT: [[SRC_I1:%.*]] = extractelement <2 x i32> [[SRC]], i64 1898; CHECK-NEXT: [[TRUNC_I1:%.*]] = trunc nuw nsw i32 [[SRC_I1]] to i8899; CHECK-NEXT: [[TRUNC_UPTO0:%.*]] = insertelement <2 x i8> poison, i8 [[TRUNC_I0]], i64 0900; CHECK-NEXT: [[TRUNC:%.*]] = insertelement <2 x i8> [[TRUNC_UPTO0]], i8 [[TRUNC_I1]], i64 1901; CHECK-NEXT: ret <2 x i8> [[TRUNC]]902;903 %trunc = trunc nuw nsw <2 x i32> %src to <2 x i8>904 ret <2 x i8> %trunc905}906 907!0 = !{ !"root" }908!1 = !{ !"set1", !0 }909!2 = !{ !"set2", !0 }910!3 = !{ !3, !{!"llvm.loop.parallel_accesses", !13} }911!4 = !{ float 4.0 }912!5 = !{ i64 0, i64 8, null }913!13 = distinct !{}914;.915; CHECK: [[SET1_TBAA0]] = !{[[META1:![0-9]+]], [[META1]], i64 0}916; CHECK: [[META1]] = !{!"set1", [[META2:![0-9]+]]}917; CHECK: [[META2]] = !{!"root"}918; CHECK: [[SET2_TBAA3]] = !{[[META4:![0-9]+]], [[META4]], i64 0}919; CHECK: [[META4]] = !{!"set2", [[META2]]}920; CHECK: [[TBAA_STRUCT5]] = !{i64 0, i64 8, null}921; CHECK: [[ACC_GRP6]] = distinct !{}922; CHECK: [[LOOP7]] = distinct !{[[LOOP7]], [[META8:![0-9]+]]}923; CHECK: [[META8]] = !{!"llvm.loop.parallel_accesses", [[ACC_GRP6]]}924; CHECK: [[META9]] = !{float 4.000000e+00}925;.926