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1; RUN: opt -passes=lower-switch -S < %s | FileCheck %s2 3; Test that we don't crash and have a different basic block for each incoming edge.4define void @test0(i32 %mode) {5; CHECK-LABEL: @test06;7; CHECK: icmp eq i32 %mode, 48; CHECK-NEXT: label %BB3, label %BB29;10; CHECK: icmp eq i32 %mode, 211; CHECK-NEXT: label %BB3, label %BB212;13; CHECK: icmp eq i32 %mode, 014; CHECK-NEXT: label %BB3, label %BB215;16; CHECK: %merge = phi i64 [ 1, %BB3 ], [ 0, %LeafBlock ], [ 0, %LeafBlock1 ], [ 0, %LeafBlock3 ]17BB1:18 switch i32 %mode, label %BB2 [19 i32 3, label %BB220 i32 5, label %BB221 i32 0, label %BB322 i32 2, label %BB323 i32 4, label %BB324 ]25 26BB2:27 %merge = phi i64 [ 1, %BB3 ], [ 0, %BB1 ], [ 0, %BB1 ], [ 0, %BB1 ]28 ret void29 30BB3:31 br label %BB232}33 34; Test switch cases that are merged into a single case during lower-switch35; (take 84 and 85 below) - check that the number of incoming phi values match36; the number of branches.37define void @test1(i32 %mode) {38; CHECK-LABEL: @test139entry:40 br label %bb141 42bb1:43 switch i32 %mode, label %bb1 [44 i32 84, label %bb345 i32 85, label %bb346 i32 86, label %bb247 i32 78, label %exit48 i32 99, label %bb349 ]50 51bb2:52 br label %bb353 54bb3:55; CHECK-LABEL: bb356; CHECK: %tmp = phi i32 [ 1, %NodeBlock ], [ 0, %bb2 ], [ 1, %LeafBlock3 ]57 %tmp = phi i32 [ 1, %bb1 ], [ 0, %bb2 ], [ 1, %bb1 ], [ 1, %bb1 ]58; CHECK-NEXT: %tmp2 = phi i32 [ 2, %NodeBlock ], [ 5, %bb2 ], [ 2, %LeafBlock3 ]59 %tmp2 = phi i32 [ 2, %bb1 ], [ 2, %bb1 ], [ 5, %bb2 ], [ 2, %bb1 ]60 br label %exit61 62exit:63 ret void64}65 66; Test that we don't crash.67define void @test2(i32 %mode, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5, i1 %c6) {68; CHECK-LABEL: @test269 br i1 %c1, label %1, label %._crit_edge70 71; <label>:1 ; preds = %072 switch i32 %mode, label %33 [73 i32 2, label %274 i32 3, label %375 i32 4, label %476 i32 5, label %577 i32 6, label %678 i32 7, label %779 i32 8, label %880 i32 9, label %981 i32 10, label %1082 i32 11, label %1483 i32 12, label %1884 i32 13, label %2285 i32 14, label %2686 i32 15, label %2787 i32 16, label %3488 i32 17, label %3489 i32 18, label %3490 i32 19, label %3491 i32 22, label %3492 i32 20, label %3193 i32 21, label %3294 ]95 96; <label>:2 ; preds = %197 br label %3498 99; <label>:3 ; preds = %1100 br label %34101 102; <label>:4 ; preds = %1103 br label %34104 105; <label>:5 ; preds = %1106 br label %34107 108; <label>:6 ; preds = %1109 br label %34110 111; <label>:7 ; preds = %1112 br label %34113 114; <label>:8 ; preds = %1115 br label %34116 117; <label>:9 ; preds = %1118 br label %34119 120; <label>:10 ; preds = %1121 br i1 %c2, label %11, label %12122 123; <label>:11 ; preds = %10124 br label %13125 126; <label>:12 ; preds = %10127 br label %13128 129; <label>:13 ; preds = %12, %11130 br label %34131 132; <label>:14 ; preds = %1133 br i1 %c3, label %15, label %16134 135; <label>:15 ; preds = %14136 br label %17137 138; <label>:16 ; preds = %14139 br label %17140 141; <label>:17 ; preds = %16, %15142 br label %34143 144; <label>:18 ; preds = %1145 br i1 %c4, label %19, label %20146 147; <label>:19 ; preds = %18148 br label %21149 150; <label>:20 ; preds = %18151 br label %21152 153; <label>:21 ; preds = %20, %19154 br label %34155 156; <label>:22 ; preds = %1157 br i1 %c5, label %23, label %24158 159; <label>:23 ; preds = %22160 br label %25161 162; <label>:24 ; preds = %22163 br label %25164 165; <label>:25 ; preds = %24, %23166 br label %34167 168; <label>:26 ; preds = %1169 br label %34170 171; <label>:27 ; preds = %1172 br i1 %c6, label %28, label %29173 174; <label>:28 ; preds = %27175 br label %30176 177; <label>:29 ; preds = %27178 br label %30179 180; <label>:30 ; preds = %29, %28181 br label %34182 183; <label>:31 ; preds = %1184 br label %34185 186; <label>:32 ; preds = %1187 br label %34188 189; <label>:33 ; preds = %1190 br label %34191 192; <label>:34 ; preds = %33, %32, %31, %30, %26, %25, %21, %17, %13, %9, %8, %7, %6, %5, %4, %3, %2, %1, %1, %1, %1, %1193 %o.0 = phi float [ undef, %33 ], [ undef, %32 ], [ undef, %31 ], [ undef, %30 ], [ undef, %26 ], [ undef, %25 ], [ undef, %21 ], [ undef, %17 ], [ undef, %13 ], [ undef, %9 ], [ undef, %8 ], [ undef, %7 ], [ undef, %6 ], [ undef, %5 ], [ undef, %4 ], [ undef, %3 ], [ undef, %2 ], [ undef, %1 ], [ undef, %1 ], [ undef, %1 ], [ undef, %1 ], [ undef, %1 ]194 br label %._crit_edge195 196._crit_edge: ; preds = %34, %0197 ret void198}199 200; Test that the PHI node in for.cond should have one entry for each predecessor201; of its parent basic block after lower-switch merged several cases into a new202; default block.203define void @test3(i32 %mode, i1 %c1, i1 %c2) {204; CHECK-LABEL: @test3205entry:206 br label %lbl1207 208lbl1: ; preds = %cleanup, %entry209 br label %lbl2210 211lbl2: ; preds = %cleanup, %lbl1212 br label %for.cond213 214for.cond: ; preds = %cleanup, %cleanup, %lbl2215; CHECK: for.cond:216; CHECK: phi i16 [ undef, %lbl2 ], [ %b.3, %LeafBlock ], [ %b.3, %LeafBlock1 ]{{$}}217; CHECK: for.cond1:218 %b.2 = phi i16 [ undef, %lbl2 ], [ %b.3, %cleanup ], [ %b.3, %cleanup ]219 br label %for.cond1220 221for.cond1: ; preds = %for.inc, %for.cond222 %b.3 = phi i16 [ %b.2, %for.cond ], [ undef, %for.inc ]223 %tobool = icmp ne i16 %b.3, 0224 br i1 %tobool, label %for.body, label %for.end225 226for.body: ; preds = %for.cond1227 br i1 %c1, label %if.then, label %for.inc228 229if.then: ; preds = %for.body230 br label %cleanup231 232for.inc: ; preds = %for.body233 br label %for.cond1234 235for.end: ; preds = %for.cond1236 br i1 %c2, label %if.then4, label %for.body7237 238if.then4: ; preds = %for.end239 br label %cleanup240 241for.body7: ; preds = %for.end242 br label %cleanup243 244cleanup: ; preds = %for.body7, %if.then4, %if.then245 switch i32 %mode, label %unreachable [246 i32 0, label %for.cond247 i32 2, label %lbl1248 i32 5, label %for.cond249 i32 3, label %lbl2250 ]251 252unreachable: ; preds = %cleanup253 unreachable254}255 256; Test that the PHI node in cleanup17 is removed as the switch default block is257; not reachable.258define void @test4(i32 %mode) {259; CHECK-LABEL: @test4260entry:261 switch i32 %mode, label %cleanup17 [262 i32 0, label %return263 i32 9, label %return264 ]265 266cleanup17:267; CHECK: cleanup17:268; CHECK-NOT: phi i16 [ undef, %entry ]269; CHECK: return:270 271 %retval.4 = phi i16 [ undef, %entry ]272 unreachable273 274return:275 ret void276}277 278; Test that the PHI node in for.inc is updated correctly as the switch is279; replaced with a single branch to for.inc280define void @test5(i32 %mode, i1 %c1) {281; CHECK-LABEL: @test5282entry:283 br i1 %c1, label %cleanup10, label %cleanup10.thread284 285cleanup10.thread:286 br label %for.inc287 288cleanup10:289 switch i32 %mode, label %unreachable [290 i32 0, label %for.inc291 i32 4, label %for.inc292 ]293 294for.inc:295; CHECK: for.inc:296; CHECK-NEXT: phi i16 [ 0, %cleanup10.thread ], [ undef, %cleanup10 ]297%0 = phi i16 [ undef, %cleanup10 ], [ 0, %cleanup10.thread ], [ undef, %cleanup10 ]298 unreachable299 300unreachable:301 unreachable302}303