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1; RUN: not opt -passes=verify -S < %s 2>&1 | FileCheck %s2 3; LD2 and LD2LANE4 5; CHECK: Intrinsic has incorrect return type6; CHECK-NEXT: llvm.aarch64.neon.ld2.v4i327define { <4 x i64>, <4 x i32> } @test_ld2_ret(ptr %ptr) {8 %res = call { <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32(ptr %ptr)9 ret{ <4 x i64>, <4 x i32> } %res10}11declare { <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32(ptr %ptr)12 13; CHECK: Intrinsic has incorrect return type14; CHECK-NEXT: llvm.aarch64.neon.ld2lane.v4i6415define { <4 x i64>, <4 x i32> } @test_ld2lane_ret(ptr %ptr, <4 x i64> %a, <4 x i64> %b) {16 %res = call { <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i64(<4 x i64> %a, <4 x i64> %b, i64 0, ptr %ptr)17 ret{ <4 x i64>, <4 x i32> } %res18}19declare { <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i64(<4 x i64>, <4 x i64>, i64, ptr)20 21; CHECK: Intrinsic has incorrect argument type22; CHECK-NEXT: llvm.aarch64.neon.ld2lane.v4i3223define { <4 x i32>, <4 x i32> } @test_ld2lane_arg(ptr %ptr, <4 x i64> %a, <4 x i32> %b) {24 %res = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32(<4 x i64> %a, <4 x i32> %b, i64 0, ptr %ptr)25 ret{ <4 x i32>, <4 x i32> } %res26}27declare { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32(<4 x i64>, <4 x i32>, i64, ptr)28 29; LD3 and LD3LANE30 31; CHECK: Intrinsic has incorrect return type32; CHECK-NEXT: llvm.aarch64.neon.ld3.v4i3233define { <4 x i32>, <4 x i64>, <4 x i32> } @test_ld3_ret(ptr %ptr) {34 %res = call { <4 x i32>, <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32(ptr %ptr)35 ret{ <4 x i32>, <4 x i64>, <4 x i32> } %res36}37declare { <4 x i32>, <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32(ptr %ptr)38 39; CHECK: Intrinsic has incorrect return type40; CHECK-NEXT: llvm.aarch64.neon.ld3lane.v4i6441define { <4 x i64>, <4 x i32>, <4 x i64> } @test_ld3lane_ret(ptr %ptr, <4 x i64> %a, <4 x i64> %b, <4 x i64> %c) {42 %res = call { <4 x i64>, <4 x i32>, <4 x i64> } @llvm.aarch64.neon.ld3lane.v4i64(<4 x i64> %a, <4 x i64> %b, <4 x i64> %c, i64 0, ptr %ptr)43 ret{ <4 x i64>, <4 x i32>, <4 x i64> } %res44}45declare { <4 x i64>, <4 x i32>, <4 x i64> } @llvm.aarch64.neon.ld3lane.v4i64(<4 x i64>, <4 x i64>, <4 x i64>, i64, ptr)46 47; CHECK: Intrinsic has incorrect argument type48; CHECK-NEXT: llvm.aarch64.neon.ld3lane.v4i3249define { <4 x i32>, <4 x i32>, <4 x i32> } @test_ld3lane_arg(ptr %ptr, <4 x i64> %a, <4 x i32> %b, <4 x i32> %c) {50 %res = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32(<4 x i64> %a, <4 x i32> %b, <4 x i32> %c, i64 0, ptr %ptr)51 ret{ <4 x i32>, <4 x i32>, <4 x i32> } %res52}53declare { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32(<4 x i64>, <4 x i32>, <4 x i32>, i64, ptr)54 55; LD4 and LD4LANE56 57; CHECK: Intrinsic has incorrect return type58; CHECK-NEXT: llvm.aarch64.neon.ld4.v4i3259define { <4 x i32>, <4 x i32>, <4 x i64>, <4 x i32> } @test_ld4_ret(ptr %ptr) {60 %res = call { <4 x i32>, <4 x i32>, <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld4.v4i32(ptr %ptr)61 ret{ <4 x i32>, <4 x i32>, <4 x i64>, <4 x i32> } %res62}63declare { <4 x i32>, <4 x i32>, <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld4.v4i32(ptr %ptr)64 65; CHECK: Intrinsic has incorrect return type66; CHECK-NEXT: llvm.aarch64.neon.ld4lane.v4i6467define { <4 x i64>, <4 x i64>, <4 x i32>, <4 x i64> } @test_ld4lane_ret(ptr %ptr, <4 x i64> %a, <4 x i64> %b, <4 x i64> %c, <4 x i64> %d) {68 %res = call { <4 x i64>, <4 x i64>, <4 x i32>, <4 x i64> } @llvm.aarch64.neon.ld4lane.v4i64(<4 x i64> %a, <4 x i64> %b, <4 x i64> %c, <4 x i64> %d, i64 0, ptr %ptr)69 ret{ <4 x i64>, <4 x i64>, <4 x i32>, <4 x i64> } %res70}71declare { <4 x i64>, <4 x i64>, <4 x i32>, <4 x i64> } @llvm.aarch64.neon.ld4lane.v4i64(<4 x i64>, <4 x i64>, <4 x i64>, <4 x i64>, i64, ptr)72 73; CHECK: Intrinsic has incorrect argument type74; CHECK-NEXT: llvm.aarch64.neon.ld4lane.v4i3275define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_ld4lane_arg(ptr %ptr, <4 x i64> %a, <4 x i32> %b, <4 x i32> %c, <4 x i32> %d) {76 %res = call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lane.v4i32(<4 x i64> %a, <4 x i32> %b, <4 x i32> %c, <4 x i32> %d, i64 0, ptr %ptr)77 ret{ <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } %res78}79declare { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lane.v4i32(<4 x i64>, <4 x i32>, <4 x i32>, <4 x i32>, i64, ptr)80