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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2;; Check that we remove the exact MCInst number from --asm-verbose output3; RUN: llc < %s -mtriple=i686-unknown-unknown --asm-show-inst | FileCheck %s --check-prefix=VERBOSE4; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=CHECK5 6define i8 @add_i8(i8 %a) nounwind {7; VERBOSE-LABEL: add_i8:8; VERBOSE:       # %bb.0:9; VERBOSE-NEXT:    movzbl {{[0-9]+}}(%esp), %eax # <MCInst #[[#MCINST1:]] MOVZX32rm810; VERBOSE-NEXT:    # <MCOperand Reg:[[#MCREG1:]]>11; VERBOSE-NEXT:    # <MCOperand Reg:[[#MCREG2:]]>12; VERBOSE-NEXT:    # <MCOperand Imm:1>13; VERBOSE-NEXT:    # <MCOperand Reg:[[#MCREG3:]]>14; VERBOSE-NEXT:    # <MCOperand Imm:4>15; VERBOSE-NEXT:    # <MCOperand Reg:[[#MCREG3]]>>16; VERBOSE-NEXT:    addb $2, %al # <MCInst #[[#MCINST2:]] ADD8i817; VERBOSE-NEXT:    # <MCOperand Imm:2>>18; VERBOSE-NEXT:    retl # <MCInst #[[#MCINST3:]] RET3219; VERBOSE-NEXT:    # <MCOperand Reg:[[#MCREG4:]]>>20;21; CHECK-LABEL: add_i8:22; CHECK:       # %bb.0:23; CHECK-NEXT:    movzbl {{[0-9]+}}(%esp), %eax24; CHECK-NEXT:    addb $2, %al25; CHECK-NEXT:    retl26  %add = add i8 %a, 227  ret i8 %add28}29 30define i32 @add_i32(i32 %a) nounwind {31; VERBOSE-LABEL: add_i32:32; VERBOSE:       # %bb.0:33; VERBOSE-NEXT:    movl {{[0-9]+}}(%esp), %eax # <MCInst #[[#MCINST4:]] MOV32rm34; VERBOSE-NEXT:    # <MCOperand Reg:[[#MCREG1]]>35; VERBOSE-NEXT:    # <MCOperand Reg:[[#MCREG2]]>36; VERBOSE-NEXT:    # <MCOperand Imm:1>37; VERBOSE-NEXT:    # <MCOperand Reg:[[#MCREG3]]>38; VERBOSE-NEXT:    # <MCOperand Imm:4>39; VERBOSE-NEXT:    # <MCOperand Reg:[[#MCREG3]]>>40; VERBOSE-NEXT:    addl $2, %eax # <MCInst #[[#MCINST5:]] ADD32ri841; VERBOSE-NEXT:    # <MCOperand Reg:[[#MCREG1]]>42; VERBOSE-NEXT:    # <MCOperand Reg:[[#MCREG1]]>43; VERBOSE-NEXT:    # <MCOperand Imm:2>>44; VERBOSE-NEXT:    retl # <MCInst #[[#MCINST3]] RET3245; VERBOSE-NEXT:    # <MCOperand Reg:[[#MCREG1]]>>46;47; CHECK-LABEL: add_i32:48; CHECK:       # %bb.0:49; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax50; CHECK-NEXT:    addl $2, %eax51; CHECK-NEXT:    retl52  %add = add i32 %a, 253  ret i32 %add54}55