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1# RUN: llvm-exegesis -mtriple=riscv64 -mcpu=sifive-x280 -benchmark-phase=assemble-measured-code --mode=latency --opcode-name=PseudoVFWREDUSUM_VS_M1_E32 \2# RUN: --riscv-vlmax-for-vl --max-configs-per-opcode=1000 --min-instructions=100 | FileCheck %s3 4# Only allow VLMAX for AVL when -riscv-vlmax-for-vl is present5# CHECK: PseudoVFWREDUSUM_VS_M1_E326# CHECK: AVL: VLMAX7# CHECK-NOT: AVL: {{(simm5|<MCOperand: .*>)}}8