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1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py2# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m3 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,M33# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m4 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,M44# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m5 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,M55 6crc32w w0, w1, w27crc32w w0, w0, w38 9crc32cx w0, w1, x210crc32cx w0, w0, x311 12# ALL: Iterations: 10013# ALL-NEXT: Instructions: 40014 15# M3-NEXT: Total Cycles: 20416# M4-NEXT: Total Cycles: 40417# M5-NEXT: Total Cycles: 20418 19# ALL-NEXT: Total uOps: 40020 21# ALL: Dispatch Width: 622 23# M3-NEXT: uOps Per Cycle: 1.9624# M3-NEXT: IPC: 1.9625# M3-NEXT: Block RThroughput: 2.026 27# M4-NEXT: uOps Per Cycle: 0.9928# M4-NEXT: IPC: 0.9929# M4-NEXT: Block RThroughput: 4.030 31# M5-NEXT: uOps Per Cycle: 1.9632# M5-NEXT: IPC: 1.9633# M5-NEXT: Block RThroughput: 2.034 35# ALL: Instruction Info:36# ALL-NEXT: [1]: #uOps37# ALL-NEXT: [2]: Latency38# ALL-NEXT: [3]: RThroughput39# ALL-NEXT: [4]: MayLoad40# ALL-NEXT: [5]: MayStore41# ALL-NEXT: [6]: HasSideEffects (U)42 43# ALL: [1] [2] [3] [4] [5] [6] Instructions:44 45# M3-NEXT: 1 2 0.50 crc32w w0, w1, w246# M3-NEXT: 1 2 0.50 crc32w w0, w0, w347# M3-NEXT: 1 2 0.50 crc32cx w0, w1, x248# M3-NEXT: 1 2 0.50 crc32cx w0, w0, x349 50# M4-NEXT: 1 2 1.00 crc32w w0, w1, w251# M4-NEXT: 1 2 1.00 crc32w w0, w0, w352# M4-NEXT: 1 2 1.00 crc32cx w0, w1, x253# M4-NEXT: 1 2 1.00 crc32cx w0, w0, x354 55# M5-NEXT: 1 2 0.50 crc32w w0, w1, w256# M5-NEXT: 1 2 0.50 crc32w w0, w0, w357# M5-NEXT: 1 2 0.50 crc32cx w0, w1, x258# M5-NEXT: 1 2 0.50 crc32cx w0, w0, x359